JLS/JLSCircuitTester: A Comprehensive Logic Design and
• Instructors should be able to choose whether the sim-ulation of a given circuit progresses quickly to the end result, or incrementally (under instructor control) so students can observe time-varying circuit behavior.
• Signal values and memory element values should be easy to see and/or monitor in real time.
2.2 Assignments
Many instructors assign circuit design projects to their students as a way of reinforcing concepts presented in class and assessing whether the students are grasping those con-cepts. A good, user-friendly digital logic simulator is the ideal tool for this use.
It is usually the case that students will have little, if any, experience with logic simulation tools. Hence many of the same features that make a simulator ideal for lecture are also useful to students when preparing assignments. In addition, there are several student-oriented requirements:
• The tool should be easy to install and portable so that a student can install it on his or her platform, which may be different from the instructor’s, and then use it at his or her convenience.
• Everything must be as intuitive as possible and easy to learn. (In other words, the learning curve should be very short and gradual.)
• Users should be able to use the same flexible interface to model anything from simple combinational circuits with simple gates to complex, modular circuits (such as complete CPU implementations).
• Users (especially students) must have access to tuto-rials that walk them through the steps of creating in-creasingly complex circuits using more and more fea-tures.
• On-line help must be extensive, complete and easily navigable.
• The GUI should detect and prohibit obvious errors, such as nonsensical circuits (e.g., two wires to the same input, or directly connecting two non-tristated out-puts) and overlapping elements.
• Undo/redo should be available so students can easily eliminate non-working “solutions”.
• Cut/paste should be supported in order to make cir-cuit replications convenient.
• Debugging should be simple, especially with respect to slowly stepping the simulation of a circuit and the in-terrogation and display of signal and memory element values.
2.3 Grading
For the instructor, grading student circuits for correctness must be as convenient as possible. In its simplest terms, this means that there must be a way to load and simulate a cir-cuit in “batch” mode (i.e., from the command line), without the GUI appearing and without further human intervention.
Running a simulator in batch mode requires that input sig-nal values and/or memory element values be configurable
externally to the circuit being tested — preferably in files that are read by the simulator prior to or during simulation.
To be most useful, the batch mode should have the ability to simulate the circuit under test multiple times with differ-ent, sometimes exhaustive, sets of interrelated, time varying inputs. The ability to compare circuit generated outputs with instructor-provided correct answers, and conveniently report on the results, will greatly simplify grading. In addi-tion, providing students the ability to easily test their own circuits will improve learning by motivating students to fix problems instead of submitting an incorrect assignment and receiving a lower score [4].
3. OUR SOLUTION
JLSandJLSCircuitTesterdirectly address the needs raised above. JLSis written in Java and has been tested on many platforms without modification. It consists of a simple to use, yet powerful, graphical editor that allows users to cre-ate and modify logic circuits, and a simulator that will show (in multiple ways) the operation of the circuit over a period of time. Circuits as simple as a few logic gates or as com-plex as complete CPU microarchitectures with embedded subcircuits have been created and simulated in JLS.
Logic circuits can contain the standard gate types: AND, OR, NOT, NAND, NOR, XOR, tri-state buffer and a log-ically neutral time delay element; composite elements: de-coder, multiplexer, and adder; memory elements: registers, SRAM, and ROM; a clock and various mechanisms for con-necting gates and elements via wires and wiring elements.
Users can easily create state machines usingJLS’s state ma-chine editor. Combinational circuitry specified by a truth table can be generated by using JLS’s truth table editor.
Circuits can include copies of other circuits (subcircuits), nested to an arbitrary depth. Complex, time-varying multi-signal inputs can be specified.
JLSCircuitTesterprovides a robust batch mode with which students and instructors can thoroughly test a circuit. Users provide a text file describing the set of tests to run. Each test specifies the initial input signal and memory element values as well as the expected final output signal and memory el-ement values. JLSCircuitTester then simulates the circuit once for each test, compares the observed output values to the expected output values, and reports any discrepancies.
A thorough evaluation of a complex circuit requires many tests. JLSCircuitTester provides a number of short-cuts to simplify the generation of a large, possibly exhaustive, set of tests. For example, users can specify a list of values for each input. JLSCircuitTesterwill then generate one test for each unique combination of input values. Users can also write a Java class to calculate expected output values instead of having to type them out by hand. See [4] for more details.
4. COMPARISONS WITH OTHER TOOLS
Many existing logic design and simulation tools are very limited in the sense that they provide minimal functionality (e.g., simple logic gates and wires only). Such tools are well suited to limited situations (e.g., just simple logic) where all that is being taught matches what is available.
LogicSim has an intuitive circuit drawing mechanism and the ability to display current signal values. It also has a subcircuit (module) inclusion mechanism. However it only supports basic logic gates, flip-flops, and clocks. Wires
can-not be bundled. Simple inputs values come from switch and number-input elements. Outputs are displayed by LED and LCD-like elements. There is only a limited concept of time and no concept of propagation delay. There is no batch exe-cution mechanism and, therefore, little to assist with grading of students’ circuits.
Logisim has an easy-to-use drawing mechanism and the ability to display current signal values. It supports basic logic gates, tri-state gates, flip-flops, constant value sources, and has a subcircuit inclusion. There are no other complex elements, no propagation delays and no batch execution and testing capability.
The tools most comparable to JLS in functionality are LogicWorks 5 [2] and TkGate [3]. LogicWorks is a commer-cial product (i.e., not free) that runs on Windows and Mac platforms only. It has little support for batch execution and grading.
TkGate isJLS’s principle competitor. It has features that JLSdoes not:
• A multi-lingual interface.
• Support for transistors as a basic element.
• Static critical path analysis.
• An interactive “tty” element for user interaction with the circuit.
• Customizable appearance features (e.g., colors).
• Tools for generating memory files from microcode and assembly language.
• Virtual peripheral devices (user defined input/output).
• A batch mode for which the input is a complete Verilog-based scripting language that can control many as-pects of the simulator.
However,JLSandJLSCircuitTesterhave the following:
• Truth tables with an arbitrary number of single-bit inputs and outputs can be specified as basic elements.
Using a truth table can be more intuitive and conve-nient than a gate-level implementation of a needed but pedagogically uninteresting subcircuit.
• A state machine (Moore machine) editor.
This feature simplifies the construction of circuits con-taining a state machine (e.g., CPU control) tremen-dously. Mapping an abstract state machine specifica-tion to hardware (state register and input/next state combinational functions), while straightforward, is te-dious, error prone, and extremely difficult to modify, extend, observe in operation, and debug.
• Instructors can “lock” parts of the circuit they don’t want students to modify, thereby simplifying grading because certain circuit parts will be guaranteed to be in place and correct.
• The ability to give a wire a name, then put refer-ences to that named wire in other parts of the circuit, thereby avoiding long wire runs across the circuit that complicate the visualization.
Figure 1: Truth Table Example.
Figure 2: State Machine Example.
• Complete platform independence and extreme simplic-ity of installation (simply download a single Java jar file forJLS, another forJLSCircuitTester).
• A library of circuits from popular computer organi-zation textbooks is available, including directions on how to interact with the circuits to observe their be-havior. Included currently are Patterson and Hennessy [6], Patt and Patel [5], and Tanenbaum [8], with more being added.
• Extensive static error checking to avoid the construc-tion of “illegal” circuits.
• A testing framework that has a shallow learning curve and can be learned quickly regardless of experience with circuit design.
The key contributions from this list are JLS and JLSCircuitTester’s portability and ease of installation,JLS’s state machine and truth table elements,JLSCircuitTester’s powerful, yet simple, mechanisms for testing and grading circuits, and the library of existing textbook circuits.
5. PUBLICATIONS
JLS was first presented in a poster session at SIGCSE 2007, then in a paper presented at the 2007 Workshop on Computer Architecture Education [7].JLSCircuitTesterwas first presented in a poster session at SIGCSE 2008. The ITiCSE paper discusses how providing students access to JLSCircuitTestergreatly improved the quality of computer architecture projects [4] .
6. REFERENCES
[1] Carl Burch. Logisim: a graphical system for logic circuit design and simulation. J. Educ. Resour.
Comput., 2(1):5–16, 2002.
[2] Capilano Computing. LogicWorks 5 Interractive Software. Prentice Hall, 2003.
[3] Jeffrey Hansen, 2006. http://www.tkgate.org.
[4] Zachary Kurmas. Improving student performance using automated testing of simulated digital logic circuits. In ITiCSE ’08: Proceedings of the 13th annual conference on Innovation and technology in computer science education, pages 265–270, New York, NY, USA, 2008. ACM.
[5] Yale Patt and Sanjay Patel. Introduction to Computer Systems: From Bits & Gates to C and Beyond.
McGraw Hill, second edition, 2004.
[6] David Patterson and John Hennessy. Computer Organization and Deisgn: The Hardware/Software Interface. Morgan Kaufmann, third edition, 2005.
[7] David A. Poplawski. A pedagogically targeted logic design and simulation tool. In WCAE ’07: Proceedings of the 2007 workshop on Computer architecture education, pages 1–7. ACM, 2007.
[8] Andrew Tanenbaum. Structured Computer Organization. Prentice Hall, fifth edition, 2006.
[9] Andreas Tetzl, 2006.
http://www.tetzl.de/java logic simulator.html.
[10] Gregory S. Wolffe, William Yurcik, Hugh Osborne, and Mark A. Holliday. Teaching computer
organization/architecture with limited resources using simulators. In SIGCSE ’02: Proceedings of the 33rd SIGCSE technical symposium on Computer science education, pages 176–180, New York, NY, USA, 2002.
ACM Press.