A Design Study of a Future 10 kW Converter
Examensarbete utfört i elektroniksystem av
Sebastian Fant
LiTH-ISY-EX--08/4093--SE Linköping 2008
A Design Study of a Future 10 kW Converter
Examensarbete utfört i elektroniksystem vid Linköpings tekniska högskola
av Sebastian Fant LiTH-ISY-EX--08/4093--SE
Examinator: Kent Palmkvist Handledare: Jonny Lindgren
Presentationsdatum
2008-03-18
Publiceringsdatum (elektronisk version)
Institution och avdelning Institutionen för systemteknik Department of Electrical Engineering
URL för elektronisk version
http://www.ep.liu.se
Publikationens title
A Design Study of a Future 10 kW Converter
Författare
Sebastian Fant
Sammanfattning
This master thesis aim to design and evaluate a high power 3-phase DC/AC and AC/AC converter. The purpose is to use it for an electric motor in an aircraft possibly driving electric actuators or a propeller in an UAV or a small vehicle. Factors such as power loss and weight are of importance and will be estimated using known models supplied by various manufacturers of components. Different topologies of semiconductors suitable for this purpose are examined and presented. Extensive resources have been put to properly select the most suitable switching device according to their power loss and weight.
The need for filters and protective circuits will be estimated according to regulations of common military avionic standards and will be included in the resulting estimation along with simulations to evaluate their need and importance.
Snubber circuits will be presented and their specific ability to reduce voltage transients and switching losses will be examined along with some simulations to illustrate their performance.
In the final part an estimation of efficiency and weight of higher and lower power models of the same inverter has been made using the same procedure as presented in this paper. Engineering rules have been formed from these estimations to simply be able to calculate the proportions of a future inverter of arbitrary rated power.
Antal sidor: 93 Nyckelord
Inverter design, Power electronics, Snubber circuits, filter, IGBT
Språk
Svenska
x Annat (ange nedan) Engelska Antal sidor 93 Typ av publikation Licentiatavhandling x Examensarbete C-uppsats D-uppsats Rapport
Annat (ange nedan)
ISBN (licentiatavhandling)
ISRN LiTH-ISY-EX--08/4093--SE Serietitel (licentiatavhandling)
Abstract
This master thesis aim to design and evaluate a high power 3-phase DC/AC and AC/AC converter. The purpose is to use it for an electric motor in an aircraft possibly driving electric actuators, a propeller in an UAV or a small vehicle. Factors such as power loss and weight are of importance and will be estimated using known models supplied by various manufacturers of components. Different topologies of semiconductors suitable for this purpose are examined and presented. Extensive resources have been put to properly select the most suitable switching device according to their power loss and weight.
The need for filters and protective circuits will be estimated according to regulations of common military avionic standards and will be included in the resulting estimation along with simulations to evaluate their need and importance. Snubber circuits will be presented and their specific ability to reduce voltage transients and switching losses will be examined along with some simulations to illustrate their performance. In the final part an estimation of efficiency and weight of higher and lower power models of the same inverter has been made using the same procedure as presented in this paper. Engineering rules have been formed from these estimations to simply be able to calculate the proportions of a future converter of arbitrary rated power.
Sammanfattning
Det här examensarbetet syftar till att designa och utvärdera en högeffektskonverter kapabel att konvertera lik eller trefas växelspänning till en trefas växelspänning med högre frekvens. Syftet är att driva en elektrisk motor för möjligtvis en domkraft eller en propeller för en obemannad eller småskalig flygfarkost. Faktorer såsom förlusteffekt och vikt är viktigt och kommer att uppskattas med hjälp av välkända modeller framtagna av flertalet tillverkare av komponenter. Olika topologier av halvledarkomponenter passande ändamålet är undersökta och presenterade. Mycket tid läggs på att hitta de perfekta halvledarkomponenterna för ändamålet med tyngdpunkt på dess förlusteffekt och vikt. Behovet av filter och skyddskretsars omfattning är uppskattade enligt standardiserade bestämmelser för flygfarkoster och kommer i slutskedet att bidra med både vikt och effektförluster. Simuleringar utförs i Matlab och Simulink för att visa dess behov och prestanda. Olika typer av snubberkretsar presenteras med dess unika egenskaper som syftar till att undertrycka spänningstransienter over de känsliga halvledarkomponenterna. Simuleringar utförs i Pspice för att illustrera varje snubberkrets respektive för och nackdelar samt prestanda. I slutskedet av rapport har det genomförts en uppskattning av verkningsgraden och vikten gällande för konverters av högre och lägre märkeffekt. Det har gjorts analogt med det tillvägagångssätt som använts i denna rapport. Ingenjörsregler har blivit approximerade för att enkelt kunna uppskatta vikt och förlusteffekt för godtycklig märkeffekt.
Acknowledgements
This report is a result of my master-thesis project carried out at SAAB Aerosystems in Linköping under supervision of the department of Electrical Engineering at the University of Linköping. As a student at the programme for applied physics and electro engineering I chose the alignment which felt the most natural and rewarding to me, electronics. This master-thesis was chosen among several available projects due to my interest in analog and high power electronics although the amount of the courses taken in the field was few. As I expect the need for this competence will grow significantly in the near I made the tactical choice by accepting the proposal offered to me.
Looking back over the time spent at SAAB Aerosystems it has been very interesting, rewarded and has completely fulfilled my expectations. I have been given opportunities to reflect the daily life of an avionic electrical engineer and the problems they face.
Great insight into the avionic industry has been given by my brilliant supervisor Lars Austrin and I would like to thank him dearly for that. I would also like to thank Eduardo Figueroa for giving me many discussions about the future life as an engineer and where it might lead. I would like to thank Andreas Johansson for his revising and the many practical hints he gave me. I would like to thank my co-worker Daniel Eidborn for a job well done and I wish you all the luck in the future.
Thank you SAAB and especially the TDG department for providing the finances and office necessary for completing this master-thesis.
Last but not the least I would like to thank my family and my friends for supporting me and my studies throughout the years.
Linköping March 2008
Table of contents
LIST OF FIGURES... VI LIST OF TABLES... VI 1. INTRODUCTION... 1 1.1. OBJECTIVES... 1 1.2. BACKGROUND... 1 1.3. CHALLENGES... 1 1.4. RESEARCH METHOD... 2 1.5. DELIMITATIONS... 2 1.6. STRUCTURE OF REPORT... 2 2. THEORY ... 5 2.1. CONVERTER PRINCIPLES... 52.2. PRINCIPLES FOR CONTROL... 7
2.2.1. Switching frequency... 7 2.3. POWER COMPONENTS... 8 2.3.1. Switching transistors ... 8 2.3.1.1. IGBT ... 8 2.3.1.2. MOSFET... 12 2.3.1.3. BJT... 13 2.3.2. Free-wheeling-diodes ...13 2.3.2.1. Silicon Schottky... 14
2.3.2.2. Silicon Carbide Schottky... 14
2.3.3. Rectifier ...14 2.4. FILTERS...16 2.4.1. Input filters ...16 2.4.2. DC-bus filter ...19 2.4.2.1. Capacitor bank ... 19 2.4.2.2. Choke inductor... 25 2.4.2.3. Output filters ...26 2.5. SNUBBER CIRCUITS...30 2.5.1. Increased SOA ...30 2.5.2. Reducing losses...35 2.6. PRINCIPLES OF COOLING...36 2.6.1. Thermal resistance ...36 2.6.2. Heat transfer...36 2.7. CHASSIS DESIGN...37 2.7.1. Cooling scenarios ...39 2.7.1.1. Exterior heatsink ... 39
2.7.1.2. Interior heat sink ... 42
2.7.1.3. Internal fluid cooling... 43
2.8. TRANSISTOR DRIVES...43 2.9. POWER SUPPLY...45 2.10. CONTROLLER...46 3. LOSSES ...47 3.1. SWITCHING LOSSES...47 3.1.1. Transistor ...47 3.1.2. Diode ...48 3.2. CONDUCTION LOSSES...49 3.2.1. Transistor ...49 3.2.2. Diode ...49
3.3. LOWEST LOSS ESTIMATION OF IGBT AND FWD ...50
3.5. FILTERS...52 3.5.1. Input filter ...52 3.5.2. DC-bus filter ...52 3.5.3. Output filter ...53 3.6. CONTROLLER...53 3.7. TRANSISTOR DRIVES...53
3.8. INTERNAL POWER SUPPLY...54
4. RESULTS ...55 4.1. POWER DENSITY...55 4.2. SCALABILITY...56 4.3. EFFICIENCY...56 4.4. RELIABILITY...57 4.5. SIMULATIONS...58 5. CONCLUSIONS ...59 6. FUTURE WORK ...60 BIBLIOGRAPHY ...61
APPENDIX A1–OUTPUT CHARACTERISTICS USING SURGE CURRENT LIMITER...63
APPENDIX A2–OUTPUT CHARACTERISTICS USING NOSURGE CURRENT LIMITER...64
APPENDIX A3–RECTIFIER/IGBTCURRENTS USING SURGE CURRENT LIMITER...65
APPENDIX A4–RECTIFIER/IGBTCURRENTS USING NO SURGE CURRENT LIMITER...66
APPENDIX B–SYSTEM SIMULATION MODEL...67
APPENDIX C1–MAIN GRID VOLTAGE HARMONICS WITHOUT FILTER...68
APPENDIX C2–MAIN GRID CURRENT HARMONICS WITHOUT FILTER...69
APPENDIX C3–MAIN GRID VOLTAGE HARMONICS WITH FILTER...70
APPENDIX C4–MAIN GRID VOLTAGE HARMONICS WITH 12-PULSE RECTIFIER...71
APPENDIX C5–MAIN GRID CURRENT HARMONICS USING 12-PULSE RECTIFIER...72
APPENDIX D1–IGBT CHART 1...73
APPENDIX D2–IGBT CHART 2...74
APPENDIX D3–MOSFET/DIODE CHART...75
APPENDIX E1–DECOUPLING CAPACITOR SNUBBER CIRCUIT SCHEMATICS...76
APPENDIX E2–RESTRICTED DECOUPLING CAPACITOR SNUBBER CIRCUIT SCHEMATICS...76
APPENDIX E3–RCDCHARGE/DISCHARGE SNUBBER CIRCUIT SCHEMATICS...77
APPENDIX E4–RCDCLAMP-SNUBBER CIRCUIT SCHEMATICS...77
List of figures
FIGURE 1:INVERTER OVERVIEW... 5
FIGURE 2:RECTIFIER STAGE... 5
FIGURE 3:SMOOTHING STAGE... 5
FIGURE 4:SWITCHING STAGE... 6
FIGURE 5:FILTERING OF PULSE TRAIN IN OUTPUT STAGE... 7
FIGURE 6:SIMPLIFIED MODEL... 8
FIGURE 7:SYMBOL LAYOUT... 9
FIGURE 8:TURN-OFF BEHAVIOR... 9
FIGURE 9:INTERNAL STRAY CAPACITANCES IN AN IGBT...10
FIGURE 10:TYPCIAL IGBTTURN-ON...11
FIGURE 11:TYPICAL IGBTTURN-OFF...12
FIGURE 12:IGBT WITH FWD ...13
FIGURE 13:OVERVEIW OF THE RECTIFIER...15
FIGURE 14:INPUT FILTER...17
FIGURE 15:TYPICAL IMPEDANCE FOR INPUT FILTER VS. HARMONICS OF GRID FREQUENCY...17
FIGURE 16:PROTECTIVE CIRCUITS: SIMPLE, SERIES AND PARALLEL CONNECTION...21
FIGURE 17:CHARGE AND DISCHARGE TIME OF CAPACITOR BANK...22
FIGURE 18:ELECTRICAL LAYOUT OF CAPACITOR BANK...24
FIGURE 20:OUTPUT FILTER...26
FIGURE 21:DECOUPLING AND RESTRICTED DECOUPLING CAPACITOR...30
FIGURE 22:SWITCING DEVICE VOLTAGE WITHOUT SNUBBER CIRCUIT...31
FIGURE 23:DEVICE VOLTAGE WITH DECOUPLING CAPACITOR...32
FIGURE 24:DEVICE VOLTAGE WITH DISCHARGE RESTRICTED DECOUPLING CAPACITOR...33
FIGURE 25:RCDCHARGE-DISCHARGE SNUBBER AND RCDCLAMP-SNUBBER...34
FIGURE 26:RCDCHARGE-DISCHARGE SNUBBER...34
FIGURE 27:RCDCLAMP-SNUBBER...35
FIGURE 28:SCETCH OF CHASSIS...40
FIGURE 29:THERMAL RESISTIVITY ESTIMATION...40
FIGURE 30:HEATSINK LAYOUT...41
FIGURE 31:THERMAL RESISTANCE FACTOR VS. AIRFLOW...42
FIGURE 32:DESCRIPTIVE DRIVER INTERNAL CIRCUIT (IGBT WITHIN DASHED LINE) ...43
FIGURE 33:APPROXIMATE OUTPUT CHARACTERISTICS...49
List of tables
TABLE 1:INPUT CURRENT HARMONICS...16TABLE 2:VOLTAGE HARMONICS ON GRID...18
TABLE 3:INPUT FILTER COMPONENTS...19
TABLE 4:DC-BUS FILTER COMPONENTS...26
TABLE 5:OUTPUT FILTER COMPONENTS...29
TABLE 6:SNUBBER CHARACTERISTICS...36
TABLE 7: SWITCHING CHARACTERISTICS VS. DRIVER DIMENSIONS...44
TABLE 8:DRIVER COMPONENTS...45
TABLE 9:POWER SUPPLY SPECIFICATIONS AND DIMENSIONS...46
TABLE 10:CONTROLLER COMPONENTS...46
TABLE 11:SUITABLE DISCRETE IGBTS...50
TABLE 12:SUITABLE IGBT MODULES...51
TABLE 13:SUITABLE RECTIFIERS...52
TABLE 14:DC-BUS FILTER LOSSES WHEN USING 230/400VAC INPUT...52
TABLE 15:DC-BUS FILTER LOSSES WHEN USING 115/200VAC INPUT...53
TABLE 16:APPROXIMATE SEPARATED WEIGHT FOR 230/400VAC APPLICATIONS...55
TABLE 17:APPROXIMATE SEPARATED WEIGHT FOR 115/200VAC APPLICATIONS...55
TABLE 19:APPROXIMATE SEPARATED LOSSES @10 KHZ SWITCHING FREQUENCY...57 TABLE 20:APPROXIMATE SEPARATED LOSSES @14 KHZ SWITCHING FREQUENCY...57
List of symbols
VDC The voltage achieved on the DC-bus after the following smoothing
VAC Input/Output voltage in alternating mode
IC Collector current VCD Collector-Emitter voltage VGE Gate-Emitter voltage RDS Drain-Source resistance VDS Drain-Source voltage ID Drain current Abbreviations AC Alternating Current DC Direct Current
PWM Pulse Width Modulation
PM Permanent Magnet
FET Field Effect Transistor
IGBT Insulated Gate Bipolar Transistor
SiC Silicon Carbide
PLD Programmable Logic Device
µC Micro Controller
EMI Electro Magnetic Interference
PMSM Permanent Magnet Synchronous Motor SOA Safe Operating Area
FWD Free Wheeling Diode LC Inductive-Capacitive
RLC Resistive-Inductive-Capacitive RFI Radio Frequency Interference MTBF Minimum Time Before Failure ESR Equivalent Series Resistance HFE small signal Forward Current Gain MASL Meters Above Sea Level
1. Introduction
As we all get more conscious about the damage the combustion of fossil fuels inflicts on the environment more and more alternative solutions come to light. Hybrid drive, biological petrol and power cells are terms most people are familiar with. Electric propulsion in automotives is being promoted throughout the world as the most environmental friendly solution on the market. Once electricity is produced the electric propulsion is completely clean and it is easier to produce clean electricity in a controlled environment such as a power plant. However, the environment issue is not the only benefit. The increased control, performance and efficiency achieved are in some applications the most wanted benefit, especially in avionics.
1.1. Objectives
This master thesis aims to design and evaluate a 10kW three-phase converter handling both AC/DC and DC/DC. The function of the converter is to drive a permanent magnetized synchronized motor possibly working as a starter motor or driving an electric actuator possibly in an aircraft. A main focus will be to pinpoint the parts responsible for the largest power loss, how to reduce this magnitude and estimate the weight of the product. As an extension the characteristics for a few imaginary converters with different power ratings will be estimated. This to in the end form up approximate equations giving the power loss and weight based of a few input parameters.
1.2. Background
Today it is not uncommon to use highly efficient petrol driven generators which supplies electronic equipment and motors with power and in the end reach a higher efficiency compared driving the equipment directly with combustion engines. The middle step between the engine and the power source is the converter, a device not seldom responsible for a large loss due to inefficiency, demanding cooling and thereby introducing further weight.
A new concept in aviation is the “More Electric Aircraft” which aims to replace all hydraulics with an electric correspondence. This is to reach higher efficiency which will reduce weight but also increase control and improved behavior.
With numerous motors demanding an individual converter its losses and weight becomes prominent and has to be optimized. The long term goal is to remove the compressor and improving the generator driven by the combustion engine to supply the electric power needed.
1.3. Challenges
The environments and conditions in an aircraft such as JAS 39 GRIPEN are very different from sea-level. This complicates the objective as electronic devices behave differently or possibly not at all when exposed to high temperature, cosmic rays and mechanical stress.
Cooling gets more difficult when air density decreases as it does on higher altitudes. A higher altitude also increases the failure rate due to cosmic radiation further extending the need for effective cooling. Since weight is an emphasized problem and cooling is responsible for most of it a well considered tradeoff is needed.
How can we maintain a low weight while still having a high reliability? How much will new technology reduce power dissipation? Is it possible to use the aircrafts built-in cooling system and will it improve overall efficiency?
1.4. Research
method
• Literature study
• Examine which switching topology and which components to select for the optimum solution.
• Estimate the amounts of power dissipated, simulate if possible to confirm • Estimate cooling needs and its size/weight
• Design and simulate filters to follow standard regulations
• Evaluate the operating area of the components and which counter measures to take to guarantee reliability and functionality.
• Form engineering rules to model scalability, power density and efficiency
1.5. Delimitations
This master thesis will not cover the physical construction or commissioning of the converter. The programming required in the controller will not be carried out. Some very modern applications will be neglected because it is too time consuming to estimate the gain over conventional solutions. Modeling of reliability will not be carried out very detailed
1.6.
Structure of report
This report will be divided into seven chapters and below is a short description of each chapter.
1. Introduction –
2. Theory – A general introduction to power inverters is given, how they operate, difficulties etc. Also a light discussion and explanation of the concepts and behavior of the different components and parts building up the converter is carried out as well as some general calculations in aspect of cooling and weight of an enclosure.
3. Losses – A more specified estimation of the losses of the different components is carried out accompanied by simulations to hopefully confirm these estimations and
illustrate their effectiveness. Loss in filter will be estimated and suggestions for improvement will be carried out with respect to setbacks. Different snubber circuits will be evaluated with their pros and cons.
4. Results – Results with aspect to losses and its respective cooling are presented for a few suitable solutions along with their weight, reliability and cost.
A way of scaling is presented with their respective parameters.
5. Conclusions – Presents the conclusions of the work as well as gives answers to the challenges mentioned concerning the converter. General thoughts on outlooks of these applications are presented with regards to ongoing research in this field.
Also an evaluation of how the work has proceeded is included, which problems have risen and how they were handled.
6. Future work – Discusses improvements and work to be carried out to further optimize the converter. Which parts have been neglected etc?
7. Appendix – Various plots, spreadsheets and graphs from simulations as well as schematics from simulations.
2. Theory
2.1. Converter
principles
• Overview
Figure 1 : Inverter overview
1. Rectifier
In the first step of the inverter the rectifier rectifies the tri-phase figure 2:
Figure 2 : Rectifier stage
2. Smoothing stage
The oscillating rectified DC-bus voltage will cause problems further on and has do be dealt with, this is done with a LC-filter (inductor-capacitor) which is low pass filtering the voltage but also providing an extra current buffer. As explained in 2.3.3. the oscillations can be as much as 9% of the DC-bus voltage and has to be decreased otherwise the noise would spread further and cause loss and misbehavior. A change in frequency or controlling the average DC-bus voltage with thyristors would alter the need for a filter. A higher frequency would make the ripple more frequent requiring a smaller capacitor but if the voltage is controlled a larger ripple would occur requiring larger capacitors, more about this in 2.4.1. After the DC-bus filters the voltage will look like it does in figure 3, with less ripple:
If the DC-input would be used it would connected after the bypassed rectifier but still use the DC-filter to relieve the source in the same manner as the VAC input filter covered in
chapter 2.4.1.
3. Switching stage
Now as the transistor bridge has a much more stable voltage to process it can start chopping the voltage and forming the pulse width modulated sinus. The way of chopping and switching is decided by a controller which gives signals to specified drives for the switching transistors forming the pulse width modulated sinus wave. The transistor bridge output wave can look as described in figure 4 where the voltage is measured between one phase and another:
Figure 4 : Switching stage
4. Filtering and output stage
This rough sinus wave formed by the transistor bridge would inflict noise and EMI both in wires and in the load due to its step nature and has to be low pass filtered at least just before the load but rather directly after the transistor bridge. Having long wires with large voltage spikes would create high magnitude radio frequency disturbance which is very unwanted, especially in an aircraft. This filtration can be done using a three phase LC-filter but also in some cases the inductive coils of the motor can be used as a low pass filter if the converter is close enough to the load.
In the picture 5 the pulse train has been filtered with a LC-filter. As can be seen it resembles a sinus wave but with higher frequent noise. To remove this relative small noise additional high power coils and capacitors has to be included further increasing weight and size of the unit, again a tradeoff has to be made.
Figure 5 : Filtering of pulse train in output stage
2.2.
Principles for Control
2.2.1. Switching frequency
Calculating and choosing a proper switching frequency of a PWM inverter is not always trivial, there as various advantages and disadvantages of choosing a too high or a too low switching frequency. Low mf ( = ≤21 out sw f f f m ) [12]. (2.2.1.1)
Where fsw is the switching frequency at which the transistors operate and fout is the
intended maximum frequency at which the load operates, fout is thereby a low-pass
filtered version of fsw. The major setback of a too low mf and too low switching
frequency is that the voltage-ripple on the sine-wave otherwise becomes prominent which causes inefficient ripple within the load, as seen in figure 5. A synchronous PWM is strongly advised since synchronizing the PWM means that the present output voltage is fed back to the controller via a voltage-divider and then errors are compensated for, greatly reducing the voltage-ripple and thus improving the efficiency. Synchronizing the circuit requires mf to be an odd integer as well as more competent circuitry, including an
A/D-converter and perhaps hardware-support for arithmetic operations, however most modern circuitry includes this. These voltage ripples or harmonics mainly cause loss in effect but also can become a burden to people and mechanical devices since equipment and especially motors can start to vibrate significantly but also generate other non desirable side-effects. These vibrations can cause reduced lifetime in equipment due to stress but also emit harmful and annoying sound in often heard frequencies. However if a highly competent filter on the output is implemented many of the setbacks of a low mf
can be avoided, the current ripple in the load can be reduced heavily as well as reducing the amount of emitted electromagnetic waves. The setback here is the additional weight and possibly significant additional loss
High mf ( = ≥21 out sw f f f m ) [12]. (2.2.1.2)
When the switching frequency increases the need for a synchronized PWM decreases since the amplitudes of the harmonics are very small and high frequent and thus somewhat insignificant. Although when controlling an AC-motor with variable frequency
the currents at very low output frequencies can become prominent and undesired, despite the very low amplitudes. As a result, synchronous PWM is almost always advised.
However, even if the overall negative effect of harmonics decreases with high switching frequency the switching loss in the switching device increases in proportion to the increased frequency which always is unwanted.
2.3. Power
components
In this part mostly the semi conductive components responsible for the main part of the loss are considered, those are the main supply rectifier and the transistor-bridge.
Mainly two types of transistors have been considered, the IGBT and the MOSFET and their advantages and disadvantages are explained further on. A third option exists, the bipolar junction transistor (BJT) but as this one is current controlled it would require a driver capable of providing a high current while switching very fast. A combination which is very difficult to realize.
2.3.1. Switching transistors
2.3.1.1. IGBT
The Insulated Gated Bipolar Transistor is a device that combines the low forward conduction loss, especially at high voltages, of a Bipolar Junction Transistor (BJT) and the short switching times of the Metal Oxide Semiconductor Field Effect Transistor (MOSFET). MOSFET on its own has very high conduction loss at high voltages while BJT turns off and on much slower [12]. The two figures 6 and 7 illustrate a simplified model of an IGBT and the symbol layout:
Figure 7 : Symbol layout
The upper figure consist of a Darlington coupled pnp-doped BJT and an n-channel MOSFET with a resistor that corresponds to the drain drift region in the IGBT.
It is also common to see an npn-doped transistor between the base if the BJT and the emitter, this is to reduce the turn of tail illustrated in figure 8:
Figure 8: Turn-off behavior
As visible in figure 8, apart from this turn off tail the switching characteristics of an IGBT resembles the ones of a MOSFET expect for the MOSFET usually being a lot faster.
To design and dimension the drive stage knowledge of the internal stray capacitances are required to reach a sufficient turn on and turn off time without a too large over-shoot and to maintain within the safe operating area (SOA). Although the stray capacitances vary with the voltage supplied over them making it a bit harder but there are usually provided some graphs displaying this in the datasheet. To understand the switching characteristics a more detailed explanation has to be done, however the IGBT-symbol can be simplified for switching evaluation as described in figure 9:
Figure 9: Internal stray capacitances in an IGBT
• IGBT Turn-On
When a positive voltage is applied on the gate (VGE) a current (IG) will start to flow into
the gate through the gate resistor RG charging the Cge capacitor and the voltage rises
exponentially over the capacitor until reaching VGE(th). The Miller effect capacitance
(Cgc)at this point does not contribute much.Beyond this point the collector current (IC)
starts to increase quickly and linearly to an over-shoot level depending on the semiconductor structure and the external circuit. The gate current decreases to a level
where it stabilizes as the VGE reaches the Miller plateau since the Cgc now gets charged
instead of Cge due to the low voltage at the collector. Since the voltage on the collector is
decreasing the voltage on the gate remains rather constant when charging the Cgc but
increases again after the VCE reaches the VCE(sat). To finally stop at the maximum VGE
when both the gate capacitors are fully charged. The speed of the whole Turn-On process is directly linked to the gate resistor Rg, a smaller resistor speeds up the process while
causing excessive oscillations or voltage spikes in the circuit. If a snubber circuit is used it can help to resize the components through filtering out unwanted parts of the signal and then be able to reducing the gate resistor and make the switching process faster. Although minimizing stray inductances in wiring and coils is the most effective way of reducing noise without particular setbacks except practical. On the other hand a larger resistor slows down the circuit but causes much less noise and voltage transients [9].
Figure 10 : Typcial IGBT Turn-on
The dissipated energy during each Turn-On can be calculated from the triangle infolded by the collector current IC and the collector-emitter voltage VCE times the time period.
• IGBT Turn-Off
During Turn-Off the gate voltage turn to zero and current start to flow from the gate through the gate resistor, discharging both the gate capacitances, Cge and Cce until the
Miller plateau is reached. Changing the gate resistor does not change the time of the process like it did for the Turn-On except in a pure MOSFET where it is possible to decrease Turn-Off time by reducing this resistor [9]. Then the collector-emitter voltage (VCE) starts to increase until reaching the DC-bus voltage. The gate-emitter voltage (VGE)
continues to decrease until passing the threshold voltage (VGE(th)) and turning the IGBT
off. Due to the bipolar part of the IGBT a current tail will arise as shown in the figure below, inflicting additional power loss. The current tail is highly unwanted but is very hard (impossible today), to eliminate completely.
Figure 11 : Typical IGBT Turn-Off
The losses are calculated in the same manner as during Turn-On, the triangular area infolded by the collector current and the collector-emitter voltage. In addition there is the current-tail area multiplied by the collector-emitter voltage. In datasheets the dissipated energy due to the current-tail is often included in the total Turn-Off energy.
2.3.1.2. MOSFET
A power Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is just like a regular small signal MOSFET but larger in every sense. Larger current and higher voltages causes the internal capacitances and other critical parameters to suffer increases both switching and conduction losses. Even though slower than a signal MOSFET it is definitively faster than any IGBT. The appearance of the Turn-On and Turn-Off graphs for the MOSFET is very similar to the ones of the IGBT except for a much faster process and there are no current tails during Turn-Off. In addition, altering the gate resistor can reduce both Turn-On and Turn-Off time unlike the case with the IGBT where the latter was somewhat unchangeable. Even if the MOSFET is much faster it suffers large losses during forward conduction, at least when operating in high voltage applications, this partly due to the internal resistance growing exponentially with the rated VDS as
described by 2.3.1.1. α DS on DS RV R ( ) = 0 (2.3.1.1)
Whereα ≈1.6, VDS is the maximum rated voltage and R0 the initial resistance [9].
This resistance along with the current forms up the voltage drop over the junction as in 2.3.1.2. α DS D on DS D sat DS I R I RV V ( ) = ( ) = 0 (2.3.1.2)
As seen the forward voltage drop increases very quickly with increasing current and especially the VDS voltage. The consequence of this is the inability to reach high
efficiency while operating under high voltages and large currents since the resistance does not become small enough to compensate for the vast 2
D
I term. This loss is the
dissipated power as shown as in equation 2.3.1.3.
) ( 2 on DS D cond I R P = (2.3.1.3)
2.3.1.3. BJT
The power Bipolar Junction Transistor (BJT) is one of the components forming the IGBT. The benefits of using a BJT are its capability of handling high currents and high forward voltages even if the reverse voltage capabilities are limited. The forward saturation voltage is almost independent on the current which keeps the conduction loss at a low level. In opposite to the MOSFET and the IGBT the BJT is a current controlled device and high power devices usually have a very low HFE1, usually a value around 10 for a 10kW application.
This demands very high currents from the driver to saturate the BJT as an unsaturated device will result in an unwanted high power dissipation most likely to cause failure in the device. The high base current along with a switching speed near the one of the IGBT makes the BJT an unsuitable device for this application.
2.3.2. Free-wheeling-diodes
A Free Wheeling Diode is an electronic component used to avoid damage to switching transistors by reversing load current induction. When switching off an inductive load, the current cannot go to zero in zero time since there is some energy stored in the magnetic field. The coil produces a high voltage large enough to let the current continue to flow over the contact gap, possibly causing permanent damage to the transistor as well as radiating radio waves. The free wheeling diode is connected anti-parallel with the transistor and by doing so it doesn't conduct normally as illustrated in figure 12:
Figure 12: IGBT with FWD
If the coil is switched off, the voltage across the coil reverses to maintain the direction of the current. Now the diode carries the current until the energy is consumed by the inner resistance of the coil and the forward voltage drop of the diode. This dissipated energy in the diode is depending on the forward voltage as well as the switching characteristics of the diode. Because of this, low forward voltage and small stray capacitances are wanted
as well as low reverse recovery time which are characteristics that usually contradict each other. The reverse recovery time is the time taken from forward conduction to blocking in the reverse direction, this time directly causes loss on the circuit.
2.3.2.1. Silicon Schottky
Usually Schottky diodes are used which have very low reverse recovery time, slightly lower forward voltage drop and being much faster (much lower stray capacitance) compared to conventional diodes, although they have low maximum reverse voltage and a relatively high reverse leakage current that also increases with increasing temperature which makes them a bad choice in high voltage and high temperature applications.
2.3.2.2. Silicon Carbide Schottky
Since some ten years back other interesting materials are being researched. Diodes made of Silicon Carbide have proven to have excellent characteristics for high voltage, high frequency and high temperature. The reverse leaking current is up to 40 times less than for a regular Shottky, directly reducing losses, reverse voltage up to 1200 V and extremely low reverse charge as a result of junction capacitance, not stored charge. The setback is high price and a relatively high saturation voltage, introducing increased loss when conducting. By having high thermal conductivity and nearly no thermal runaway also makes the Silicon Carbide the best choice in applications with high temperature. With special packing junction operating temperatures as high as 500 °K (227 °C) is made possible which opens up for a wide range of applications. The reverse recovery loss is usually a significant part of the total switching loss in a hard switched2 IGBT and by almost reducing it to zero great reductions in dissipated effect and heat can be made.
2.3.3. Rectifier
The rectifier forms a direct current from an alternating current, in this application from three phase shifted sources of alternating current. In this case a 6-pulse rectifier model has been chosen due to its simplicity. However, when handling disturbances on the main grid a 12-pulse rectifier bridge is to prefer since it heavily reduces harmonics which otherwise will require large filters. A simulation has been made using Matlab with Simulink where a 6-pulse rectifier is used and the resulting voltage frequency spectrum on the grid is measured, see Appendix C1 and C2. Analogous the same measures are done using a 12-pulse rectifier where it is observed that the noise due to harmonics is significantly lower, see Appendix C4 and C5. The setback of the 12-pulse bridge is the needed high power transformer and an additional 6- pulse bridge, together largely contributing to additional weight. The mean voltage archived on the DC side is calculated as a combination of all the input voltages as seen in equation 2.3.3.1 [12]:
π π 400 2 3 2 3 _ × × = × × = L−L AVE DC V V ≈540 V (2.3.3.1)
This is an average voltage and it will actually oscillate between 490 and 566 volts at the input frequency multiplied by six demanding a filter to provide a fixed voltage. For a 10kW application the maximum DC-bus current will be as large as 18.5A with reservation for the result of the DC-bus filter temporarily capable of supplying more than 18.5A The choice of a rectifier bridge is mainly focused on low energy loss and weight where low energy loss needs less cooling and therefore less weight although in some applications disturbances and harmonics will cause problems and has to be given higher priority. However the weight and size of the rectifier itself has in some cases proven to differ a lot. The ability to withstand heat and to remove this heat should also be taken into consideration, represented by the thermal resistance of the package. The layout of the rectifier diodes can be found in figure 13 (encircled):
2.4. Filters
2.4.1. Input filters
The non-linear nature of the converter with especially its rectifier and the inductive load will form a load on the main grid that is far from ideal3. Noise generated back on the grid is a problem for all the other connected equipment but will also emit RMI if not protected either by shielded wires or an input filter that compensating for this behavior. Usually it exist a lot of regulations concerning how inductive a load can be and how much noise a load can inflict, especially in scenarios where the main supply is weak4 and where it
drives sensitive electronic equipment, such as in an aircraft or other vehicles.
In the scenario covered by this master-thesis a 400 Hz supply is given which implies that it should not contain high magnitude components at other frequencies. Because of this a band-pass filter has to be implemented at the input to reduce the magnitude of unwanted components reflected back to the supply. The components are the fundamental frequency component and its harmonics of order 6 k±15. This periodic order due to the switched
operation of the line commutated rectifier, in this case a three-phase diode bridge. The currents harmonics can further be resolved into sequences according to the following table:
Sequence Harmonics Positive 1,7,13,19,… Negative 5,11,17,23,…
Table 1 : Input current harmonics
Usually it is trivial to filter out these harmonics but the high power application along with the low weight goal makes it difficult to remain within the SOA of all the components.
In figure 14 is the schematic of a simple input filter that attenuates the first two harmonic components of the current as well as a wide range of high frequency noise. More filters can be added to filter out additional harmonics but will add weight and volume to the device. How much attenuation of respective harmonics is demanded is usually set by the environment. In an aircraft there is usually very sensitive equipment on a weak power source increasing the needs for good filtering. Most of the regulations used and followed by SAAB AB are found in MIL-STD-704 produced by the US department of defense [19]. Too some extent high frequency components emitting radio waves can be contained using shielded cables.
3 Ideal is a purely sinusoidal current
4 The source is considered weak if the voltage is reduced significantly when loaded 5 K is any positive integer, which means the orders can be as in table 1
Figure 14 : Input filter
As it is hard to analytically calculate the behavior of currents and voltages in the filter components an iterative approach using extensive simulations is usually taken. This is due to the analytical result being valid only during the steady state and not during start up or shutdown where surge currents will occur. These surge currents can cause failure or reduce lifetime in the filter components and especially in the electrolyte capacitor if not dimensioned properly.
Figure 15 : Typical impedance for input filter vs. harmonics of grid frequency
The amounts of harmonics reflected back from the inverter to the grid is also dependant on the LC-filter between the rectifier and the switching bridge. This because currents through the diodes is dependant on the charging currents of the capacitor which itself is dependant on the choke inductor and the surge limiter. These harmonics are also hard to analytically estimate and a system level simulation is favored. To estimate the harmonics in this converter Matlab with Simulink will be used where the entire converter is modeled and the frequency spectrum on the input is measured. When having the high amplitude harmonics determined a band-stop filter for each undesired harmonic has to be implemented with appropriate attenuations. This frequency spectrum measurement can be seen in Appendix C1 where the harmonics can easily be identified. The maximum allowed disturbance can be found in the MIL-STD-704D military standard document
[19]. In table 2 the larger harmonics in comparison with the maximum allowed levels and the required attenuation can be viewed:
Harmonic # Frequency(hz) Amplitude peak/RMS V Allowed level RMS Attenuation dB
fundamental 400 550/388 - 5 2000 48/34 20 2.3 7 2800 16/11.3 20 - 11 4400 20/14 20 - 13 5200 14/10 16 - 17 7800 8/5.7 12 -
Table 2 : Voltage harmonics on grid
As in table 2 the given voltages arise due to harmonic currents through the source usually represented by a generator the respective current components can be filtered instead. This is carried out as explained in figure 14 with serial RLC circuit connected to next phase or virtual ground. The impedance of the RLC circuit is usually calculated as in 2.4.1.1:
( )
2 1 ⎟2 ⎠ ⎞ ⎜ ⎝ ⎛ − + = C L R RLCZ ω ω ω (2.4.1.1)The RLC impedance is at minimum at the resonance frequency ω=1 LC where it
assumes the value R. This value R limits the current at the filtered frequency preventing it to become unnecessary large. The L and C values can be chosen somewhat arbitrary as long as the resonance frequency is the correct one. The current harmonics can be found in appendix C along with the voltage harmonics.
As seen in table 2 the voltage at the 5th harmonic caused by its respective harmonic current has to be reduced to 59% relying on the filter to consume this excessive current. It is also the only component needed to be individually reduced, the higher frequency components are attenuated with a high-pass filter as illustrated in figure 14. Given the RMS voltage 34 V and the RMS current 2.52 A at the frequency 2000 Hz of which the filter will consume 41 % gives the value of R according to 2.4.1.2:
Ω = × = × = 32.9 41 . 0 52 . 2 34 41 . 0 _ _ rms harmonic rms harmonics I V R (2.4.1.2)
Assuming the value 100µH for the inductor L gives along the resonance frequency 2000 Hz the capacitor C a value of 63 µF. The estimated voltage and current give a power loss of 34W. Although this is per phase and should be multiplied by three when added to the complete system. This has to be done with the components as well, adding weight and space. The combined weight of the 5th harmonic filter per phase is estimated to 120g which gives a total of 360g. The dimension can be seen in the layout sketch, in Appendix F
The high-pass filters are calculated in the same manner but when calculating loss a few more harmonic components are added, although smaller in magnitude. A 10Ω with a 100nF capacitor in series nearly does not interfere with the 5th harmonic filter but filter
higher order harmonics rather effectively. The accumulated power loss is estimated to be about 3 watts per phase which will all be dissipated in the resistor. The estimated weight per phase is 11 g, giving a total of 33g.
Component Filter Ratings Manufacturer
and Model Mass (g) Volume (mm3) Power loss (W) R 5th harmonic 33Ω ARCOL HS 3*31 3*(29x70x15) L 5th harmonic 100μH Pulse L100 3*19 3*(15x25x24) C 5th harmonic 70μF EVOX RIFA PEH200 3*70 3*(35x51) 3*34 R High-pass 10Ω VITROHM KH 3*5 3*(8x8x22)
C High-pass 100nF EVOX RIFA
PHE845
3*7 3*(11x22x26) 3*3
Table 3 : Input filter components
2.4.2. DC-bus filter
2.4.2.1. Capacitor bank
Because of the nature of the rectifier the voltage on the DC-bus will vary with time, but not only because of this but from the pulse shape of the output current as well. Due to this a LC-filter is needed to stabilize the voltage as well as providing a current buffer. The performance of the filter is limited by the weight and cost always wanted to be kept low. As electrolyte capacitors are used the lifetime is limited and estimated using a simple model to assure lifetime long enough according to regulations.
The dimensioning of the components requires some extensive calculations which in detail will be explained in this chapter starting with reviewing the provided parameters.
• Main power grid: 400VAC, 400Hz three-phase, 560VDC maximum • Capacity: 10kW with 10kHz switching frequency
• Full wave bridge rectifier: 400*6 Hz ripple frequency
• Maximum allowed ripple voltage: 3% of average DC-bus voltage i.e. 16 V. • Common MTBF: 5000 hours of flight/operation
Assuming all the energy is stored in the capacitor bank a calculation gives according to the well known formula of the potential energy in a capacitor
2 2 1 V C Ecap = tot× (2.4.2.1.1)
and its extension to fit the actual case.
(
2)
_ 2 _ ( ) 2 1 ripple MAX DC MAX DC tot ripple out t C V V V P × = × − − (2.4.2.1.2)Where Pout is the rated power of the inverter, VDC_MAX is the maximum voltage of the
rectified output, Vripple is the maximum ripple allowed and tripple is the period time of the
ripple. The ripple frequency for a full wave bridge is the main grid frequency multiplied by six. Solving for Ctot in (2.4.2.1.3) with insertion of the proper values gives:
(
5662 (566 16)2)
4,67 10 4 2 1 2400 1 10000× = × − − → = × − tot tot C C = 467 μF (2.4.2.1.3)As very few capacitors exist capable of handling this high voltage and still maintain a large capacitance multiple capacitors has to be connected in series. Although when serial connected a resistor has to be in parallel with each capacitor as explained more in detail later in this chapter. A common way is to use two legs in parallel with two identical serial connected capacitors maintaining the same capacitance as a single one while doubling the maximum voltage. This precaution due to the voltage peaks during start-up when the voltage over the capacitor can rise to a level between 1.4 and 1.8 times normal depending on the size of the choke inductor and the protective circuits. The surge current appear because during start-up the capacitor bank is virtually short circuited and the choke inductor will try to maintain this current, thus inflicting a high voltage transient. The surge current and voltage over-shoot can be reduced or almost eliminated with these protective circuits as illustrated in figure 16. The switch in this case is a high power transistor, most likely an IGBT with a low saturation voltage. As the resistor will initially limit the charge time of the capacitor it will also decrease the over-shoot. The surge limiter can be expanded into several levels reducing the resistance sequentially although many copies of this circuit in series will accumulate a large on-resistance in steady state and therefore add a non negligible loss. However, if connected in parallel they can replace each other instead and will end up with only one transistor in series causing a smaller on-resistance and a lower power loss. When this rather fast switching behavior has occurred it can be relieved by a relay, these are usually much slower but have a much smaller on-resistance than any semiconductor almost eliminating the added loss. A bonus of this circuit is that it limits the converter inrush current significantly from a level that would probably destroy the rectifier to a reasonable current. Simulations of this behavior with and without the surge limiter can be seen in appendix A which is based on a system simulation done in Matlab and Simulink, the circuitry can be found in appendix B.
Figure 16 : Protective circuits: simple, series and parallel connection
Not only does the capacitor require a wide margin for voltage but also for the capacitance where tolerance (±20%) and wear-out (-10% can reduce the capacitance with up to 28% (1-0,8*0,9).
Taking these precautions suggests the Evox Rifa PEH200 electrolyte capacitor with the ratings 400V and 680 µF with an individual weight of 180g. The four combined capacitors get a rating of 800V maximum and still has the same capacitance as a single one but of course weights four times as much i.e. 720g.
A doubling in the rated power of the inverter would result in at least doubling the capacitance required suggesting the 1500 µF version which would weight 430g each increasing the weight of the capacitor bank by at least 140%.
However, the next step would be to calculate the ripple currents from the AC-line and from to the load by first calculating the capacitor charging time with 2.4.2.1.4 [15]:
400 2 566 16 566 arccos 2 arccos _ _ × × ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ − = × × ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ − = π π grid MAX DC ripple MAX DC C f V V V T =94.8 μs (2.4.2.1.4)
Figure 17 : Charge and Discharge time of capacitor bank
With the charge time and the period time of the ripple voltage it is easy to derive the capacitor discharge time as in equation 2.4.2.1.5.
0000948 , 0 24001 − = − = ripple C DC T T T =321.8 μs (2.4.2.1.5)
Based on the change in voltage vs. time (dV/dt), the peak and RMS charge current (the rectifier output current) through each capacitor leg can now be calculated as in equation 2.4.2.1.6 and 2.4.2.1.7. A 39.4 = × = C Cpeak dT dV C I (2.4.2.1.6)
Where C is the capacitance in each leg, which is 2
tot
C due to the serial connection.
A 18.8 2× × = = Cpeak C ripple Crms I T f I (2.4.2.1.7)
In the same manner the peak and RMS discharge currents can be calculated using the discharge time instead as in equation 2.4.2.1.8 and 2.4.2.1.9:
A 11.6 = × = DC DCpeak dT dV C I (2.4.2.1.8) A 10.2 2× × = = DCpeak DC ripple DCrms I T f I (2.4.2.1.9)
With calculations done in equation 14 and 15 the ripple current resulting from the rectification of the grid can now be calculated for each branch of the capacitor bank as in equation 2.4.2.1.10. A 21.4 2 2 + = = Crms DCrms rms I I I (2.4.2.1.10)
Thus, through the whole capacitor bank it flows twice as much since it has two legs adding up to 42.8 A.
The load ripple current for the whole capacitor bank is calculated as in equation 2.4.2.1.11.
(
)
17.92A 2 550 566 10000 2 _ _ _ = ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ + = ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ + − = ripple MAX DC MAX DX rated rms load V V V P I (2.4.2.1.11)Which gives a load current of 8.96 A per leg. The total makeup of the current through the capacitor bank is 17.92 A @ 10 kHz and 42.8 A @ 2400 Hz.
The next thing is to determine the power loss achieved in the capacitor bank and whether it is to large enough to require extensive cooling or a large choke inductor to maintain sufficient lifetime. The power loss can be calculated by somewhat altering the well known formula P = U x I as done in equation 2.4.2.1.12.
ERS I I R I U Ploss = × = × = rms × 2 2 (2.4.2.1.12)
Where the ERS is the equivalent series resistance which can be found in diagrams within the datasheet describing the capacitor. This ESR is strongly dependant on the frequency and the hotspot6 temperature (T
ht) which is typically 20º C warmer than ambient
temperature(Ta) of 70º C [15].
These expected typical values are found to be: ESR(2400Hz) = 13.5 mΩ ESR(10kHz) = 12.5 mΩ
Using the estimated ESR values and the calculated current at each frequency two components of power loss can be estimated for each capacitor, trivially four times this loss would give the total loss of the capacitor bank excluding the choke inductor.
W 6.18 0135 . 0 4 . 21 ) 2400 ( = 2× = Hz Ploss W 1 0125 . 0 96 . 8 ) 10000 ( = 2× = Hz Ploss (2.4.2.1.13)
This gives each capacitor a loss of about 7 W which is dissipated through heat. Whether the capacitor can withstand this produced heat is dependant on the thermal resistance between hotspot and the ambient air as well as the temperature of this ambient air.
A too high temperature at the hotspot will result in a reduced lifetime and this temperature can be calculated with equation 2.4.2.1.14.
C T R P T R T T P ht loss ht a a a ht a ht loss ↔ = × + = × + = ° − = _ 7.18 3.4 70 94.4 _ (2.4.2.1.14) The thermal resistance 3.4ºC/W between the hotspot and the ambience (Rht_a) can be
found in the datasheets under a variety of conditions, this one is without any heatsink or
airflow. As it can be seen the temperature at the hotspot is very close to where the ESR was specified negating the need for further more detailed calculations concerning the loss. However, if this increase in temperature would affect the lifetime too much the choke inductor can be designed to extensively filter the high frequency components. Usually it is just meant for suppressing the high frequent ripple.
Suppose the temperature would be too high and the power loss needed to be reduced. To keep the hotspot temperature at 90 º C 1.3 W is needed to be transferred to the choke inductor as explained in chapter 2.4.2.2.
However, for the intended voltage sharing of the two serial capacitors to work correctly a resistor has to be connected in parallel with each capacitor. The resistance of this resistor is dependent on the capacitor value according to equation 2.4.2.1.15 [15]:
[ ]
F C Rvsr μ × = 015 . 0 1000 =143 kΩ (2.4.2.1.15)As a precaution the power rating of the resistor should be at least 50% higher than estimated and the tolerance should be kept below 5% to prevent failure. The electrical layout is illustrated as in figure 18, the physical layout on the other hand should not be taken to easily as the inductance has to be kept low.
Figure 18 : Electrical layout of capacitor bank
According to the equation for lifetime the capacitor will live for at least 30 kH which is far beyond the limit of 5 kH. The uncertainty is due to few values of expected rate of failure where an average had to be taken. Although in the worst case the lifetime is still enough by far. ( ) ( ) 12 94 85 4 85 2 10 6 2 − − × × = × = C Tht A LOP ≈36000 h (2.4.2.1.16)
Where A is the lifetime at reference temperature and C is the rise in degrees required for cutting the lifetime in half, both of these available from the data sheet.
However, this lifetime can still prove uncertain in avionic applications as the thermal resistance due to convection will increase with altitude resulting in a higher hotspot temperature. The air pressure will also affect the lifetime of the capacitor as the electrolyte degrade faster.
2.4.2.2. Choke inductor
The choke inductor is mainly for reducing the transients capable of causing fatal failure in the capacitor bank. However it can be designed to filter some of the high frequency components of the charge current resulting in transferring the loss from the capacitor to the inductor
Suppose the 94.4 ºC is too high and need to be reduced to 90 ºC, based on previous calculations a reduction of 1.29 W is needed in each capacitor. This combined loss reduction achieved in the four capacitors will be withdrawn from the inbound charge current. A rough estimation for the needed reduction in voltage can be done by using the maximum ripple voltage over the capacitors and the reduction in power as explained by equation 2.4.2.2.1. pk pk initial reduction ripple choke V P P V V = = × =3.34 − 18 . 6 29 . 1 16 (2.4.2.2.1) rms pk pk rms choke V V V 1.58 11 . 2 _ = = − (2.4.2.2.2) The 2.11 factor in (is different than the normal 2× 2 since the voltage is not pure sinusoidal to its form. The remaining fundamental ripple current can be estimated using the new power loss and the ESR of the capacitors as in equation 2.4.2.2.3.
(
)
2 0135 . 0 2 29 . 1 18 . 6 2 _ × × − × = × = branches branch branch loss ripple n ESR P I =38.1 A (2.4.2.2.3)This ripple current is a small reduction from the former value of 39.4 A and now the proper inductance can be calculated as in equation 2.4.2.2.4:
1 . 38 2400 2 58 . 1 2 2 × × × = × × × = → = × × × = π π π I f U L I U L f X ripple ripple L =2.75 μH (2.4.2.2.4)
The power capabilities of the choke inductor are usually done with some empirically established rules actually meant for transformers. However the figures given above are enough to choose an inductor from an arbitrary manufacturer. Consider the DC3-56G from WILCO, it weights approximately 30g each and measures 28 x 21.3 mm, to cover the current two are used in parallel, hence the inductance of 5.6 µH.
Component Ratings Manufacturer and Model Mass (g) Volume (mm3) Power loss (W)
L 5.6μH WILCO DC3-56G 2*30 3*(28x22) 4*1.3 C 680μF EVOX RIFA PEH200 4*180 3*(50x75) 4* 5.9
Table 4 : DC-bus filter components
2.4.2.3. Output filters
If there are long wires between the output of the inverter and the inductive load the stray impedance (usually mostly capacitive) can induce annoying behavior both in the motor and the driving transistors. The long wires would also serve as a good antennae emitting EMI caused by the transistor transients when switching fast. Although, the problem with emitted EMI can be treated with proper shielding of the conducting wire. In the following chapter advantages/disadvantages and guidelines for an approximate design of an output filter is carried out under the assumption that the cable is no longer than 30 meters. Near and above this limit several phenomenons occur such as standing waves due to impedance mismatch between the motor and the cable. Such standing waves can cause serious over voltages and current oscillations too strong to be managed by a LC-filter. Many motor manufacturers have recently published maximum dV/dt ratings for their product, usually around 5 V/ns while the commutation of state of the art transistor can be far above this rating, up to 10 V/ns or even more. Here a mean to reduce dV/dt at the motor terminals are required and such a mean is often a simple LC-filter. It has also been proven that placing the filter near the motor terminals can further improve this misbehavior compared to placing it on the inverters board. However, as the task at hand is to evaluate a complete inverter solution the choice is to have the filter within the inverter unit, this filter will also be designed without any snubber circuits implemented. In figure 20 is an illustration presented where a LC-filter has been added between the output of the transistor-bridge and the motor, although only one phase is represented. The motor has been modeled as a large inductor L2 corresponding to the phase/neutral
winding.
Where V1 represents the DC-bus voltage and the two capacitors represents the
Collector-Emitter-capacitor (Cce) which also plays an important role during commutation.
Obviously the design of the filter is very simple and by assuming Ipeak is the peak motor
current, C1 can be chosen as in equation 2.4.2.3.1.
max 1 / dt dV I C = peak (2.4.2.3.1)
C1 softens the switching from the IGBTs so that the maximum dV/dt at the motor
terminals is kept within limits supplied by the manufacturer or the EMI specifications are met. However, C1 cannot be left alone as there would run very large current peaks
through the IGBT leg during turn most likely to trigger the over-current protection handled by the controlling circuit. This is where the inductor L1 comes in to block this
high charge current and the dimensioning of the inductor will be such that current peaks in the IGBT (or C1) does not trigger the over-current protection, at least. The over-current
protection is dimensioned in advance with respect to the switching devices and their current handling capabilities. As so far this is a simple LC circuit and it is driven by very high dV/dt it will soon start go generate oscillations higher than the DC-bus voltage which is far from what the filter components and the motor are designed for. A damping resistor in series with the capacitor would suppress this behavior and in addition removing un-useful power dissipation otherwise dissipated in the capacitor. When this L1
is involved the expression in equation 23 is obsolete due to the resonance between L1 and
C1. Thus the actual dV/dt will also be determined by L1 giving a new expression as
follows by equation 2.4.2.3.2 for the initial dV/dt:
1 1 C L V dt dV DC × = (2.4.2.3.2)
The value of L1 will be designed taking into account that each IGBT sees the phase
current of the motor, the recovery current of the opposite recovery diode and the peak current of the filter. Although a fourth component could exist if the commutation causes cross talk but it is not very common due to very potent controlling circuits and drivers. After considering over-current limits and the peak recovery current the allowed peak current contribution of the output filter can be determined. Excluding the damping resistor R2 the current through the filter can be calculated as in equation 2.4.2.3.3 where
the ZC is the characteristic impedance of the filter as determined in equation 2.4.2.3.4.
C DC filter Z V I _max = (2.4.2.3.3) 1 1 C L ZC = (2.4.2.3.4)
But as explained earlier the damping cannot be zero and thus the effect of R2 has to be
considered. Critically damping is achieved when R2 is equal to ZC but a lower value
could be chosen due to C8 and C9. Suppose R2 is chosen to ZC, then the current peak in
the IGBTs due to the output filter would be as determined in equation 2.4.2.3.5:
C DC filter Z V I × = 2 max _ (2.4.2.3.5)
As current limiting is not the only constraint for L1 it also has to be designed to ensure enough build-up voltage in the motor’s coils during a very low duty cycle [19]. The minimum duty cycle time should at least be twice as long as the resonance cycle caused by the LC circuit. Neglecting the damping caused by R2 and adding some margins instead
gives the proper value of L1 as in equation 2.4.2.3.6 assuming the minimum turn-on time
is known. min _ 1 1 C Ton L × ≤ × π (2.4.2.3.6)
Combining the 2.4.2.3.2 and 2.4.2.3.6 an expression for the maximum dV/dt related to VDC and the minimum turn-on time is achieved by equation 2.4.2.3.7.
min _ on DC T V dt dV = ×π (2.4.2.3.7)
The result achieved in 2.4.2.3.7 seems highly logical as it would require a shorter turn-on time to get a higher dV/dt. This overall gain in less EMI and enough slow dV/dt for the motor does not come without loss, both in more weight and in more direct power loss. The loss is dissipated in the damping resistor and cannot be neglected, in the case of R2
being equal to ZC the power loss can be estimated as in equation 2.4.2.3.8 [19]:
sw on DC loss filter output T f R V P × × × = _min 2 2 _ _ 4 (2.4.2.3.8)
Applying the above given theory to the specific case examined in this paper gives some guidelines for values and physical size of the filter components. As they should be applied to each phase conductor pf course three of each has to be included.
Assuming as before the maximum dV/dt for the motor is the common 5V/ns and in the data sheet for the IRG4PSH71UD it can be found that the typical dV/dt is 30 V/ns which is much too fast. As the peak voltage through the IGBT is 20.5A ( 2×14.5) the value of C1 can be calculated using 2.4.2.3.1, which gives the value 4.1nF. According to 2.4.2.3.7
the Ton_min is 350 ns which along with equation 2.4.2.3.6 gives the value for L1, 3μH. As
the characteristic impedance ZC is calculated as in equation 2.4.2.3.4 it receives the value
27Ω which is also the minimum value of R2, actually R2 can be chosen a bit larger to
maximum current due to opposite diode reverse recovery is 20.5 A and the maximum current through the filter being according to 2.4.2.3.4 (if R2 = ZC) 10 A. This along with
the well known maximum current through and IGBT gives a maximum current of 51 A, this is what the over-current protection level should be set to. The power loss mainly dissipated in the resistor is calculated using equation 33 and is estimated to be 10 W. Yet again, this is for only one phase and the loss and weight of components has to be tripled to make up the actual figures. When of-the-shelf products are considered the weight estimated to be 60g for L1, 6g for C1 and 7g for R2 adding up to73g per phase.
Filter component
Value Manufacturer and model
Mass(g) Dimensions Power loss
R 27 Ω ARCOL HS 3*7 3*(30x10x10) 3*10
L 3 μH Pulse L100 3*60 3*(50x40x36) -
C 4.1 nF EVOX RIFA
PHE845
3*5.2 3*(6x14.5x26) -
2.5. Snubber
circuits
The main cause of implementing snubber circuits is to make sure the switching power components remain within their safe-operating-area (SOA) both at turn-on and turn-off. This is very important to ensure the longevity of the devices as well as reducing the amounts of EMI emitted from the high power components. When introducing a snubber it is not uncommon to be able to reduce switching losses in the switching devices, in particular the turn-on switching loss. However, in general the losses removed from the transistor are transferred to the snubber circuits instead while these components are usually less sensitive to voltage spikes and are able to perform satisfactory in a wider temperature span. As there are numerous variants of snubber circuits for different purposes only the ones estimated to prove suitable will be presented below along with their corresponding advantages and disadvantages. The simulations carried out are done using Cadence Pspice Student Edition, the circuits can be viewed in Appendix E. Although the simulations will not be used very much for estimating good snubber circuits to obtain reduced power loss as much as ensuring longevity to the switching devices.
2.5.1. Increased SOA
Due to the non avoidable stray inductance in the DC-bus loop in addition to the internal stray inductances in most of the components causes along with the very fast current switching of modern semiconductors a large voltage over-shoot when switched off. To some extent there is an over-shoot during turn-on as well but not nearly as large. The faster switching and larger stray inductance the larger voltage over-shoot. The easiest and least complex method to manage this over-shoot is to compensate for the stray inductance in the DC-bus loop by connecting a small, fast and low inductance capacitor as close to the IGBT terminals as possible as shown in figure 20 (left). Actually increasing the gate resistor to slow down the switching process would work as well but switching losses would rise according to it.
Figure 20 : Decoupling and restricted decoupling capacitor
There are capacitors manufactured for this purpose with very low self inductance and designated connections to properly fit the concerned IGBT module. However when using discrete components this gets harder as the components are separated which also causes higher stray inductances. As the separation is one of the causes of choosing discrete
