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(1)Examensarbete LITH-ITN-ED-EX--04/030--SE. Design and implementation of a 5GHz radio front-end module Anders Backström Mats Ågesjö 2004-10-29. Department of Science and Technology Linköpings Universitet SE-601 74 Norrköping, Sweden. Institutionen för teknik och naturvetenskap Linköpings Universitet 601 74 Norrköping.

(2) LITH-ITN-ED-EX--04/030--SE. Design and implementation of a 5GHz radio front-end module Examensarbete utfört i elektronikdesign vid Linköpings Tekniska Högskola, Campus Norrköping. Anders Backström Mats Ågesjö Handledare Shaofang Gong Examinator Shaofang Gong Norrköping 2004-10-29.

(3) Datum Date. Avdelning, Institution Division, Department Institutionen för teknik och naturvetenskap. 2004-10-29. Department of Science and Technology. Språk Language. Rapporttyp Report category. Svenska/Swedish x Engelska/English. Examensarbete B-uppsats C-uppsats x D-uppsats. ISBN _____________________________________________________ ISRN LITH-ITN-ED-EX--04/030--SE _________________________________________________________________ Serietitel och serienummer ISSN Title of series, numbering ___________________________________. _ ________________ _ ________________. URL för elektronisk version http://www.ep.liu.se/exjobb/itn/2004/ed/030/. Titel Title. Design and implementation of a 5GHz radio front-end module. Författare Author. Anders Backström, Mats Ågesjö. Sammanfattning Abstract The overall. goal of this diploma work is to produce a design of a 5 GHz radio front-end using Agilent Advanced Design System (ADS) and then build a working prototype. Using this prototype to determine if RF circuits at 5 GHz can be successfully produced using distributed components on a laminate substrate. The design process for the radio front-end consists of two stages. In the rst stage the distributed components are designed and simulated, and in the second stage all components are merged into a PCB. This PCB is then manufactured and assembled. All measurements on the radio front-end and the test components are made using a network analyser, in order to measure the S-parameters. This diploma work has resulted in a functional design and prototype, which has proved that designing systems for 5 GHz on a laminate substrate is possible but by no means trivial.. Nyckelord Keyword. Distributed components, LNA, RF choke, Radio front-end, Rogers 4350, ADS, Rohde&Schwarz, Matching Network, RF-elektronik.

(4) Upphovsrätt Detta dokument hålls tillgängligt på Internet – eller dess framtida ersättare – under en längre tid från publiceringsdatum under förutsättning att inga extraordinära omständigheter uppstår. Tillgång till dokumentet innebär tillstånd för var och en att läsa, ladda ner, skriva ut enstaka kopior för enskilt bruk och att använda det oförändrat för ickekommersiell forskning och för undervisning. Överföring av upphovsrätten vid en senare tidpunkt kan inte upphäva detta tillstånd. All annan användning av dokumentet kräver upphovsmannens medgivande. För att garantera äktheten, säkerheten och tillgängligheten finns det lösningar av teknisk och administrativ art. Upphovsmannens ideella rätt innefattar rätt att bli nämnd som upphovsman i den omfattning som god sed kräver vid användning av dokumentet på ovan beskrivna sätt samt skydd mot att dokumentet ändras eller presenteras i sådan form eller i sådant sammanhang som är kränkande för upphovsmannens litterära eller konstnärliga anseende eller egenart. För ytterligare information om Linköping University Electronic Press se förlagets hemsida http://www.ep.liu.se/ Copyright The publishers will keep this document online on the Internet - or its possible replacement - for a considerable time from the date of publication barring exceptional circumstances. The online availability of the document implies a permanent permission for anyone to read, to download, to print out single copies for your own use and to use it unchanged for any non-commercial research and educational purpose. Subsequent transfers of copyright cannot revoke this permission. All other uses of the document are conditional on the consent of the copyright owner. The publisher has taken technical and administrative measures to assure authenticity, security and accessibility. According to intellectual property law the author has the right to be mentioned when his/her work is accessed as described above and to be protected against infringement. For additional information about the Linköping University Electronic Press and its procedures for publication and for assurance of document integrity, please refer to its WWW home page: http://www.ep.liu.se/. © Anders Backström, Mats Ågesjö.

(5) Design and implementation of a 5 GHz radio front-end module. Anders Backström Mats Ågesjö 9th November 2004.

(6) Preface This report is the result of a Master Thesis work done at the Department of Science and Technology (ITN) of Linköpings University. The report is the nal step towards a Master of Science exam in Electronics Design Engineering at the University of Linköping, Campus Norrköping. Special thanks are dedicated to Toshiba and Maxim for their contribution of components. Our thanks go to Prof. Johan Liu, Dr. Zonghe Lai and Gang Zou at the Industrial Research and Development Corporation (IVF) in Gothenburg, Sweden, for the help when assembling ip-chip components. Thanks also go to Patrick Blomqvist at Acreo for the use of their heat plate, and to Andreas Larsson at Elektrotryck for the help with the routing of the PCBs. We also thank Professor Shaofang Gong, Adriana Serban, Magnus Karlsson and Alan Huynh at ITN for useful discussions and suggestions during the project.. I.

(7) Abstract The overall goal of this diploma work is to produce a design of a 5 GHz radio frontend using Agilent Advanced Design System (ADS) and then build a working prototype. Using this prototype to determine if RF circuits at 5 GHz can be successfully produced using distributed components on a laminate substrate. The design process for the radio front-end consists of two stages. In the rst stage the distributed components are designed and simulated, and in the second stage all components are merged into a PCB. This PCB is then manufactured and assembled. All measurements on the radio front-end and the test components are made using a network analyser, in order to measure the S-parameters. This diploma work has resulted in a functional design and prototype, which has proved that designing systems for 5 GHz on a laminate substrate is possible but by no means trivial.. II.

(8) Sammanfattning Det övergripande målet för det här examensarbetet är att skapa en design av en 5 GHz radio front-end med hjälp av Agilent Advanced Design System (ADS) och att bygga en fungerande prototyp. Prototypen används sedan för att avgöra om RF kretsar som använder distribuerade komponenter kan tillverkas på laminerade substrat vid 5 GHz med goda resultat. Designförloppet av radio front-end modulen utförs i två steg. I det första steget konstrueras och simuleras de distribuerade komponenterna och i det andra steget sammanfogas komponenterna till en komplett kretskortsdesign. Sedan tillverkas kretskortet och komponenterna monteras. Alla mätningar på radio front-end modulen och test komponenterna utförs med en nätverksanalysator, för att kunna mäta S-parametrarna. Det här examensarbetet har resulterat i en användbar design och en fungerande prototyp, vilket visar att konstruktion av RF kretsar på laminerade substrat vid 5 GHz är möjligt men på inget sätt trivialt.. III.

(9) Contents Terminology 1. Introduction. 2. RF Theory. 3. Design Process. 4. Implementation. 1.1 1.2 1.3 1.4. Background Goal . . . . Method . . Outline . . .. X. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. 1. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. 2.1 General RF Theory . . . . . . . . 2.1.1 Transmission lines . . . . 2.1.2 Lossless transmission line . 2.1.3 S-Parameters . . . . . . . 2.2 Distributed Components . . . . . 2.3 Low Noise and Power Ampliers . 2.3.1 Stability . . . . . . . . . . 2.3.2 Gain . . . . . . . . . . . . 2.3.3 Noise . . . . . . . . . . . . 2.4 Substrate . . . . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . 3 . 3 . 5 . 6 . 8 . 8 . 8 . 9 . 10 . 12. 3.1 Design Overview . . . . . . . 3.1.1 Design Specication . 3.2 Components . . . . . . . . . . 3.2.1 Switch . . . . . . . . . 3.2.2 Filter . . . . . . . . . . 3.2.3 Balun . . . . . . . . . 3.2.4 RF Choke . . . . . . . 3.2.5 LNA . . . . . . . . . . 3.2.6 PA . . . . . . . . . . . 3.3 Printed Circuit Board Layout. . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. . . . . . . . . . .. 1 1 1 1. 3. . . . . . . . . . .. 13. 13 14 15 15 19 21 22 23 27 28. 30. 4.1 PCB Manufacturing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 4.2 Assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30. IV.

(10) 5. Measurement Setup. 31. 6. Results. 7. Discussions. 53. 8. Conclusions. 57. 9. Further work. 58. 5.1 Initial meas. problems . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 6.1 Component Measurements . . . 6.1.1 Switch . . . . . . . . . . 6.1.2 Filter . . . . . . . . . . . 6.1.3 Balun . . . . . . . . . . 6.1.4 RF Choke . . . . . . . . 6.1.5 LNA . . . . . . . . . . . 6.1.6 PA . . . . . . . . . . . . 6.2 Radio Front-End Measurements. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. 33. 33 33 36 37 40 40 44 46. Bibliography. 59. A Tools. 60. B. PCB Layout. 63. C. Schematics. 65. D Additional simulations and measurements. V. 67.

(11) List of Figures 2.1 2.2 2.3 2.4. Lumped-element model of a transmission line splited into a ∆z-long section Transmission line terminated with a load impedance ZL . . . . . . . . . . Two port network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Stability, Gain and Noise circles in Smith Chart . . . . . . . . . . . . . .. 4 6 7 11. 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 3.20 3.21 3.22 3.23 3.24 3.25 3.26 3.27 3.28 3.29 3.30 3.31 3.32. Schematic representation of radio front-end . . . . . . . . . . . . . . . . . Switch overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Signal path in Case 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Signal path in Case2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S21 in Case1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S21 in Case2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PIN-Diode Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Schematic representation of the Switch in ADS . . . . . . . . . . . . . . . Layout representation of the Switch in ADS . . . . . . . . . . . . . . . . Layout Component in Schematic . . . . . . . . . . . . . . . . . . . . . . Fourth-order bandpass lter of coupled-line and hairpin coupled-line type Coupled section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Simulation comparison between schematic and layout . . . . . . . . . . . Final lter dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . Dierent balun types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF choke . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF choke dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . S2P block in ADS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Rolett factor for unstabilised LNA . . . . . . . . . . . . . . . . . . . . . . Footprint of LNA and resistor pads . . . . . . . . . . . . . . . . . . . . . LNA input matching network . . . . . . . . . . . . . . . . . . . . . . . . LNA IMN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . LNA OMN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Matched LNA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PA IMN in Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . PA OMN in Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . PA IMN in Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PA OMN in Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SMD pad Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . LNA Footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PA Footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PCB layer denitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 14 15 16 16 17 17 17 18 18 19 19 20 20 20 21 22 23 23 24 25 25 26 26 26 27 27 27 27 28 28 28 29. VI.

(12) 5.1 Rohde&Schwarz network analyser . . . . . . . . . . . . . . . . . . . . . . 31 5.2 SMA-connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.3 SMA soldered to the edge of the PCB . . . . . . . . . . . . . . . . . . . . 32 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 6.11 6.12 6.13 6.14 6.15 6.16 6.17 6.18 6.19 6.20 6.21 6.22 6.23 6.24 6.25 6.26 6.27 6.28 6.29 6.30 6.31 6.32 6.33 6.34 6.35 6.36 6.37 6.38 6.39 6.40 6.41 6.42. Switch test component . . . . . . . . . . . . . . . . . . . Simulated S21 and S31 . . . . . . . . . . . . . . . . . . . Measured S21 . . . . . . . . . . . . . . . . . . . . . . . . Measured S31 . . . . . . . . . . . . . . . . . . . . . . . . Simulated S21 and S31 . . . . . . . . . . . . . . . . . . . Measured S21 . . . . . . . . . . . . . . . . . . . . . . . . Measured S31 . . . . . . . . . . . . . . . . . . . . . . . . Simulated lter . . . . . . . . . . . . . . . . . . . . . . . Measured lter . . . . . . . . . . . . . . . . . . . . . . . Balun test components type 1 (top) and type 2 (bottom) Simulated S21 and S31 for type1 . . . . . . . . . . . . . . Measured S21 for type1 . . . . . . . . . . . . . . . . . . . Measured S31 for type1 . . . . . . . . . . . . . . . . . . . Simulated S21 and S31 for type2 . . . . . . . . . . . . . . Measured S21 for type2 . . . . . . . . . . . . . . . . . . . Measured S31 for type2 . . . . . . . . . . . . . . . . . . . Simulated and measured S21 . . . . . . . . . . . . . . . . RF choke test component . . . . . . . . . . . . . . . . . LNA test component . . . . . . . . . . . . . . . . . . . . Simulated S21 . . . . . . . . . . . . . . . . . . . . . . . . Measured S21 at 3V . . . . . . . . . . . . . . . . . . . . Measured S21 at 2.2V . . . . . . . . . . . . . . . . . . . Measured S11 at 3V . . . . . . . . . . . . . . . . . . . . Measured S11 at 2.2V . . . . . . . . . . . . . . . . . . . Simulated S11 . . . . . . . . . . . . . . . . . . . . . . . . Measured S22 at 3V . . . . . . . . . . . . . . . . . . . . Measured S22 at 2.2V . . . . . . . . . . . . . . . . . . . Simulated S22 . . . . . . . . . . . . . . . . . . . . . . . . PA test component . . . . . . . . . . . . . . . . . . . . . Measurement S21 at 1.5V bias . . . . . . . . . . . . . . . Measurement S21 at 1.9V bias . . . . . . . . . . . . . . . Measurement S11 at 1.5V bias . . . . . . . . . . . . . . . Measurement S11 at 1.9V bias . . . . . . . . . . . . . . . Measurement S22 at 1.5V bias . . . . . . . . . . . . . . . Measurement S22 at 1.9V bias . . . . . . . . . . . . . . . Simulation Rx S21 & S31 . . . . . . . . . . . . . . . . . . Measurement Rx S21 . . . . . . . . . . . . . . . . . . . . Measurement Rx S31 . . . . . . . . . . . . . . . . . . . . Simulation Rx S11 . . . . . . . . . . . . . . . . . . . . . Measurement Rx S11 . . . . . . . . . . . . . . . . . . . . Simulation Rx S22 . . . . . . . . . . . . . . . . . . . . . Measurement Rx S22 . . . . . . . . . . . . . . . . . . . . VII. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 33 34 34 34 35 35 35 36 36 37 37 37 37 38 38 38 40 40 41 41 41 41 42 42 42 43 43 43 44 44 44 45 45 45 45 46 47 47 48 48 49 49.

(13) 6.43 6.44 6.45 6.46 6.47. Simulation Rx S33 . Measurement Rx S33 Measurement Tx S21 Measurement Tx S11 Measurement Tx S22. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. . . . . .. 50 50 51 52 52. 7.1 7.2 7.3 7.4 7.5 7.6. Substrate model comparison in simulation . . . . . . . . . Simulated large pad . . . . . . . . . . . . . . . . . . . . . . Measured large pad . . . . . . . . . . . . . . . . . . . . . . Simulated small pad . . . . . . . . . . . . . . . . . . . . . Measured small pad . . . . . . . . . . . . . . . . . . . . . . S21 measured on a transmission line with SMA-connectors. . . . . . .. . . . . . .. . . . . . .. . . . . . .. . . . . . .. . . . . . .. . . . . . .. . . . . . .. 54 55 55 55 55 56. A.1 Calculate transmissionlines using LineCalc in ADS . . . . . . . . . . . . . 60 A.2 Select source impedance in Smith Chart . . . . . . . . . . . . . . . . . . 61 A.3 Smith Chart tool in ADS . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 B.1 B.2 B.3 B.4 B.5 B.6 B.7 B.8. Signal Path . . . . . . Adjusted Signal Path . DC Trace . . . . . . . Ground Plane . . . . . Decoupling Capacitors Shutdown Circuit . . . Bias Circuit . . . . . . Power Determination .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. 63 63 63 63 64 64 64 64. C.1 Schematic of the LNA test PCB . . . . . . . . . . . . . . . . . . . . . . . 65 C.2 Schematic of the PA test PCB . . . . . . . . . . . . . . . . . . . . . . . . 66 D.1 D.2 D.3 D.4 D.5 D.6 D.7 D.8. Simulation of front-end Rx S21 with soldermask model Measured front-end Rx S21 . . . . . . . . . . . . . . . Simulated switch S21 & S31, new PIN diode model . . Measured switch S21 . . . . . . . . . . . . . . . . . . . Measured switch S31 . . . . . . . . . . . . . . . . . . . Simulated switch S21 & S31, new PIN diode model . . Measured switch S21 . . . . . . . . . . . . . . . . . . . Measured switch S31 . . . . . . . . . . . . . . . . . . .. VIII. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. . . . . . . . .. 67 68 68 69 69 70 70 71.

(14) List of Tables 3.1 3.2 3.3 3.4. Main Design Specications . Substrate Properties . . . . Amplier Properties . . . . Stabilising LNA at 5.25 GHz. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. . . . .. 14 14 15 24. 6.1 6.2 6.3 6.4 6.5 6.6 6.7. Balun attenuation . . . . . . . . . Balun phaseshift in degrees . . . . LNA S21 at key frequencies . . . . LNA S11 at key frequencies . . . . LNA S22 at key frequencies . . . . PA s-parameter values at 1.5 V bias PA s-parameter values at 1.9 V bias. . . . . . . .. . . . . . . .. . . . . . . .. . . . . . . .. . . . . . . .. . . . . . . .. . . . . . . .. . . . . . . .. . . . . . . .. . . . . . . .. . . . . . . .. . . . . . . .. . . . . . . .. . . . . . . .. . . . . . . .. . . . . . . .. . . . . . . .. . . . . . . .. . . . . . . .. . . . . . . .. . . . . . . .. 38 39 41 42 43 45 45. 7.1 Soldermask properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53. IX.

(15) Terminology Abbreviation ADS Balun EM IMN LNA NF OMN PA PCB RF RX SMD TX UCSP VSWR WLAN Z0 ZL λ/2 λ/4. Explanation Advanced Design System. Simulation tool Balanced to unbalanced Electromagnetic Input Matching Network Low Noise Amplier Noise Figure Output Matching Network Power Amplier Printed Circuit Board Radio Frequency Receiver Surfaced Mounted Device Transmitter Micro chip-scale package Voltage Standing Wave Ratio Wireless Local Area Network Characteristic line impedance Load impedance Half wavelength Quarter wavelength. X.

(16) Chapter 1 Introduction 1.1 Background Wireless communication, emphasising on wireless local area networking in this project, is growing rapidly. Increasing number of users requires more bandwidth and thus higher frequency. The 5 GHz band is nothing new but it brings new problems for implementation on laminated substrates. It is therefore of interest to study how a circuit using distributed components behaves at 5 GHz.. 1.2 Goal The overall goal of this project is to produce a design using Agilent ADS and then build a working prototype. Using this prototype to determine if RF circuits at 5 GHz can be successfully produced using distributed components on a laminate substrate. A side goal for this project is to learn to use Agilent ADS as it is a very powerful design tool for RF applications.. 1.3 Method Information on the radio front-end and its components is obtained from literature and the internet. Agilent ADS is used to make the entire design, from initial simulations to the nal layout. The design process is mainly carried out in three steps, Schematic, Layout and nally Schematic representation using Layout Components. Measurements are made using a Rohde&Schwarz Vector Network Analyser.. 1.4 Outline This report is organised in several sections. To give readers an overview of the report these sections will be introduced.. 1.

(17) 1.4.. OUTLINE. CHAPTER 1.. INTRODUCTION. • Chapter 2 consists of RF theory. This is an introduction to the general concept. of RF design, how distributed components work and how to use ampliers in RF applications. There is also a subsection on the ROGERS 4350B substrate.. • Chapter 3 covers the entire design process from project specication, reference. design and components to complete radio front-end design and Layout.. • Chapter 4 describes the implementation of the 5 GHz radio front-end design. • Chapter 5 describes the measurment setup, and initial measurment problems. • Chapter 6 displays the simulated and measured results for the 5 GHz radio front-. end and the components.. • Chapter 7 contains the discussions regarding the results obtained by this project. • Chapter 8 contains the conclusions that can be drawn by the obtained results. • Chapter 9 gives suggestions on future work in this area.. 2.

(18) Chapter 2 RF Theory This chapter is intended to give some basic understanding of RF theory and design. For more comprehensive knowledge please see the books listed in the bibliography.. 2.1 General RF Theory [1][2] Dealing with low frequency AC and DC circuits, conventional Kircho's voltage and current laws are used as analysis tools. Heading into higher operating frequencies those laws can no longer be applied without losing too much precision. Analysing a low frequency circuit, a conductor between two elements always assumes to have the same potential regardless where on the conductor one looks. When it comes to higher frequencies than around 500 MHz the previous assumption may no longer be correct. The reason for this is that the wavelength of the signal becomes so small that voltage and current will propagate as waves and therefore magnitude and phase vary along the conductor. Instead of using Kircho's laws one must deal with electromagnetic waves and issues like propagation constant β , phase velocity vp and skin depth δ become important. The propagation constant and phase velocity highly depend on the medium surrounding the conductor and they will determine the wavelength for a specic frequency. Since the surrounding medium is a crucial design parameter, choosing a good substrate is one of the rst design steps in RF-design. Skin eect is a consequence that also occurs due to the electromagnetic wave nature and this eect forces the majority of the energy to ow close to the surface of the conductor. Penetration of the signal into the conductor is measured in skin depth δ . When the energy is focused in just a few percent of the conductor the result is a decrease in eective cross-sectional area. As a consequence, loss due to higher resistance will occur. Changing the copper thickness will have little eect on trace resistance at high frequencies, while changes in width and length will have the greatest eect on resistance at high frequencies.. 2.1.1 Transmission lines In RF circuit design transmission lines are used due to their good behaviour at high frequencies. Transmission lines are nothing more than conductors with a known distance to a ground reference. Examples of transmission lines are Two-Wire lines, coaxial lines 3.

(19) 2.1.. GENERAL RF THEORY. CHAPTER 2.. RF THEORY. and microstrip lines. Within these lines voltage and current propagate as waves and hence magnitude and phase vary over its length. Since Kircho's voltage and current laws do not take those spatial variations on transmission lines into account they cannot be used straight ahead. By breaking down a transmission line into small (in the limit innitesimally small) segments, Kirchos's laws can still be applied.. Figure 2.1: Lumped-element model of a transmission line splited into a ∆z-long section In the schematicall representation of the innitesimal transmission line, the values R, L, G and C are the resistance, inductance, conduction and capacitance per unit length, respectively. Kircho's laws can now be applied to the lumped element circuit in gure 2.1, leading to the following equations: ∂i(z, t) − v(z + ∆z, t) = 0 ∂t ∂v(z + ∆z, t) i(z, t) − G∆zv(z + ∆z, t) − C∆z − i(z + ∆z, t) = 0 ∂t. v(z, t) − R∆zi(z, t) − L∆z. (2.1a) (2.1b). Dividing equation 2.1a and 2.1b by ∆z and taking the limits as ∆z → 0, following equations appear: ∂v(z, t) ∂i(z, t) = −Ri(z, t) − L ∂z ∂t ∂i(z, t) ∂v(z, t) = −Gv(z, t) − C ∂z ∂t. (2.2a) (2.2b). With sinusoidal steady-state condition only propagation in z-direction can be observed, and therefore equations 2.2a and 2.2b are simplied to: dV (z) = −(R + jωL)I(z) dz. (2.3a). dI(z) = −(G + jωC)V (z) dz. (2.3b) 4.

(20) 2.1.. GENERAL RF THEORY. CHAPTER 2.. RF THEORY. Wave equations for V (z) and I(z) are found by solving equations 2.3a and 2.3b: d2 V (z) − γ 2 V (z) = 0 2 dz. (2.4a). d2 I(z) − γ 2 I(z) = 0 2 dz. (2.4b). Where γ = (R + jωL)(G + jωC) and is called the complex propagation constant and is a function of frequency. Solution for equation 2.4a and 2.4b can be found and written as: p. V (z) = V0+ e−jγz + V0− ejγz. (2.5a). I(z) = I0+ e−jγz + I0− ejγz. (2.5b). The term e−jγz represents wave propagation in positive z-direction, and ejγz represent wave propagation in the negative z-direction. The following relation is recieved when combining equation 2.3 and 2.4. I(z) =. γ V (z) R + jωL. (2.6). Which gives the characteristics impedance: V (z) Z0 = = I(z). s. R + jωL G + jωC. (2.7). Z0 is not a function of the propagation waveform, the length of the conductor or time. It is a function of the model parameters only and may therefore easily be modied by adjusting the conductor dimensions and distance to the ground plane, which change the inductance and capacitance per unit length of the conductor. At higher frequencies the conductive and resistive terms become insignicant compered to the inductive and capacitive terms. By neglecting the conductive and resistive terms characteristic impedance can be written as: r Z0 =. L ,which is a constant. C. (2.8). 2.1.2 Lossless transmission line In equation 2.8 the conductor is lossless and the ratio between voltage and current is constant. Terminating the transmission line shown in gure 2.2 with a load impedance ZL 6= Z0 will change the ratio. If an incident wave has the form V0+ e−jβz and is generated √ from a source at z < 0 where β = ω LC , when the wave hits ZL some part of the wave 5.

(21) 2.1.. GENERAL RF THEORY. CHAPTER 2.. RF THEORY. Figure 2.2: Transmission line terminated with a load impedance ZL will pass through and the other part reects back. The total current or voltage on the transmission line is equal to the sum of incident and reected waves, se equation 2.9. V (z) = V0+ e−jβz + V0− ejβz. (2.9a). I(z) = I0+ e−jβz + I0− ejβz. (2.9b). Where. V0+ −V0− = Z = 0 I0+ I0−. (2.10). At z = 0 the ratio between voltage and current is: ZL =. V + + V0− V (z) = 0+ Z0 I(z) V0 − V0−. (2.11). Ratio of the voltage amplitude between the reected and incident wave is known as the voltage reection coecient Γ and is dened as: Γ=. V0− Z L − Z0 + = Z L + Z0 V0. (2.12). If Γ = 0 there is no reected wave. This can be obtained if the load impedance ZL is equal to the characteristic impedance Z0 , see equation 2.12. In that case the load impedance ZL is matched to the line since there is no reection of the incident wave.. 2.1.3 S-Parameters Scattering parameter or more commonly referred as S-parameter representation plays an important role in RF systems regarding measurement and technical documentation. This importance is due to the fact that normal system characterisations like openor short-circuit measurements can no longer be accomplished as it is done in a lowfrequency application. Measurement methods for low-frequency systems usually strive 6.

(22) 2.1.. GENERAL RF THEORY. CHAPTER 2.. RF THEORY. to measure the total voltage or current as a function of frequency. At high frequencies good measurement results using these methods are very hard to achieve. Instead the S-parameters were developed, which are dened as the ratio of normalised power waves and are easier to measure.. Figure 2.3: Two port network Figure 2.3 shows two dierent two port representations, the left one shows the denition for voltage and current and the right one shows the normalised incident power wave an and normalised reected power wave bn . The normalised power waves are dened as follows: a1 =. V1 + Z0 I1 voltage wave incident on port 1 √ √ = 2 Z0 Z0. (2.13). a2 =. voltage wave incident on port 2 V2 + Z0 I2 √ √ = 2 Z0 Z0. (2.14). b1 =. V1 + Z0 I1 voltage wave reected from port 1 √ √ = 2 Z0 Z0. (2.15). b2 =. V2 + Z0 I2 voltage wave reected from port 2 √ √ = 2 Z0 Z0. (2.16). Where Z0 is the characteristic impedance of the two-port network. S-parameters are determined by measuring the magnitude and the phase of the incident, reected and transmitted voltage waves. Depending on which port that is terminated dierent Sparameters for a two-port network can be found. S11.

(23) b1

(24)

(25) =

(26) a1 a2 =0. S21.

(27) b2

(28)

(29) =

(30) a1 a2 =0. S22.

(31) b2

(32)

(33) =

(34) a2 a1 =0. S12.

(35) b1

(36)

(37) =

(38) a2 a1 =0. (2.17). Conditions a1 = 0 and a2 = 0 mean that no power waves are returned to the network at either port 1 or port 2. This can only be accomplished when the connected transmission lines are terminated into their characteristic impedance. To clarify the meaning of S-parameters it can be said that S11 and S22 specify how much of the incident signal is reected at port 1 and port 2, respectively. S21 and S12 specify how much of the incident wave that pass through the device from port 1 to port 2 and from port 2 to port 1, respectively. 7.

(39) 2.2.. DISTRIBUTED COMPONENTS. CHAPTER 2.. RF THEORY. 2.2 Distributed Components Design of RF circuits can be made using lumped elements of inductors and capacitors or use distributed elements, i.e., transmission lines. Both techniques have their advantages and drawbacks. Lumped elements are quit small and an RF-component can be implemented in a small area. An Drawback with lumped elements is that at a high frequency when their size is no longer much smaller than the wavelength, characteristics other than the desired will occur. With distributed elements the drawback is that the size depends on frequency. Lower frequencies have longer wavelength than higher frequencies. For a distributed RF-component the size often becomes too large to be implemented in a real useful application. However nowadays when more applications are using high frequencies, the large size issue becomes less of a problem. Another drawback is that good substrates for distributed components are very expensive. Advantage with distributed components is that some of the design parameters like length and width can vary a certain degree but the component still maintain its desired function [3]. This diploma work focuses on distributed components for implementation of the 5GHz radio front-end module. A known and important term regarding distributed components is the quarter wavelength (λ/4). Referring to the Smith chart, at a matched impedance condition, any extra length of transmission line does change the input impedance. Starting with an open circuit, one λ/4 away results in a short circuit. Starting from a short circuit, one λ/4 away result in open circuit. Thus one can create an RF open circuit that is a DC short circuit. This behaviour is used in this diploma work to create the switch and the RF choke circuits.. 2.3 Low Noise and Power Ampliers [1] Designing RF circuits using ampliers diers signicantly from the traditional low frequency design methodology. At high frequencies much consideration must be taken into account, such as voltage and current waves, matching networks to reduce the Voltage Standing Wave Ratio (VSWR) and undesirable oscillations. Therefore, one of the most important tasks of designing an RF amplier circuit is to ensure circuit stability. When the amplier is stable, gain and noise circles can be drawn in the Smith Chart to determine the circuit properties. Designing RF ampliers is always a trade-o between stability, noise and gain.. 2.3.1 Stability In order to stabilise an amplier the S-parameters for the amplier at the frequency range of interest are needed. With the help of these S-parameters stability circles can be drawn in the Smith chart, in order to determine if the amplier is stable in the desired region. The stability of an amplier circuit can also be studied with the help of the Rolett factor. This is more useful when viewing larger frequency spectra.. 8.

(40) 2.3.. LOW NOISE AND POWER AMPLIFIERS. CHAPTER 2.. 1 − |S11 |2 − |S22 |2 + |∆|2 k= >1 2|S12 ||S21 |. RF THEORY. (2.18). Where (2.19). |∆| = |S11 S22 − S12 S21 |. To design an unconditionally stable amplier circuit, which implies that the amplier remains stable within the entire domain of the Smith Chart at the selected frequency and the given bias conditions, the following conditions must be met. (2.20). |S11 | < 1 & |S22 | < 1. As well as (2.21). k > 1 & |∆| < 1. If an RF amplier is determined to be unstable, and its function calls for stablility, a stabilising network is needed. One way to stabilise an RF amplier is to add a series or shunt resistor to either input or output port, preferably to the output port since a resistor produces noise which is undesirable to amplify.. 2.3.2 Gain To determine the gain of an RF amplier circuit a method using constant operating gain circles can be applied. This method allows the representation of gain in the Smith Chart. The rst step when using this metod is to determine the maximum gain of the amplier with the source and load terminations. This can be done by using the following expression. GT =. power delivered to the load (1 − |ΓL |2 )|S21 | = available power f rom source (1 − |ΓIN |2 )|1 − S22 ΓL |2. When the maximum gain is determined other values of gain can be chosen and drawn in the Smith Chart, this will prove to be a useful property when considering noise. This is done by selecting values smaller than the maximum gain GT , preferably integers, and then using the two following equations to calculate the center and radius of the constant gain circle. Center. dg0 =. ∗ ∗ g0 (S22 − ∆S11 ) 1 + g0 (|S22 |2 − |∆|2 ). (2.22). p Radius rg0 =. 1 − 2kg0 |S11 S21 | + g02 |S12 S21 |2 |1 + g0 (|S22 |2 − |∆|2 )|. 9. (2.23).

(41) 2.3.. LOW NOISE AND POWER AMPLIFIERS. CHAPTER 2.. RF THEORY. Where k is the Rolett factor and g0 is an intermediate term for the following expression. g0 =. G |S21 |2. W here G = 10(Desired. gain in dB)/10. (2.24). Using these circles a suitable load reection coecient ΓL can be chosen and by solving the following expression, the corresponding source reection coecient ΓS can be found.  ΓS =. S11 − ∆ΓL 1 − S22 ΓL. ∗. (2.25). These reection coecients can now be used to design a matching network.. 2.3.3 Noise The design of the LNA circuit is a compromise between stability, gain and noise gure and the maximum gain cannot be obtained simultaneously. In order to eciently design an LNA circuit a representation for the noise gure as part of the Smith Chart must be used. This enables the designer to view gain, noise gure and stability properties simultaneously. There are three key parameters that are needed for the noise gure analysis of an RF amplier. • Minimum noise gure N Fmin , that depends on the biasing condition and operating. frequency of the device.. • Equivalent noise resistance Rn • Optimum reection coecient Γopt. Given these parameters the noise gure can be determined at any given source reection point ΓS in the Smith Chart. F = Fmin +. |ΓS − Γopt|2 4Rn Z0 (1 − |ΓS |2 )|1 + Γopt |2. (2.26). Previously circles of constant gain have been drawn in the ΓL -plane. However, since the noise gure depends on ΓS it would be useful to map the constant gain circles in the ΓS -plane instead. Remembering that ΓS and ΓL depend on each other (see equation 2.25) the following equations can be deduced. Center. dgS =. (1 − S22 dg0 )(S11 − ∆dg0 )∗ − rg20 ∆∗ S22 |1 − S22 dg0 |2 − rg20 |S22 |2. 10. (2.27).

(42) 2.3.. LOW NOISE AND POWER AMPLIFIERS. CHAPTER 2.. rg0 |S12 S21 |

(43) Radius rgS =

(44)

(45) |1 − S22 dg0 |2 − rg20 |S22 |2

(46). RF THEORY. (2.28). With the circles of constant gain now mapped in the ΓS -plane the noise circles can be added. Center. dF k =. Γopt 1 + Qk p. Radius rFk =. (2.29). (1 − |Γopt |2 )Qk + Q2k 1 + Qk. (2.30). Where 2. Qk = |1 + Γopt |. . Fk − Fmin 4Rn /Z0. . (2.31). Fk > Fmin. The gain and noise circles can now be displayed, as shown in gure 2.4. By studying the circles and taking the design specication into account, a source reection point that, if possible, satises the design requirements can be chosen. Then a matching load reection point can be found by using equation 2.25.. Figure 2.4: Stability, Gain and Noise circles in Smith Chart When the source and load reection points are determined the input and output matching network are designed. Matching networks can be made with lumped components, distributed components or a mix of both.. 11.

(47) 2.4.. SUBSTRATE. CHAPTER 2.. RF THEORY. 2.4 Substrate In RF applications the choice of substrate material can aect the overall performance drastically. When designing RF circuits it is desirable to control parameters that aect signal loss, which occurs either through impedance missmatch or dielectric loss. The substrate can add to impedance missmatch in transmission lines due to dierences in the thickness of the dielectric. This thickness aects the spacing between signal trace and the groundplane thus changing the characteristic impedance ( Z0 ) of the transmission line, which induces signal reections. Dielectric losses are caused by the conductance between traces and the groundplane, due to the Loss Tangent (tg δ ), which indicates how much of the propagating signal is lost to the dielectric. Besides good properties it is also important that these properties are stable, as high variations in these properties will cause even worse eects than what is gained from that material. Knowledge about these parameters is a good step towards a stable design.. 12.

(48) Chapter 3 Design Process The design is, as previously stated, made using the Agilent ADS tool. The design process is mainly carried out in three steps. The rst step is a schematic representation of circuits and components. This implies that component values and behaviour are close to ideal. This will be referred to as the Schematic representation or simply Schematic. When the initial reference design in Schematic is satisfactory the second step of the design process can begin. By converting the Schematic design into a Layout design, physical simulations on the actual transmission lines and traces can be made using the Momentum tool in ADS. These simulations will give a result that is closer to the "truth" than the Schematic simulations since the electromagnetic simulation take adjacent components into account. Finally, when a component layout is completed, this component can be used in Schematic by converting it into a Layout Component. This allows for entire system simulations using both Schematic and Layout designs. This is the third step in the design process.. 3.1 Design Overview The purpose of the radio front-end is to act as an interface between a transciever and antennas. When receiving a signal it will lter, amplify and in this case balance the signal before downconversion. During transmitting it will lter and amplify the signal after upconversion. This radio front-end has a dual antenna capability that enables antenna diversity. The Tx/Rx switch determines if the front-end is in transmit or receive mode. No control logic is incorporated in this design, allowing the user to implement preferred control methods. The receiver part consists of a MAX2649 Low Noise Amplier and a balun that converts the amplied unbalanced signal into a balanced signal. When transmitting, the signal is ltered and then amplied using the MAX2840 Power Amplier. As previously mentioned the goal of this design is to incorporate distributed components, using as few lumped components in the signal path as possible. This will be explained in the following sections.. 13.

(49) 3.1.. DESIGN OVERVIEW. CHAPTER 3.. DESIGN PROCESS. Figure 3.1: Schematic representation of radio front-end. 3.1.1 Design Specication [3] Table 3.1: Main Design Specications Parameter Desired Value RF Pass-Band 5.15−5.35 GHz Recieve Gain ≥ 10 dB Transmitting Gain ≥ 18 dB Out Band Signal Power < −100 dBm Antenna Impedance 50 Ω Supply Voltage 3V. Table 3.2: Substrate Properties Material RO4350B Dielectric thickness 0.254 mm Dielectric constant 3.48 ± 0.05 Dissipation factor 0.004 Metal thickness 0.045 mm Metal conductivity 5.8 × 107 S/m Surface roughness 0.001 mm. The only design restriction is the minimum line width and separation, which is 75µm. This measure is taken from the PCB manufacturer Elektrotyck's design rules.. 14.

(50) 3.2.. COMPONENTS. CHAPTER 3.. DESIGN PROCESS. Table 3.3: Amplier Properties Function LNA PA Part number MAX2649 MAX2840 Operating Frequency range 4.9-5.9 GHz 5-6 GHz Gain 17 dB 22dB Typical Noise gure 2.1 dB N/A IIP3 0 dBm N/A Supply voltage +2.7V to +3.6V Size 1 x 1.5mm 2 x 1.5mm Package UCSP Leads 2x3 3x4. 3.2 Components This section describes the designed components in depth, describing the component function and how that function is achieved, as well as giving a thorough insight in the design process of the component.. 3.2.1 Switch The purpose of the switch is to select a signal path using a control voltage. This switch can be used in either direction, using port 1 as input and port 2 & 3 as output or port 2 & 3 as input and port 1 as output.. Figure 3.2: Switch overview This function is achieved by using two PIN diodes. The resistor is a current limiter that limits the current though the circuit to 3 mA at a 3 V supply voltage. To further explain the function two cases will be used. In case 1 the supply voltage is 0 V and in case 2 the supply voltage is 3 V. Case 1: With the supply voltage set to 0 V the PIN-diodes are deactivated and will 15.

(51) 3.2.. COMPONENTS. CHAPTER 3.. DESIGN PROCESS. Figure 3.3: Signal path in Case 1 act as signal blockers, only allowing the signal to go between port 1 and 2. This should give a signal path with transmission line properties.. Figure 3.4: Signal path in Case2 Case 2: To access port 3 the supply voltage is set to 3 V. Now the PIN-diodes will conduct. Remembering the properties of a λ/4 transmission line in conjunction with a ground reference it is now visible that junction 1 (see gure 3.4) will now be treated as a "high impedance" in the direction of port 2, thus forcing the signal to go though the PIN-diode. On the other side of the PIN-diode the same method is applied to force the signal towards port 3. This time a λ/4 transmission line in conjunction with a λ/4 radial stub is used to create a virtual ground reference, creating the signal blocking "high impedance". Since the distributed component approach is dependent on transmission line length, and thus a single frequency, using the radial stub allows for a larger bandwidth. In order to design this circuit the main building blocks and component models had to be determined. First the λ/4 transmission line length had to be determined. Since signal velocity and thus wavelength is dependent on the substrate properties these must be entered in the transmission line calculating tool (see Appendix A.1). Using LinCalc 16.

(52) 3.2.. COMPONENTS. CHAPTER 3.. Figure 3.5: S21 in Case1. DESIGN PROCESS. Figure 3.6: S21 in Case2. the transmission line width which determines the characteristic impedance ( Z0 ) of the transmission lines, with the given substrate parameters, can be calculated. In this case the width is 0.535 mm. In order to use the PIN-diode in ADS a PIN-diode model must be assigned. Values for the PIN-diode can be found in the data sheet for the TOSHIBA JPD2S05FS PINdiode.. Figure 3.7: PIN-Diode Model Once the λ/4 transmission lines and PIN-diodes are determined the remaining circuit can be designed. In order to assemble the PIN-diodes and the resistor surface mounting pads are needed, specic dimensions for these are given in the PCB layout section. The remaining transmission line lengths are arbitrary but should be kept short. With an acceptable design in schematic it is now necessary to convert the design to a layout representation (see gure 3.9). However, since this design contains lumped 17.

(53) 3.2.. COMPONENTS. CHAPTER 3.. DESIGN PROCESS. Figure 3.8: Schematic representation of the Switch in ADS components, simulations cannot be performed in the momentum simulator. The way to go is to use the layout component function in ADS. This allows for momentum/schematic co-simulation, using EM-simulation on all copper traces while schematic combines these results with the lumped components in the schematic representation.. Figure 3.9: Layout representation of the Switch in ADS After converting the Layout into a Layout Component it can be added to the schematic by using the component library.. 18.

(54) 3.2.. COMPONENTS. CHAPTER 3.. DESIGN PROCESS. Figure 3.10: Layout Component in Schematic. 3.2.2 Filter The function of a bandpass lter is to lter out signals outside the desired frequency spectrum. In this case the pass-band is between 5.15 and 5.35 GHz. For frequencies below 4.95 GHz and above 5.55 GHz the lter is supposed to attenuate all signals with at least 20 dB. Using distributed elements desired lter characteristics are achieved by combining several coupled transmission lines elements. To save space on the PCB one of the most popular and common way is to bend those coupled lines like hairpins and they are hence called coupled hairpin lters.. Figure 3.11: Fourth-order bandpass lter of coupled-line and hairpin coupled-line type Characteristics of coupled line lter depend on several parameters (see g. 3.12), the most important parameter is length (l) in the coupled region, the spacing (S) between the couplings and the line width (W). The length of the coupled regions is expected to be some were around λ/4 of the desired center frequency. Spacing has most impact on the attenuation while width and length have a larger impact on the behaviour regarding to the centre frequency, impedance and ripple within the passband but it is the combination that matters. The order of the lter depends on how many coupled regions are used, for the same order, hairpin lters have one more coupled region than normal coupled line lters. Higher order lters have steeper slopes but the drawback is that attenuation within the passband becomes larger. Designing the lter in ADS was done by using a design guide for passive circuits with microstrip lines. Choosing a desired lter type, hairpin in this case, lter order and/or 19.

(55) 3.2.. COMPONENTS. CHAPTER 3.. Figure 3.12: Coupled section. DESIGN PROCESS. Figure 3.13: Simulation comparison between schematic and layout. desired pass- and stop-bands the program generates a good starting point for a design in schematic. The rst thing to check on the generated design is that all physical dimensions pass the design restriction. In this case the minimum line separation of 75 µm was not fullled since one of the coupled region had a separation of only 38 µm. When the desired characteristics were achieved with fullled design restrictions a layout was generated and simulated. Simulation results on the layout showed a much narrower passband than desired and hence a lot of parameter adjustment must be done at the layout level. An example of how large the dierence can be between schematic and layout simulations with the exact same parameters is seen in gure 3.13.. Figure 3.14: Final lter dimensions When the desired lter characteristics were obtained at the layout level, the next step is to create a layout component so it can be used in schematic together with other components but still be simulated with Momentum. A schematic view with all dimensions of the nal fourth order hairpin lter is showed in gure 3.14.. 20.

(56) 3.2.. COMPONENTS. CHAPTER 3.. DESIGN PROCESS. 3.2.3 Balun Balun is an abbreviation of balanced to unbalanced, this implies that the signal path is transformed from balanced to unbalanced or vice versa. The purpose of the balun in this design is to transform a singlended output to dierential outputs. The signal is split into two paths and hence the attenuation of the measured output signal will be at least 3 dB lower than the input signal. A balun can be done in several ways. In this diploma work two dierent types (see gure 3.15) were designed and measured, but only type 2 was used in the nal front-end layout. Both types make use of half the wavelength (λ/2) to separate the signal into two signals with a phase dierence of 180 degree. With the chosen substrate parameters a λ/2 is close to 17.5 mm.. Figure 3.15: Dierent balun types Type 1 is designed with a single-ended signal coming in from port P1, while port P2 and P3 are the output for the balanced dierential signals. The line connected to P1 is a λ/2 microstrip with a open end, while the two lines connected to P2 and P3 are λ/4 with shorted ends. Signal outputs from P2 and P3 are supposed to have a phase dierence of 180 degree over the whole passband, this is achieved quite easyily with balun type 1 and is therefore the major advantage for this type. The disadvantage with balun type 1 is the narrow bandwidth with respect to attenuation. This is mainly due to the design restriction of 75 µm line spacing. Balun type 2 is a much simpler design. It just splits the signal up in half and let one of the signals travel a distance of λ/2 longer than the other and in that way create the phase dierence of 180 degree. This design provides a much wider bandwidth than the type 1 balun, but the phase shifting of 180 degree is highly frequency dependent and is only achieved well for the center frequency. The design of these components was mainly done on the layout level, this is due to the experience gained from the lter design when large dierence in behavior between schematic and layout were observed. There is no Design Guide in ADS for this type of component, the design must be done manually. The design process is to set the length to a value near the λ/2 and λ/4, and then simulate and modify the parameters until the desired behaviour is achieved. The next step is to generate a layout component so the component can be simulated together with the rest of the system. Two dierent baluns were designed, the reason for this was that balun type 1 reduced 21.

(57) 3.2.. COMPONENTS. CHAPTER 3.. DESIGN PROCESS. the bandwidth for the whole system too much when it was put together with the rest of the system. For the interest of testing, balun type 1 was still produced and measured.. 3.2.4 RF Choke Both the LNA and the PA output terminals must be connected to the DC supply. With both the RF-signal path and the DC path connected at the same terminal a component that can separate the two is needed. The RF choke component is used for this purpose. By using the λ/4 eect it is possible to prevent the RF-signal from escaping through the DC network. Recalling the distributed components section in chapter 2, if a transmission line has its starting point in a short circuit, λ/4 away will be an open circuit. To generate an RF short circuit a radial stub is used, in the point where the radial stub is attached to the transmission line an RF-short circuit is created. At this point an RF-signal will experience a very low impedance (virtual ground). Connecting this known low impedance to a λ/4 transmission line an RF-signal high impedance (open circuit) point is generated at the opposite end of the transmission line.. Figure 3.16: RF choke Functional verication of this component was rst done in schematic with both one and two radial stubs. With two radial stubs in both sides of the transmission line a wider bandwidth for the virtual ground reference is achieved. The extra bandwidth is not needed since one radial stub has enough bandwidth for this project, for that reason and to save space on the PCB the single stub version was chosen. The design of the single stub RF choke moved on to the layout representation. The parameters that aect the behaviour of the radial stub are the length, the angle of the stub and the size of the junction connecting the radial stub with the λ/4 transmission line. Since almost all transmission lines in this project have the width of 0.535 mm, the only parameter that can be adjusted for the λ/4 line is just the length. Using LinCalc with the Rogers 4350B substrate parameter gives a λ/4 of 8.78 mm. On the layout level the desired behaviour of the component were found and the nal combination of parameters can be seen in gure 3.17. This is simulated without either DC or signal path connected. A layout component with the required parameters is now generated and used in the rest of the system. 22.

(58) 3.2.. COMPONENTS. CHAPTER 3.. DESIGN PROCESS. Figure 3.17: RF choke dimensions. 3.2.5 LNA The main function of a Low Noise Amplier (LNA) is to amplify the signal while adding as little noise as possible. Since most commercial LNA circuits are often unstable and not matched to a standard impedance (such as 50 Ω), stabilisation and matching networks are needed. This allows the designer to customise the LNA circuit to t dierent requirements. In this case the most critical requirement is the noise gure, which must be < 2.1 dB.. Figure 3.18: S2P block in ADS In order to work with an active component in ADS a data le is needed. For the MAX2649, MAXIM supplies a s-parameter le, which is available from their website. Using this s-parameter le the amplier can be simulated in ADS by using a S2P block (see gure 3.18). To simulate the amplier properties an amplier design guide in ADS is used. This design guide makes a data display template representing all gures of interest such as Gain, noise gure and Rolett factor etc. As seen in the simulation of the Rolett factor for the unstabilised LNA (see gure 3.19), the value is less than 1 (= unstable) above 3.7 GHz. Four dierent attempts to stabilise the LNA gave the results in table 3.4. As seen in the table any type of resistor stabilisation on the input side yielded a substantially 23.

(59) 3.2.. COMPONENTS. CHAPTER 3.. DESIGN PROCESS. Figure 3.19: Rolett factor for unstabilised LNA Table 3.4: Stabilising LNA at 5.25 GHz Placement of Resistor. Alignment. Input. Output. Shunt. Series. Shunt. Series. 38. 6. 117. 9. Rolett faktor (k). 1.013. 1.005. 1.001. 1.043. Max Power Gain (dB). 17.327 17.595 17.841 16.743. NFmin (dB). 3.324. Resistance (Ω). 3.245. 1.910. 1.920. Gain when matched to NFmin (dB) 13.233 13.206 12.959 12.695. higher NFmin than the stabilisation on the output side. As these values already exceed the preferred noise gure of 2.1 dB this stabilisation method is rejected. Thus the choice stood between shunt or series stabilisation on the output side. The shunt alternative was chosen due to the fact that it yielded a higher gain and a more manageable resistor size. Realising that the stabilisation resistor could hardly be mounted directly on the output terminal of the LNA chip, as in the case when regarding the ideal simulation results, the foot print was studied (see gure 3.20). The stabilisation point must be shifted 1 mm out from the RF-out pad and the transmission line joining the pad must be 0.2 mm wide, in order to avoid interference from other pads. Thus a new stabilisation resistance must be calculated. Simulating the LNA with the added transmission line reveals that the output impedance has changed and that the amplier must be stabilised with a 37 Ω shunt resistor. At this point the input and output matching networks can be designed. In order to design these matching networks the source and load impedances must be found. Using ADS and the amplier design guide the preferred source impedance is simply picked in a Smith Chart (see gure A.2). Once these impedances are determined the design of 24.

(60) 3.2.. COMPONENTS. CHAPTER 3.. DESIGN PROCESS. Figure 3.20: Footprint of LNA and resistor pads the matching networks can begin.. Figure 3.21: LNA input matching network Designing the input matching network (IMN) requires two impedances, not only the previously determined source impedance of the LNA but also the output impedance of the switch. The input impedance of the IMN is set to 50 Ω and the output impedance is the complex conjugate of the LNA source impedance. Applying these values in the Smith Chart tool, a matching network can be designed. Using the Smith Chart tool option "Build ADS Circuit" produces a network of transmission lines (see gure 3.21). In order to produce a layout the ideal transmission lines must be converted to microstrip lines. This can be done by synthesising width and length in LinCalc by using the obtained elecrical length and characteristic impedance. Replacing the transmission lines in the matching network with microstrip lines enables the design to be converted to a layout representation. When simulating the IMN with microstrip lines instead of transmission lines an apparent dierence is observed, since these components behave in a more realistic fashion in terms of parasitic eects, the stability of the circuit is aected. This calls for a new stabilisation resistance. The new stabilisation resistance is determined to be 47 Ω. An important thing to do before conversion is to add T-junctions between the microstrip lines. Otherwise the junctions will be treated as oating and thus causing alignment problems when converted to the layout. After conversion to the layout representation (see gure 3.22) the IMN must be simulated in Momentum. Since the schematic and layout simulations are dierent in principle, results will vary. Therefore the IMN must be adjusted such that it produces the desired imdedances. This can be done by changing the length of the microstrip lines. 25.

(61) 3.2.. COMPONENTS. CHAPTER 3.. Figure 3.22: LNA IMN. DESIGN PROCESS. Figure 3.23: LNA OMN. Once the IMN is adjusted to the desired input and output impedances a layout component can be produced. The layout component is then used with the amplier design guide to see if the amplier is matched as intended. The design of the output matching network (OMN) is almost identical to the IMN, the only dierence is that instead of matching to 50 Ω, the LNA must be matched to the input impedance of the balun.. Figure 3.24: Matched LNA When the design of both the matching networks is complete the matched LNA is simulated to determine if the matching is adequate. With stabilisation and matching networks completed the LNA is now ready for use in the radio front-end.. 26.

(62) 3.2.. COMPONENTS. CHAPTER 3.. DESIGN PROCESS. 3.2.6 PA The Power Ampliers (PA) function is as its name implies to amplify the signal power. These ampliers are commonly used when transmitting signals. Since this kind of amplier usually is the last active device in the transmitter chain a low noise gure is not as critical as in a LNA, thus allowing for more gain. Port impedances of PA at 5.25 GHz. RF-In. ( Ω). 11 + j14. RF-Out (Ω). 13 + j5. The design of this amplier circuit was carried out in a slightly dierent manner with regard to the LNA. Since no s-parameter le was available the IMN and OMN must be designed using impedances obtained from the MAX2841 data sheet. This also implied that the design could not be simulated in ADS. Since the port impedance of the Switch and the Filter are approximately 50 Ω, the PA must be matched to 50 Ω at both sides. As in the case of the LNA the Smith Chart tool is used to produce a matching network template. Using LinCalc the obtained the produced transmission lines are converted to microstip lines (see gure 3.25 and 3.26).. Figure 3.25: PA IMN in Schematic. Figure 3.26: PA OMN in Schematic. Figure 3.27: PA IMN in Layout. Figure 3.28: PA OMN in Layout. The matching networks are converted to the layout representation (see gure 3.27 and 3.28) and simulated using Momentum. The networks are adjusted to produce the desired input and output impedances. When acceptable values are acquired the matching networks are converted to layout components. Joining these matching networks with the PA-footprint a usable layout for the PA is now complete. 27.

(63) 3.3.. PRINTED CIRCUIT BOARD LAYOUT. CHAPTER 3.. DESIGN PROCESS. 3.3 Printed Circuit Board Layout Once all components were completed the entire system could be integrated. The primary task was to arrange all components and add DC blocking capacitors to prevent leakage. DC blocking is needed at all external ports except the Tx-port, since the lter prevents DC currents. DC blocking is also needed between the switches and the LNA/PA. DC blocking is done by connecting a small capacitor between two microstrip lines. The size of the capacitor is determined by the frequency, since the capacitor must behave as a short circuit at the operating frequency. In order to mount the DC blocking capacitors SMD pads are needed. Dimensions of these pads are taken from a soldering guide composed by the company AVX, sizes for wave soldering are used due to that both wave and manual soldering require fairly large pads.. Figure 3.29: SMD pad Dimensions In this design 0805 size components are used for resistors and 0603 size are used for capacitors. In order to perform measurements on the radio front-end, SMA connectors are needed. The SMA connector is surface mounted, though the component is designed for trough hole mounting. Through hole mounted pins are used for DC and control. Since a soldermask is used to dene solderable surfaces, soldermask layers for primary and secondary side are dened. These layers are used for all SMD components (Capacitor, Resistor, PIN-Diode, SMA, LNA & PA) and the through hole mounted pins. LNA & PA footprints are designed using recommended dimensions, found in the datasheets (see gure 3.30 & 3.31, dimensions in mm).. Figure 3.30: LNA Footprint. Figure 3.31: PA Footprint. Once all the radio front-end components and DC block capacitor pads have been placed the layout is examined in order to detect any layout conict. As expected, layout 28.

(64) 3.3.. PRINTED CIRCUIT BOARD LAYOUT. CHAPTER 3.. DESIGN PROCESS. conicts occur. The LNA IMN and PA OMN overlap, creating a short circuit (Appendix B.1). The PA IMN and LNA OMN are also too close to allow for DC and control signal traces. The LNA & PA input matching networks are repositioned and bent in order to accommodate DC and control traces. The matching networks are once again simulated to ensure the proper function (Appendix B.2). Now that the signal path layout is complete the DC and control traces can be applied (Appendix B.3). All DC carrying traces are complemented with decoupling capacitors (Appendix B.5) to remove high frequent noise. Designs for SHDN networks (Shutdown when 0V) are taken from the MAXIM evaluation kit design (Appendix B.6). The PA biasing and power determination (P_DET) networks are also taken from the evaluation kit design (Appendix B.7 & B.8). RF chokes are added to both LNA & PA RF out ports. The last step in the layout process is to design the primary side ground plane. The most important parameter to control is the isolation distance to the microstrip lines which should be at least 1mm, this to decrease signal crosstalk. Once the primary side ground plane (Appendix B.4) is dened, microvias connecting the primary and secondary side ground planes are placed. Since the thickness of the RO4350B substrate is only 0.254 mm, an additional substrate of FR4 is added to provide some rigidity to the entire PCB. The two substrates are fused together with a FR4 prepreg (see gure 3.32).. Figure 3.32: PCB layer denitions. 29.

(65) Chapter 4 Implementation In order to study the individual components, small test PCBs for each component are designed. The purpose of these test PCBs is to allow closer examination of specic components, and possibly to determine which component that causes unexpected eects. The layout of these test PCBs is kept as close as possible to that in the entire radio front-end.. 4.1 PCB Manufacturing Since PCBs are manufactured in panels an entire panel layout must be created. The panel dimension chosen for this design is 305x460 mm, which allows for 269x424 mm usable area for placing PCB designs. Once the components are placed in the panel layout the design must be converted into a le type that can be managed by the PCB manufacturer, in this case GerberX. This conversion produces a layout where each layer is dened separately, allowing the manufacturer to select a specic layer for a specic process. For this design the following layers were used: • Primary & secondary side soldermask layers (negatives) dene where an opening. in the solder mask should be made.. • Metal layers 1-4 dene the 4 metal layers. • The hole layer denes the position of the vias. • The routing layer denes how the PCBs will be cut from the panel.. 4.2 Assembly The assembly except the LNA & PA devices is performed inhouse. Since there is no ip-chip mounting equipment in this institution, the ip-chip assembly was made at IVF (Industrial Research and Development Corporation in Gothenburg).. 30.

(66) Chapter 5 Measurement Setup To perform measurements in the RF region a Rohde&Schwarz ZVM Vector Network Analyser is used, which can measure from 10 MHz up to 20 GHz. Most of the measurements in this project are done between 4 and 6 GHz and some between 1 and 10 GHz.. Figure 5.1: Rohde&Schwarz network analyser Measuring in the RF region requires the use of S-parameters. A network analyser uses a source to sweep the frequency within a desired interval and with a test device connected between port 1 and 2 the incident, reected and transmitted waves are detected and S-parameters can be presented. Recalling from chapter 2, S-parameters that represent transmission from port 1 to port 2 and from port 2 to port 1 are S21 and S12 , respectively. Magnitude represented with logarithmic scale (dB) as a function of frequency is normally used to present S21 and S12 . Presenting how well a port on the test device is impedance-matched S11 (port 1) and S22 (port 2) are used. The network analyser can present results in a Smith Chart diagram. To be able to do the measurements with the network analyser the test devices are connected to the ports with two coaxial 50- Ω cables. SMA-connectors are mounted on the PCBs so the cables can be attached.. 31.

(67) 5.1.. INITIAL MEAS. PROBLEMS. CHAPTER 5.. MEASUREMENT SETUP. 5.1 Initial measurement problems The SMA-connectors used are intended to be through-hole-mounted, but in this project they are used for edge mounting. To the left in gure 5.2 is the SMA-connector and it consists of ve legs, the one in the middle is the signal connector and the other four are ground connectors. When used as a surface-mounted component it is attached on the edge of the PCB and two ground connectors are connected on the secondary side, these two connectors work both as ground connection and to x the SMA-contact to the PCB. Since two of the ground legs are not in use, they are removed to prevent unexpected eects. The signal connector is also modied (see gure 5.2) it is cut to reduce the length and in that way prevent it from introducing unwanted parasitic eects on the signal.. Figure 5.2: SMA-connectors. Figure 5.3: SMA soldered to the edge of the PCB. Initial measurements on the lter, which was the rst component to be measured, showed characteristics very far away from the expected. The reason for this was found to be the SMA-pads. The original SMA-pad size used in designing the components had a width of 2 mm and a length of 3 mm, which is quite large according to the substrate thickness of 0.254 mm. The pad together with the ground plane works as a capacitor and hence introduces a lot of undesired capacative eects. The width of the pads were reduced to t the width of the transmission lines, i.e. 0.535 mm. The other reason of the unexpected characteristic was a mistake when dening via holes between dierent ground planes. This resulted in a oating ground plane. The solution was to solder on the edges of the cards and the SMA-connectors such that a good ground connection was achieved, see gure 5.3. Measurement results were now closer to the expected and these procedures were done on every component before measurement.. 32.

(68) Chapter 6 Results Simulation and measurement results are presented in this chapter.. 6.1 Component Measurements Measurement results for the test components are presented in this section.. 6.1.1 Switch Since the switch has three ports that must be measured and the network analyser only has two, the third port on the switch is matched to 50 Ω by using a terminator. To create the control signal a voltage source producing 3 V is used. The most important property of the switch is the forward transmission (S21 and S31), since it denes the signal attenuation of the dierent paths in the switch.. Figure 6.1: Switch test component 33.

(69) 6.1.. COMPONENT MEASUREMENTS. CHAPTER 6.. RESULTS. Figure 6.2: Simulated S21 and S31. Figure 6.3: Measured S21. Figure 6.4: Measured S31. Figures 6.2, 6.3 and 6.4 present the simulation and measurement results when the switch has a control voltage of 0V. In this case S21 should be close to -0.1 dB, which can be seen in the simulated results. The measured results show a S21 of -2.8 dB st 5.25 GHz. S31 on the other hand should be as high as possible, isolating port 3 from the signal. Simulated results for S31 show -50 dB while measurement shows -12 dB.. 34.

(70) 6.1.. COMPONENT MEASUREMENTS. CHAPTER 6.. RESULTS. Figure 6.5: Simulated S21 and S31. Figure 6.6: Measured S21. Figure 6.7: Measured S31. Figures 6.5, 6.6 and 6.7 present the simulation and measurement results when the switch has a control voltage of 3V. In this case S31 should be close to -0.5 dB at 5.25 GHz, attenauation increases slightly compared to the previous case due to the resistance in the PIN diode. The measured results show that S31 is -4.2 dB at 5.25 GHz. S21 on the other hand should be -16 dB at 5.25 GHz according to simulations. The measured result shows that S21 is -7.2 dB at 5.25 GHz.. 35.

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