V R maxQ IRLR3802PbFIRLU3802PbF

www.irf.com 1 HEXFET

Power MOSFET

V _DSS R _DS(on) max Q _g

12V 8.5m Ω 27nC

Notes  through „ are on page 9

PD - 95089A

Parameter Typ. Max. Units

R_θJC Junction-to-Case ––– 1.7

R_θJA Junction-to-Ambient (PCB mount)* ––– 40 °C/W

R_θJA Junction-to-Ambient ––– 110

Thermal Resistance

Absolute Maximum Ratings

Symbol Parameter Max. Units

VDS Drain-Source Voltage 12 V

VGS Gate-to-Source Voltage ± 12 V ID @ TC = 25°C Continuous Drain Current, VGS @ 4.5V 84 „

ID @ TC = 100°C Continuous Drain Current, VGS @ 4.5V 60„ A

IDM Pulsed Drain Current 320

PD @TC = 25°C Maximum Power Dissipation 88 W

PD @TC = 100°C Maximum Power Dissipation 44 W

Linear Derating Factor 0.59 mW/°C

TJ , TSTG Junction and Storage Temperature Range -55 to + 175 °C

Applications

Benefits

l

Ultra-Low Gate Impedance

l

Very Low R

l

Fully Characterized Avalanche Voltage and Current

l

High Frequency 3.3V and 5V input Point- of-Load Synchronous Buck Converters

l

Power Management for Netcom, Computing and Portable Applications.

l

Lead-Free

D-Pak I-Pak IRLR3802 IRLU3802

IRLR3802PbF

IRLU3802PbF

IRLR/U3802PbF

Symbol Parameter Min. Typ. Max. Units Conditions

IS Continuous Source Current MOSFET symbol

(Body Diode) ––– ––– showing the

ISM Pulsed Source Current integral reverse

(Body Diode)  ––– ––– p-n junction diode.

––– 0.81 1.2 V TJ = 25°C, IS = 12A, VGS = 0V ƒ ––– 0.65 ––– TJ = 125°C, IS = 12A, VGS = 0V ƒ trr Reverse Recovery Time ––– 52 78 ns TJ = 25°C, IF = 12A, V_R=20V

Qrr Reverse Recovery Charge ––– 54 81 nC di/dt = 100A/µs ƒ

trr Reverse Recovery Time ––– 50 75 ns TJ = 125°C, IF = 12A, VR=20V

Qrr Reverse Recovery Charge ––– 50 75 nC di/dt = 100A/µs ƒ

S D

G

Diode Characteristics

84„

320 A VSD Diode Forward Voltage

Parameter Min. Typ. Max. Units Conditions BVDSS Drain-to-Source Breakdown Voltage 12 ––– ––– V VGS = 0V, ID = 250µA

∆ΒVDSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.009 ––– V/°C Reference to 25°C, ID = 1mA ƒ ––– 6.5 8.5 VGS = 4.5V, ID = 15A ƒ ––– ––– 30 VGS = 2.8V, ID = 12A

VGS(th) Gate Threshold Voltage 0.6 ––– 1.9 V VDS = VGS, ID = 250µA

∆VGS(th)/∆TJ Gate Threshold Voltage Coefficient ––– -3.2 ––– mV/°C

––– ––– 100 µA VDS = 9.6V, VGS = 0V

––– ––– 250 VDS = 9.6V, VGS = 0V, TJ = 125°C Gate-to-Source Forward Leakage ––– ––– 200 VGS = 12V

Gate-to-Source Reverse Leakage ––– ––– -200 nA

VGS = -12V

gfs Forward Transconductance 31 ––– ––– S VDS = 6.0V, ID = 12A

Qg Total Gate Charge ––– 27 41

Qgs1 Pre-Vth Gate-Source Charge ––– 3.6 ––– VDS = 6.0V Qgs2 Post-Vth Gate-Source Charge ––– 2.0 ––– VGS = 5.0V

Qgd Gate-to-Drain Charge ––– 10 ––– nC ID = 6.0A

Qgodr Gate Charge Overdrive ––– 11 ––– See Fig.16

Qsw Switch Charge (Qgs2 +Qgd) ––– 12 –––

Qoss Output Charge ––– 28 ––– nC VDS = 10V, VGS = 0V

td(on) Turn-On Delay Time ––– 11 ––– VDD = 6.0V, VGS = 4.5Vƒ

tr Rise Time ––– 14 ––– ns ID = 12A

td(off) Turn-Off Delay Time ––– 21 ––– Clamped Inductive Load

tf Fall Time ––– 17 –––

Ciss Input Capacitance ––– 2490 ––– VGS = 0V

Coss Output Capacitance ––– 2150 ––– pF VDS = 6.0V

Crss Reverse Transfer Capacitance ––– 530 ––– ƒ = 1.0MHz

Static @ T

= 25°C (unless otherwise specified)

IGSS

IDSS Drain-to-Source Leakage Current

mΩ RDS(on) Static Drain-to-Source On-Resistance

Symbol Parameter Typ. Max. Units

EAS Single Pulse Avalanche Energy‚ ––– 300 mJ

IAR Avalanche Current ––– 20 A

Avalanche Characteristics

IRLR/U3802PbF

Fig 4. Normalized On-Resistance Vs. Temperature

Fig 2. Typical Output Characteristics Fig 1. Typical Output Characteristics

Fig 3. Typical Transfer Characteristics

0.1 1 10

VDS, Drain-to-Source Voltage (V) 0.01

0.1 1 10 100 1000

I D, Drain-to-Source Current (A)

1.5V

20µs PULSE WIDTH Tj = 25°C

VGS TOP 10V 4.5V 3.5V 2.5V 2.3V 2.0V 1.8V BOTTOM 1.5V

0.1 1 10

VDS, Drain-to-Source Voltage (V) 0.1

1 10 100 1000

I D, Drain-to-Source Current (A)

1.5V

20µs PULSE WIDTH Tj = 175°C

VGS TOP 10V 4.5V 3.5V 2.5V 2.3V 2.0V 1.8V BOTTOM 1.5V

1.0 2.0 3.0 4.0 5.0 6.0

VGS, Gate-to-Source Voltage (V) 0

1 10 100 1000

I D, Drain-to-Source Current(Α) TJ = 25°C

TJ = 175°C

VDS = 5.0V 20µs PULSE WIDTH

-60 -40 -20 0 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature (°C)

0.5 1.0 1.5

RDS(on) , Drain-to-Source On Resistance (Normalized)

ID = 84A VGS = 4.5V

IRLR/U3802PbF

Fig 8. Maximum Safe Operating Area Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

Fig 7. Typical Source-Drain Diode Forward Voltage

1 10 100

VDS, Drain-to-Source Voltage (V) 100

1000 10000 100000

C, Capacitance (pF)

Coss

Crss Ciss VGS = 0V, f = 1 MHZ

Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd

Coss = Cds + Cgd

0 10 20 30 40 50

QG Total Gate Charge (nC) 0

2 4 6 8 10 12

VGS, Gate-to-Source Voltage (V) VDS= 12VID= 6.0A

0 1 10 100

VDS , Drain-toSource Voltage (V) 1

10 100 1000

I D, Drain-to-Source Current (A)

Tc = 25°C Tj = 175°C Single Pulse

1msec 10msec OPERATION IN THIS AREA LIMITED BY RDS(on)

100µsec

0.0 0.5 1.0 1.5 2.0 2.5

VSD, Source-toDrain Voltage (V) 0.1

1.0 10.0 100.0 1000.0

I S, Reverse Drain Current (A)D

TJ = 25°C TJ = 175°C

VGS = 0V

IRLR/U3802PbF

Fig 10a. Switching Time Test Circuit

Fig 10b. Switching Time Waveforms

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case Fig 9. Maximum Drain Current Vs.

Case Temperature

1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec) 0.001

0.01 0.1 1 10

Thermal Response ( Z thJC )

0.20 0.10 D = 0.50

0.02 0.01 0.05

SINGLE PULSE

( THERMAL RESPONSE )

25 50 75 100 125 150 175

TC , Case Temperature (°C) 0

20 40 60 80 100

I DDrain Current (A) ,

LIMITED BY PACKAGE

V_GS V_DS 90%

10%

t_d(on) t_f t_d(off) t_r

V_GS

Pulse Width < 1µs Duty Factor < 0.1%

V_DD V_DS

L_D

D.U.T

IRLR/U3802PbF

D.U.T. V_DS

I_D I_G

3mA V_GS

.3µF 50KΩ 12V .2µF

Current Regulator Same Type as D.U.T.

Current Sampling Resistors

+ -

Fig 14. Gate Charge Test Circuit Fig 12b. Unclamped Inductive Waveforms

Fig 12a. Unclamped Inductive Test Circuit

tp

V_(BR)DSS

I_AS

Fig 12c. Maximum Avalanche Energy Vs. Drain Current

RG

IAS 0.01Ω tp

D.U.T VDS L

+ - VDD DRIVER

A 15V

20VV_GS

Fig 13. Threshold Voltage Vs. Temperature

-75 -50 -25 0 25 50 75 100 125 150 175 TJ , Temperature ( °C )

0.2 0.4 0.6 0.8 1.0 1.2 1.4

VGS(th) Gate threshold Voltage (V)

ID = 250µA

25 50 75 100 125 150 175

Starting TJ, Junction Temperature (°C) 0

1000 2000 3000 4000 5000

EAS, Single Pulse Avalanche Energy (mJ) ID TOP 8.0A 14A BOTTOM 20A

IRLR/U3802PbF

Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET

Power MOSFETs

Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer

P.W. Period

di/dt Diode Recovery

dv/dt

Ripple ≤ 5%

Body Diode Forward Drop Re-Applied

Voltage Reverse Recovery

Current Body Diode Forward

Current

V_GS=10V

V_DD

I_SD Driver Gate Drive

D.U.T. I_SDWaveform

D.U.T. V_DSWaveform

Inductor Curent

D = P.W.

Period

*

*

+ - +

+

+ - -

-

ƒ

‚ „

R_G • dv/dt controlled by RG VDD

• Driver same type as D.U.T.

• I_SD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

D.U.T



Fig 16. Gate Charge Waveform

Vgs Id

Vgs(th)

Qgs1 Qgs2 Qgd Qgodr

IRLR/U3802PbF

D-Pak (TO-252AA) Part Marking Information D-Pak (TO-252AA) Package Outline

Dimensions are shown in millimeters (inches)

IN THE ASSEMBLY LINE "A" 12 ASSEMBLED ON WW 16, 1999 EXAMPLE:

WITH ASSEMBLY THIS IS AN IRFR120 LOT CODE 1234

YEAR 9 = 1999 DATE CODE WEEK 16 PART NUMBER LOGO

INTERNATIONAL RECTIFIER

ASSEMBLY LOT CODE

916A IRFU120

34

YEAR 9 = 1999 DATE CODE

OR

P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) Note: "P" in assembly line position

indicates "Lead-Free"

12 34

WEEK 16

A = ASSEMBLY SITE CODE PART NUMBER

IRFU120

LINE A

LOGO

LOT CODE ASSEMBLY INTERNATIONAL

RECTIFIER

IRLR/U3802PbF

I-Pak (TO-251AA) Package Outline

Dimensions are shown in millimeters (inches)

I-Pak (TO-251AA) Part Marking Information

ASSEMBLY EXAMPLE:

WITH ASSEMBLY THIS IS AN IRFU120

YEAR 9 = 1999 DATE CODE

LINE A WEEK 19 IN THE ASSEMBLY LINE "A"

ASSEMBLED ON WW 19, 1999 LOT CODE 5678

PART NUMBER

56 IRFU120 INTERNATIONAL

LOGO RECT IFIER

LOT CODE

919A 78 Note: "P" in assembly line

position indicates "Lead-Free"

OR

56 78 ASSEMBLY

LOT CODE RECTIFIER

LOGO INTERNATIONAL

IRFU120

PART NUMBER

WEEK 19 DATE CODE

YEAR 9 = 1999

A = ASSEMBLY SITE CODE P = DESIGNATES LEAD-FREE

PRODUCT (OPTIONAL)

IRLR/U3802PbF

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrialmarket.

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.12/04

 Repetitive rating; pulse width limited by max. junction temperature.

Notes:

‚ Starting TJ = 25°C, L = 1.4mH RG = 25Ω, IAS = 20A.

ƒ Pulse width ≤ 400µs; duty cycle ≤ 2%.

„ Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 30A.

* When mounted on 1" square PCB (FR-4 or G-10 Material).

For recommended footprint and soldering techniques refer to application note #AN-994.

D-Pak (TO-252AA) Tape & Reel Information

Dimensions are shown in millimeters (inches)

TR

16.3 ( .641 ) 15.7 ( .619 )

8.1 ( .318 ) 7.9 ( .312 ) 12.1 ( .476 )

11.9 ( .469 ) FEED DIRECTION FEED DIRECTION

16.3 ( .641 ) 15.7 ( .619 )

TRR TRL

NOTES :

1. CONTROLLING DIMENSION : MILLIMETER.

2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).

3. OUTLINE CONFORMS TO EIA-481 & EIA-541.

NOTES :

1. OUTLINE CONFORMS TO EIA-481.

16 mm 13 INCH

Note: For the most current drawings please refer to the IR website at:

http://www.irf.com/package/