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BASE BAND ENCODER BASE BAND ENCODER
Project TeamProject Team
Shashank Tadakamadla Srinivasa Rao Mulakala
Supported BySupported Bengt Oelmann
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Introduction
Overview of System Overview of System
Encoders Encoders
Interfacing of System Interfacing of System
Results Results
Conclusion Conclusion
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BASE BAND ENCODER
BASE BAND ENCODER
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BASE BAND ENCODER BASE BAND ENCODER
Base band Encoder is a part of Base band Encoder is a part of ZigBee lite transmitter.
ZigBee lite transmitter.
Zigbee is poised to become the Zigbee is poised to become the leading wireless technology for a leading wireless technology for a
myriad of uses ranging from building myriad of uses ranging from building
automation to industrial and automation to industrial and
residential applications.
residential applications.
Introduction Introduction
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To Design a dedicated hardware module that performs Encoding techniques.
The encoded signal should be 8 bit digital signal of 40 MHz.
The type of output and the data rate of the output digital signal should be configured from microcontroller.
The maximum clock freq is 40 MHz.
AIM OF THE PROJECT
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What is Base Band Encoding ?
Converting 0s and 1s (binary data) into a Digital Signal is called LINE CODING.
The process on Line Coding is called ENCODING. Various Encoding schemes are used to transmit digital data across
a medium effectively and error free.
The process of transmitting encoded digital data over single unmultiplexed channel is defined as Base band Encoding.
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BASE BAND ENCODER BASE BAND ENCODER
S & M Design Team
PARALLEL TO SERIAL CONVERTER
N R Z
R Z
MANCHESTER
DIFFRENTIAL MANCHESTER
WISHBONE INTERFACE 8 BIT REGISTER
4 X 1 M U X Do
D1 D2 D3 D4 D5 D6 D7
A CK
Co
C1
C2
C3
ADDRESS BUS DATABUS
WRITE BUS
S o S 1
SEQUENTIAL OUTPUT CODE
REQ HANDSHAKE
SIGNALS
ENCODED SERIAL DATA
FREQUENCY MODULATOR
4 x 1 MUX
40 MHZ
S 2
S 3 LSB FIRST LOAD
4 4
REQUEST 4 SHIFT ENABLE
MIDDLE TRANSITION REQUEST SHIFT ENABLE
MIDDLE TRANSITION
RESET PARALLEL
8 BIT DATA AS INPUT
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Classification of digital encoding schemes
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NRZNRZ
0- Negative0- Negative
1- Positive1- Positive
RZRZ
0- Same as input0- Same as input
1- Transaction at the middle of the bit1- Transaction at the middle of the bit
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BASE BAND ENCODER BASE BAND ENCODER
NRZNRZ
0- Negative0- Negative
1- Positive1- Positive
RZRZ
0- Same as input0- Same as input
1- Transaction at the middle of the bit1- Transaction at the middle of the bit
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BASE BAND ENCODER BASE BAND ENCODER
Manchester
Transaction from high to low indicates 1
Transaction from low to high indicates 0
0 is represented by presence of transition at the begining of the bit period
1 is represented by absence of transition at the begining of the bit period
Differential Manchester
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S & M Design Team
BASE BAND ENCODER BASE BAND ENCODER
Manchester
Transaction from high to low indicates 1
Transaction from low to high indicates 0
0 is represented by presence of transition at the begining of the bit period
1 is represented by absence of transition at the begining of the bit period
Differential Manchester
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BASE BAND ENCODER BASE BAND ENCODER
Advantages & Dis-advantages
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S & M Design Team
Basic Formulae
TB = 1/D;
N = TB/TS.
Where,
TS =System clock time (sec).
TB =Time taken per bit (1/s).
N =No of clk cycles required to transmit a bit.
D =Data rate (kbps).
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S3 S2 Data
Rate(Kbps)
0 0 10
0 1 20
1 0 40
1 1 80
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WISHBONE INTERFACE
S1 S0 Encoding Type
0 0 NRZ
0 1 RZ
1 0 Manchester
1 1 Differential
Manchester
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Results
The outputs obtained from MAT LAB and VHDL are similar.
The encoded digital output Can be obtained at four different data rates as per the requirement.
Total memory usage is 79444 kilobytes
Number of Slices: 353 out of 768 45%
Number of Slice Flip Flops: 157 out of 1536 10%
Number of 4 input LUTs: 591 out of 1536 38%
Number of bonded IOBs: 17 out of 124 13%
Number of GCLKs: 1 out of 8 12%
SYNTHESIS REPORT
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Conclusion
We have successfully obtained the required type of codes at the output as well the signal is continuous.
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