Inverter

--- -- VHDL implementering av inverterare. Används i -- HybridAdderN för att sätta LSB. --

-- Fil: inverter.vhd -- Upphovsman: Rikard Hellberg -- version 1.0 3 Juni 2003 --- library IEEE; use IEEE.std_logic_1164.all; entity inverter is port ( I0 : in std_logic; O0 : out std_logic ); end inverter;

architecture behaviour of inverter is begin

O0 <= not(I0); end behaviour;

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