Investigation of sinusoidal ripple current charging techniques for Li-ion cells

(1)

SECOND CYCLE, 30 CREDITS ,

STOCKHOLM SWEDEN 2016

Investigation of sinusoidal ripple

current charging techniques

for Li-ion cells

SUNILKUMAR VADIVELU

(2)

Investigation of sinusoidal ripple current charging

techniques for Li-ion cells

SUNILKUMAR VADIVELU

Master of Science thesis in Electric Power and Energy Systems at the School of Electrical Engineering

KTH Royal Institute of Technology Stockholm, Sweden, August 2016.

Supervisor: R´udi Soares Examiner: Oskar Wallmark

(3)

SUNILKUMAR VADIVELU

Department of Electric Power and Energy Systems Kungliga Tekniska h¨ogskolan

(4)

Abstract

In recent years, the demand for Li-ion-type batteries has been increasing significantly in various fields of applications including portable electronics, electric vehicles, and also in renewable energy support. These applications ask for a highly efficient charging strategy in order to maintain a long life cycle of the batteries. Recently, a new charging technique referred as sinusoidal ripple current-constant voltage charging (SRC-CV) technique has been proposed and is in certain publications claimed to realize an improved charging per-formance on Li-ion batteries than conventional constant-current constant-voltage charg-ing (CC-CV) techniques. In this thesis, the chargcharg-ing performance of the SRC-CV chargcharg-ing method applied to a prismatic Li-ion cell for an automotive traction application is inves-tigated. An existing experimental setup is upgraded to realize charging of the Li-ion cells using the SRC-CV charging method. Electrochemical impedance spectrums of three Li-ion cells have been obtained using electrochemical impedance spectroscopy (EIS). These spectrums were used to determine the charging ripple-current frequency where the mag-nitudes of the ac impedance of the cell are minimized. Key parameters like charging time, discharging time, and energy efficiency are calculated in order to compare the charg-ing performance of the CC-CV and SRC-CV chargcharg-ing techniques. The results reported from the experimental results obtained in this thesis indicate that there is no significant improvement with the SRC-CV charging method (implemented using a constant ripple-current frequency) compared to the CC-CV method in terms of charging time and energy efficiency.

(5)

(6)

Sammanfattning

P˚a senare tid har behovet av batterier av Li-jontyp ökat kraftigt inom ett flertal applika-tionsomr˚aden inkluderande portabel elektronik, elfordon och miljövänlig elenergiproduk-tion. I dessa applikationsomr˚aden behövs en högeffektiv laddstrategi för att möjliggöra ett stort antal cyklingar av batterierna. Nyligen har en new laddmetod, benämnd sinusoidal ripple current-constant voltage-laddning (SRC-CV-laddning) föreslagits och har i vissa publikationer demonsterat en förbättring av laddprestanda hos Li-jonbatterier jämfört med konventionell constant-current constant-voltage-laddning (CC-CV-laddning). I detta examensarbete undersöks laddprestandan hos SRC-CV och CC-CV-laddning när de ap-pliceras p˚a prismatiska Li-jonceller avsedda för traktionsdrift. En existerande experimen-tuppsättning har uppgraderats för att realisera laddcykling med SRC-CV-laddning. Med hjälp av elektrokemisk impedansspektroskopi p˚a tre Li-jonceller har den frekvens vid vilken magnituden p˚a cellernas impedans är minimerad identifierats. Nyckelparametrar s˚asom laddtid, urladdningstid och energieffektivitet har uppmätts för b˚ade SRC-CV- och CC-CV-laddning. De experimentella resultaten visar ingen signifikant förbättring mel-lan SRC-CV-laddning (implementerat med en konstant rippelströmfrekvens) och konven-tionell CC-CV-laddning.

(7)

(8)

Acknowledgements

This thesis was conducted at electrical machines and power electronics lab, Department of Electric Power and Energy Systems, KTH Royal Institute of Technology in Stockholm. This thesis would not have been possible without the help and support of R´udi Soares, PhD student at Department of Electric Power and Energy Systems and Alexander Bess-man, PhD student at Department of Chemical Engineering and Technology. I would like to express my gratitude to them for helping me in upgrading the experimental setup. I would like to specially thank R´udi for the time we spent together debugging the micro-controller program of CRG. I would also like to thank Alexander for helping me with EIS and as well as for developing the LabVIEW GUI program.

I would also like to thank my examiner Associate Prof. Dr. Oskar Wallmark for giving me the opportunity to work on this topic. Also, I would like to give my appreciation for all his feedbacks and advices throughout the course of this thesis. I would also like to thank Dr. Pontus Svens at Scania AB for providing us Li-ion cells, CRGs and DCGs.

I thank KIC InnoEnergy SE for awarding me the KIC InnoEnergy Scholarship, provid-ing me with financial means to complete the master studies. I also would like to thank Associate Prof. Dr. Hans Edin for giving me the opportunity to study in KIC InnoEnergy SENSE master programme. I would like to thank Simon Nee and Jesper Freiberg for prac-tically helping me during the course of this thesis.

I would like to thank my friends and fellow classmates for constantly boosting my morale during my master studies. Last but not least, I am extremely thankful to my parents for supporting me throughout my master studies.

(9)

(10)

Chapter 1 Introduction

The motive behind this thesis is given in first chapter together with a literature review and statement of project goals. Also, a brief summary of the report layout is presented.

1.1 Background

The combination of high energy and power density of Li-ion-type batteries, makes it a suitable to use in various field of applications such as portable electronics, power tools, hybrid/full electric vehicles, medical instrumentation, aerospace technologies, back-up power supplies, and in renewable energy source support. Over the decade, demand for Li-ion batteries is rapidly growing in the aforementLi-ioned applicatLi-ions. Though the demand is growing, expanding the applications Li-ion batteries in these industries is a challeng-ing task as fast chargchalleng-ing, long life cycle and efficient chargchalleng-ing are often requested. A lot of research work have been done aimed at reducing the charging time while maintain-ing the associated losses low. In many applications, Li-ion batteries are used along with switched-mode power converters. Since a direct current is required for charging the bat-tery, a current ripple will be present due to the switch ripple of power converter.

Nowadays, charging techniques like trickle-current (CTC) charging, constant-current (CC) charging, pulsed constant-current (PC) charging and constant constant-current-constant voltage (CC-CV) charging are used. Among these, CC-CV charging technique is the most widely used. However, also with CC-CV charging, a short charging time and a long battery life cycle is difficult to achieve. Other than above mentioned three techniques, other charging techniques utilizing methods including fuzzy-logic control, neural networks, heredity-based algorithms, and gray prediction have also been employed to realize improvements in terms of battery charging performance at the expense of increases in terms of algorithm complexity and associated hardware costs [1].

(13)

verify whether SRC charging is actually superior to CC-CV charging is the main goal of this thesis.

1.2 Literature review

When a Li-ion battery cell is discharged, the electrochemical process inside the cell will result in transfer of ions from one electrode to the other electrode through an electrolyte. When the cell is charged, this electrochemical process is reversed resulting in a transfer of ions in the opposite direction. Inside the cell, a separator is placed between the anode and cathode to prevent short circuits occurring between them. The separator along with the electrodes are placed in an electrolytic solution which acts as a medium for transport of ions and also enables an initial concentration of ions for the electrochemical process to start when charging of the cell is commenced. The concentration of ions at an electrode’s surface and the metallic structure of its electrodes are a few among the many factors that can affect the characteristics of a Li-ion cell [2].

During CC-CV charging, a constant dc current is applied until the cell voltage rises to a pre-determined value, at which the applied voltage is held constant while the charging current is reduced until the charging current reaches a defined lower limit, commonly

around 0.1 C1_{. When the current reaches this lower limit, the charging stops. This}

tech-nique reduces the current at the final stage of charging when there is less electrode surface able to react and lower concentration of ions is available [2].

In the 1970s, the another charging technique termed PC charging was introduced. In this technique, a pulsed current is given to a cell for a defined time interval (around a second or so) followed by a resting period with no charging current for a few milliseconds. As a constant dc current is applied for an extended period of time during CC-CV charging, an ion concentration gradient is created which hinders the mass transportation of ions. This can reduce the charging efficiency. During PC charging, the ions are allowed to diffuse and distribute more evenly throughout the cell due to the short resting period of a few milliseconds [2].

In [3], it was found that the PC charging technique with an optimal charging frequency reduced the charging time of a 600 mAh Li-ion cell by 24% compared to a CC-CV charg-ing technique. In this work, electrochemical impedance model (or ac impedance model) for the Li-ion cell as shown in Fig. 1.1was utilized (this model will be explained in detail in Chapter 2 of this thesis). It was mentioned in [3] that the frequency at the which the

magnitude of the cell impedance |Zcell| is minimum corresponds to the optimal charging

frequency. It was also mentioned that at this optimal charging frequency, the maximum energy transfer efficiency is obtained in the cell during charging as the cell impedance is minimum. It was further mentioned that a variable frequency pulse charging system was

1_{A 1 C is a measure of the rate at which a cell is discharged relative to its maximum capacity. A 1 C}

(14)

1.2. Literature review

developed to make sure that the magnitude |Zcell| is maintained at a minimum value in

order to optimize the electrochemical reaction in the cell.

Lc Ccl Rcl Zcw Ro Cal Ral Zaw La

Fig. 1.1 Electrochemical impedance model adopted in [3].

The experimental results in [4] showed that charging a Li-ion type battery with a super-imposed sinusoidal ripple current at optimal frequency(where the magnitude of the cell impedance is minimum) improved the charging time and charging efficiency (the ratio of discharging capacity to charging capacity) about 5.6% and 6.8% respectively. The

ex-periments were carried out using a LiFePO4 battery with a 3.2 Ah capacity. It was also

pointed out that the temperature rise of the battery was reduced with around 6.3◦C when

the battery was charged from 0% SOC to 100% SOC with the sinusoidal ripple current added. The minimum-ac-impedance frequency was found from the measured impedance spectrum of the battery. The impedance was obtained using electrochemical impedance spectroscopy (EIS).

In [1], charging and discharging experiments using a Sanyo UR18650W high power Li-ion battery of 1.5 Ah capacity are reported on. The authors compared the corresponding charging time, discharging time, charging efficiency (the ratio of discharging capacity to charging capacity), and temperature rise of battery for CC-CV, SRC, and the PC charging methods. It was found that SRC charging improved the charging time, charging efficiency, the maximum temperature rise and lifetime of the battery by around 17%, 1.9%, 45.8% and 16.1% respectively. The same authors also claimed that the discharging efficiency and temperature rise of the Li-ion-type battery was improved by about 1.32%, and 41.9% respectively when sinusoidal ripple current was used in the discharging regime instead of CC [5].

In [6], the authors proposed a sinusoidal ripple current charging algorithm adapting an on-line impedance measurements. Factors including lithium plating, solid electrolyte

in-terphase2 _{(SEI), limited exchange current, and slow diffusion rates were considered}

dur-ing development of this chargdur-ing algorithm. The amplitude range of the ripple current [IC−rate/2.72, IC−rate/2] was suggested to optimize the charging performance. In [6],

CC-CV and SRC-CV charging methods were used to charge a 14.6V LiFePO4 battery

with 15Ah capacity. The results showed that SRC charging improved the charging time and charging efficiency of the battery by about 5.1% and 5.6% respectively when

com-2_{During charging or discharging, a small amount of active Li in the cell form a layer on the surface of}

(15)

pared to CC-CV charging method. SRC with an amplitude of 7.5 A superimposed on 15 A dc was used during charging regime.

In [7], pulsed current charging and discharging effects on Li-ion cells were studied. The impact of pulsed current profiles on the electrical performance of the cells was investi-gated. The results showed that the pulsed current profiles, in mean equal to the constant current profiles were not beneficial to the cell performance. The authors further found

that the form factor3 _{of the pulsed current profile of around 1.0-1.2 appeared to be the}

most impacting parameter on the charging performance. High form factor pulsed current signals decreased discharging efficiency and also affected the cell’s ability to charge by

increasing the total cell overpotential4. Similar results were found even at high and low

temperatures. The overall result is that the pulsed current does not seem to have any pos-itive effect on the cell materials and electrochemical processes that are related to cell’s performance.

In [8], SRC charging and CC-CV charging was considered. An electrical second-order RC battery model was used to study the overpotential voltage waveforms. It was found that the real part of the cell impedance was not minimized at minimum-ac-impedance frequency. It was further found that the charging time and charging efficiency of SRC-CV charging and CC-CV charging were not significantly different from each other. Because of the ac component used in the SRC-CV charging, an 18% increase in the maximum temperature rise compared to CC-CV charging was reported. It was also found mentioned that with a slightly increased dc current CC-CV charging, a better charging performance than the SRC-CV charging could be attained.

1.3 Objectives

From Section 1.2, it is evident that part of the literature claim advantages with the SRC-CV charging technique while the findings in other parts of the literature claim no sig-nificant improvements. In PC charging, there is a resting period for the ions to move uniformly but in SRC-CV charging, there is only a momentary zero condition which is

not sufficient for ions to move uniformly. In [1] and [6], the Coulombic efficiency5_{(CE) is}

calculated and compared for charging and discharging. It is known that the CE of Li-ion cells is practically 100% (provided there is no self-leakage during the charge and dis-charge cycle). This means that every electron that goes into a cell while charging the cell from 0% SOC to 100% SOC is available to come out of the cell while discharging back to 0% SOC, irrespective of the charge/discharge rate [9]. However, the measured values of

3_{The form factor is the ratio of the rms current to the mean current.}

4_{The difference between the equilibrium potential and the actual voltage is called overpotential.}

Equi-librium potential is the potential measured when the cell has had a long relaxation time and the open circuit voltage is stable.

(16)

1.4. Outline the CE during SRC-CV and CC-CV charging reported in the above mentioned literatures are lower than 99% which must be considered a concern.

Further, the internal impedance of the cell is the function of parameters including temper-ature, state-of-charge (SOC), and open circuit voltage (OCV). Also, in [10], it is found that the high-frequency impedance of the battery does not change with SOC but changes with battery temperature and discharging current. All these facts and the contradicting claims of [1] and [6], makes it interesting to further study the charging performance of SRC-CV charging techniques on Li-ion cells.

A first main objective of this thesis work is to commission a bidirectional synchronous current ripple generator capable to generate dc current, sinusoidal ac current, and sinu-soidal ac current with a dc offset of variable frequencies.This hardware should be inte-grated to an existing experimental setup [11] to realize SOC cycling of Li-ion cells using SRC-CV charging and CC-CV charging techniques. Further, data acquisition for calcu-lating parameters like charging time, discharging time, energy efficiency during the SOC cycling should be implemented, and thus analysis of these parameters for comparing the two charging techniques should be carried out.

1.4 Outline

The thesis is separated into six chapters which can be as follows:

• Chapter 1: Short presentation of the thesis purpose with literature review, objec-tives and the report structure.

• Chapter 2: Detailed explanation of the ac impedance cell model and analysis of the dynamics of cell using the ac impedance spectrum.

• Chapter 3: Description of the experimental set-up and brief function of the main blocks involved in it.

• Chapter 4: The programming of the micro-controller used in the current ripple generator and its software logic are presented.

• Chapter 5: The experimentally obtained key parameters charging time, discharging time, and energy efficiency of SRC-CV and CC-CV charging are reported.

(17)

(18)

Chapter 2 Analysis of battery dynamics using EIS

The general theory behind the EIS, its role in analysing the dynamic characteristics of a cell and brief explanation of ac impedance models obtained from EIS measurements are presented in this chapter.

2.1 Electrochemical impedance spectroscopy

EIS is commonly been used to investigate cell kinetics and determining SOC and state-of-health (SOH). From an electrochemical point of view, impedance is defined as the transfer function between potential and current, which is a complex quantity that can be measured by a frequency response analyser (FRA). The electrochemical impedance (ac impedance) characterizes the dynamic behaviour of the cell caused by an excitation of a small amplitude. When measuring the ac impedance, the cell is most commonly subjected to a sinusoidal excitation with a varying frequency. The impedance can be measured in

galvanostatic or potentiostatic mode. In galvanostatic mode1_{, a dc current I charging or}

discharging the cell is controlled and a sinusoidal current of frequency f is superimposed to the current I. This results in a sinusoidal voltage response of the cell’s terminal voltage.

The amplitude Vmaxand the phase angle φ mainly depend on the frequency of the applied

signal [13].

∆I = Imaxsin(2πf t) (2.1)

∆V = Vmaxsin(2πf t + φ) (2.2)

In potentiostatic mode2_{, dc voltage V at the terminals of the cell is controlled and a}

si-nusoidal voltage (2.3) at the frequency f is superimposed. This results in a sisi-nusoidal

1_{A galvanostatic mode is an electrochemical measuring mode for electrochemical analysis or for the}

determination of the kinetics and mechanism of electrode reactions based on the control of the current flowing through the system [12].

2_{Potentiostatic mode is a polarization technique that allows for the controlled polarization of metal}

(19)

current response around the dc current I flowing through the cell. Also, in this mode the

amplitude Imax and phase angle φ mainly depend on the frequency of the signal [13]. In

both modes, the impedance can be defined by (2.5). The measured ac impedance is a

fre-quency dependent complex number which has magnitude of Vmax/Imax and phase angle

φ. The phase angle φ between the current response and exciting voltage signal is due to the capacitive and inductive components of the cell. It is very important to make sure that

the voltage amplitude Vmax does not exceed around 10 mV to ensure that the impedance

are measured with a linear current response. In galvanostatic mode, Imaxmust be selected

so that the voltage response Vmaxis close to around 10 mV at all frequencies [13].

∆V = Vmaxsin(2πf t) (2.3)

∆I = Imaxsin(2πf t − φ) (2.4)

Z(f ) = Vmax

Imax

ejφ (2.5)

The measured ac impedance has resistive and reactive components which can be repre-sented, e.g., by electrical equivalent circuit shown in Fig. 1.1. The components in the

equivalent circuit can be explained as follows. La and Lc are inductors associated with

the anode and cathode respectively. R0 refers to the ohmic resistance of the cell including

the resistances of the electrolyte, electrode base metal, electrode leads, and terminals. The

resistances Raland Rcl are charge-transfer resistances of an electrochemical process and

are related to their exchange currents Ia,land Ic,l) as given in (2.6) and (2.7),

Ral = RT naF Ia,l (2.6) Rcl = RT naF Ic,l (2.7)

where nais the number of electrons and F is Faraday’s constant [14].

The capacitances Caland Cclare double-layer capacitances and Zcwand Zaware Warburg

impedances of the cathode and anode, respectively. The Warburg impedance is defined in (2.8) and (2.9), Zaw = σawω− 1 2 − jσ_awω− 1 2 (2.8) Zcw = σcwω− 1 2 − jσ_cwω− 1 2 (2.9)

where σ is referred to as the Warburg coefficient which is related to the diffusion co-efficient and concentrations of ions involved in the reaction [14].

(20)

2.2. Electrochemical processes inside a Li-ion cell L Cdl Rct Zw Ro

Fig. 2.1 Equivalent circuit of a two terminal energy storage cell with lumped

parame-ters of the cell. Here,R0 is ohmic resistance, Rct, Cdl, Zw are charge-transfer

resistance, double-layer capacitance, and Warburg impedance of the cell, re-spectively [14].

2.2 Electrochemical processes inside a Li-ion cell

Before discussing the dynamic characteristics of a Li-ion cell, the electrochemical pro-cesses occurring inside the cell is briefly explained in this section. When a Li-ion cell is charged, two important electrochemical process are occurring. Firstly, at the positive electrode, the dissolution or ionization of Li at the interface of the positive electrode and the SEI, which is formed on the electrode’s surface when the cell is initially formed. The

Li+-ions produced in this process travels across the SEI layer and the electrons travel

through the electron conducting network within the electrode and reach the current

col-lector connecting to the outside. The Li+ions are transported to the negative electrode in

a solvated3form through a process described by in (2.10) and (2.10) [15].

LiMO2

Dissolution

−−−−−−→ Li1−xMO2+ x Li++ x e− (2.10)

Li+ Solvation−−−−−→ “ Li+

” (2.11)

Secondly, at the negative electrode the desolvation of “ Li+” -ions take place. The “ Li+”

ions shed the solvated solvent molecules before transporting across the SEI layer at the negative electrode, which is formed when the battery is initially formed. At the surface

of the negative electrode, Li+takes an electron and forms Li, which intercalates4 _{into the}

anode. This process is described by (2.12) and (2.13) [15]. These two steps are reversed with respect to the charging process when the cell is discharged.

“ Li+” −−−−−−→ LiDesolvation + _(2.12)

Li1−yC6+ x Li+x e− Electrontransfer−−−−−−−−−→ Lix+1−yC6 (2.13)

2.3 Different dynamic cell characteristics

The Nyquist plot shows the measured ac impedance spectrum of a cell over a range of fre-quencies in a single curve. Since, the main characteristics of the cell is mainly capacitive

3_{A compound formed by the interaction of a solvent and a solute.}

(21)

at low frequencies, the sign of the imaginary axis is reversed resulting in the capacitive region being in the first quadrant of the plot. A typical Nyquist plot of Li-ion batteries is shown in Fig. 2.2.

Fig. 2.2 Typical Nyquist plot for a Li-ion cell [6].

The Nyquist plot allows the mass transport effects, the electrochemical double layer and the electrical effects to be separated. Under 1 Hz, the impedance measurement mainly show mass transport effects. In a few to hundreds Hz, the effects are caused by the charge transfer and the electrochemical double layer. In hundreds Hz to kHz, the effects of the conductance and skin effect are mainly present in the impedance. These effects are briefly discussed in this section.

2.3.1 Mass transport effects

By diffusion and migration, ions are transported between the electrodes inside the cell. A concentration gradient is responsible for diffusion while forces of the electric field cause migration. Each force has different directions. Often migration of the ions are affected by the solvated molecules that covers the ion. Most of the time, mass transport is due to diffusion. Diffusion can be found at different locations of the cell as given below [16]:

1. In the free electrolyte or in the separator: The ions produced at one electrode have to be moved across the separator/free electrolyte to the other electrode, so that the ions can be consumed at other electrode.

2. Within the porous electrode the electrochemical reaction takes place anywhere on the active mass surface. Diffusion is mainly affected by geometry of the porous electrode. Also, electrochemical reaction products can also move within the active mass to reach its final destination.

(22)

2.3. Different dynamic cell characteristics

Fig. 2.3 Diffusion process in a cell [16].

The diffusion process occurring in three positions of the cell is illustrated in Fig. 2.3. The impedance measurements of four fresh Li-ion batteries which has same capacity and ex-act construction as the Li-ion cells considered in this thesis work is shown in Fig. 2.4. Fig. 2.5 is a schematic Nyquist plot describing the diffusion effects [16]. For impedance values below the 1Hz frequency range, the reader can see a similar trend in both Fig. 2.5 and Fig. 2.4. The impedance values calculated based on the ac impedance model as rep-resented by Fig. 2.1 is plotted (black trend line) in Fig. 2.4.

Fig. 2.4 Electrochemical impedance measurements of four fresh Li-ion cells with

(23)

Fig. 2.5 Schematic Nyquist plot describing the diffusion effects [16].

2.3.2 Double-layer effects

On the layer between the electrolyte and electrode, a charge zone is formed. The amount of charge stored in this zone is not negligible as it is caused by the short distance of the layer and large surface area of the porous electrodes. The stored charge amount depends mainly on the electrode voltage. Since this behaviour resembles a capacitor, this effect is referred to as the electrochemical double-layer or double-layer capacitance [16].

On the electrode surface, the double-layer capacitor occurs together with the electro-chemical charge-transfer reaction. The electroelectro-chemical charge-transfer reaction can be

described by the electrochemical potential5 and the charge-transfer overpotential. The

electrochemical potential is neglected in the electrical equivalent circuit since it has no resistance. The charge-transfer overpotential and double-layer effects are modelled

us-ing the charge-transfer resistance (Rct) and double-layer capacitance (Cdl) as shown in

Fig. 2.1. Rctand Cdlare impacted by SOC, temperature, the battery’s age and current. Rct

and Cdltogether form a low-pass filter action of charge-transfer reaction. As Cdlcan carry

only alternating currents, this results in filtering for the charge-transfer reaction [16]. The impedance curve for this RC element is a semicircle as shown in Fig. 2.6, a similar trend can also be seen in Fig. 2.4.

Fig. 2.6 Nyquist plot describing the double-layer effects and charge-transfer reaction

[16].

5_{In generic terms, electrochemical potential is the mechanical work done in bringing 1 mole of an ion}

(24)

2.4. Battery models

2.3.3 Electric and magnetic effects

The ohmic resistance (R0) as shown in Fig. 2.1 is the sum of the electrolyte resistance, the

resistance of the current collector, the active mass, and the transition resistance between the active mass and the current collector. The voltage drop due to this ohmic resistance follows the current according to Ohm’s law.

Because of its geometry, the cell has a series inductance. This inductance value limits the maximum slew rate of the current. This is only of interest at higher frequencies in the range of 10-100 kHz. Since skin effect reduces the usable cross-sectional area of the current collector, it increases the ohmic resistance of the cell. However, the ohmic resistance seen by the dc current is not affected by the skin effect even though ac currents of high frequency are superimposed. The effect of conductance and skin effect can be seen in the Nyquist plot as a straight line below the real axis as shown in Fig. 2.2.

2.4 Battery models

The Warburg impedance (Zw) influences the ac impedance at very low frequencies (below

1 Hz). In [17], it is demonstrated how the Warburg impedance effect can be reproduced using multiple capacitor-resistor networks in series as shown in Fig. 2.7. A similar mod-elling of the Warburg impedance is adopted in [8] as second order capacitor-resistor net-work is used to analyse the battery’s impedance and compare the measured overpotential and calculated overpotential values.

Zw = C1 R1 C2 R2 C3 R3 . . .

Fig. 2.7 Electric equivalent circuit for the Warburg impedance [17].

In [1], the Warburg impedance is neglected in the model as the ripple frequency used in SRC charging is never below 1 Hz. The equivalent circuit model as shown in Fig. 2.1 (re-ferred as Randle circuit) was used. So, the Randle equivalent circuit (without the Warburg impedance) Fig. 2.8 is considered in this thesis as ripple frequencies below 1Hz are not used in this thesis. The value of the equivalent circuit parameters are found by fitting the equivalent circuit in Fig. 2.8, expressed by (2.14), using a least-squares method.

Z = jωL + Ro+

1

jωcdl+_R1_ct

(25)

The typical values of the parameters R0, Rct, Cdl, and L of the Li-ion cell considered in this thesis are 1.15 mΩ, 0.50 mΩ, 22.92 F, and 254 nH, respectively. The impedance of the cell based on equivalent circuit shown in Fig. 2.8 can be expressed by (2.15).

L

Cdl

Rct

Ro

Fig. 2.8 Randle equivalent circuit without Warburg impedance.

The frequency fz,min where the magnitude of the ac impedance is minimized be found

by differentiating |Z(ω)|2 with respect to ω and then solving for d|Z(ω)|2/dω = 0. This

(26)

Chapter 3 Experimental setup

The experimental setup used for investigating CC-CV and SRC-CV charging performance of the Li-ion cells are discussed in detail in this chapter.

3.1 General overview

In this thesis, prismatic 25 Ah Li-ion cells and a nominal voltage of 3.67 V are consid-ered to evaluate the performance of the CC-CV and SRC-CV charging techniques. The

cathode material of the cell is Lithium Nickel Manganese Cobalt Oxide (LiNiMnCoO2)

and graphite is used as anode. The cells under study are intended for automotive traction applications and they are provided by Scania AB, Sweden. In order to study the charging performance of the above mentioned charging techniques, an experimental setup has to be prepared so that SOC cycling can be realized with a constant dc current (1C-rate) and also with a sinusoidal ripple current of different amplitude (25 A, and 12.5 A) and of different frequency (60 Hz, 100 Hz, 125 Hz, and 200 Hz). The general layout of the experimental setup is shown in Fig. 3.1. In the experimental setup, converter circuits termed current ripple generators (CRGs) and dc-current generators (DCGs) as illustrated is connected as shown in Fig 3.2. The main blocks of the experimental setup are shown in Fig. 3.3 and they are briefly explained in next sections. The additional photographs of the setup are included in Appendix A.

3.2 Direct current generator

(27)

Fig. 3.1 The layout of the experimental setup [11].

v

DC

C

DCG

L

DCG

E

cell

R

Cell

Li-ion

Cell

S

1

S

2

C

CRG

L

CRG

S

1

v

Cell

i

Cell

i

DCG

i

CRG

S

2

(28)

3.2. Direct current generator DCG Fan Extra Inductor Shunt Resistor CRG Multiplexer NI PXIe-73 Accumulator charger (a) (b)

Fig. 3.3 Experimental setup: (a) Front-view of the setup; (b) Side-view of the setup.

If the four channels of a DCG are connected in parallel, it can give a maximum current of 160 A. DCGs are prepared to have programmable SOC drive cycles, and it can provide a triangular shaped ripple current with an amplitude up to 60 A and frequency up to 50 Hz [11]. In this thesis, the DCGs are not used to cycle the cells. However, the safety

in-terlocks used in the LabVIEW1_{graphical user interface (GUI) program shown in Fig 3.4}

(developed by Alexander Bessman and Rudi Soares) relies on measured cell temperatures and voltages of the DCGs.

1_{LabVIEW(Laboratory Virtual Instrument Engineering Workbench) is a system-design platform and}

(29)

Fig. 3.4 The LabVIEW GUI program used for data acquisition and SOC cycling of Li-ion cells [11].

3.3 Current ripple generator

The CRG is a controller area network (CAN bus) controlled, general purpose voltage-fed inverter which is used along with DCGs to cover a wider range of current ripple ampli-tudes and frequencies. The CRGs are designed and manufactured by Elektronikkonsult AB. The CRG is capable of switching at around 100 kHz. It is capable of producing peak-to-peak current magnitude of 120 A. In this thesis, the CRGs are used to generate a sinusoidal ripple current (up to 50 A peak-to-peak) with dc offset (25 A).

The CRG is controlled through an isolated CAN bus interface and it also has a 0-10 mA current transmitter and an RS232 asynchronous serial interface on the primary side intended to control an external power supply. It is powered by an auxillary voltage sup-ply (18-36 V) through an isolated dc-dc converter. The CRG is equipped with Infineon IPP120N25NFD MOSFETs and is designed for input voltage of 200 V. It has three phases where each phase can deliver ±20 A. In this thesis, the CRGs are configured such that all three MOSFET legs in a CRG are turned on and off at the same time. This is done in order to maximize the total output current of each CRG.

(30)

3.3. Current ripple generator the gate signals to the MOSFETs are turned off.

Fairchild FAN7390MXI is used to drive the gates of the MOSFETs. The level shifter of the driver is capable of sustaining +600 V bias. The modulation and control is performed using the TMS320F28069 micro-controller. The micro-controller measures the dc link voltage, all three phase currents, and the heat sink temperature. Thermal protection is

done by measuring the heat sink temperature (85-95◦C) using an external NTC

thermis-tor attached to the heat sink. The temperature is monithermis-tored and the gate signals are turned off by micro-controller’s software in case of an over temperature condition. All internal voltages for the CRG circuit are derived from a 12 V supply. This 12 V supply is provided from a 24 V earth reference battery supply at the front side of the CRG. The commu-nication between the CRGs and the personal computer (PC) is established through an isolated CAN bus interface. The isolated CAN-transceiver is powered using a dedicated transformer. A JTAG connector is located close to the micro-controller. It is used during debugging the micro-controller code and it can be brought to the front panel using an extension cable. The JTAG does not need to be used during normal operation of CRGs. The schematics of the CRG are included in Appendix Band two photographs of a sample CRG are shown in Fig. 3.5.

(a)

(b)

(31)

3.3.1 Micro-controller

For control and modulation of a CRG, a Texas Instruments TMS320F28069 PiccoloTM

micro-controller is used. It is used to generate the pulse width modulated (PWM) gate signals for the MOSFETS, measure the phase currents, and to handle the CAN communi-cation between the PC and CRGs. It is a 32-bit micro controller and it has a separate 32-bit floating point unit (FPU). The micro-controller code is programmed in C-language using

Code Composer Studio2. The micro-controller has dedicated registers for PWM, CAN,

and ADC. The micro-controller code and the configuration of the mentioned registers are briefly explained in Chapter 4.

3.3.2 Current sensor

As explained in Section 3.3, the current sensors are used for both measuring the phase currents and as well as to realize the over-current protection. The sensors used in the CRG are Sensitec CDS4025 type current sensors which are galvanically isolated. The current-sensing accuracy is improved by the use of an external voltage reference which reduces the temperature drift as the sensors share the same reference voltage. The block diagram, over-current protection working principle, and other important parameters of the sensors are provided in [19]. The yellow coloured components shown in Fig. 3.5b are the current sensors. The current sensors circuitry is shown in the CRG schematic in Appendix B.

Sensor calibration

The current sensors in the CRGs are calibrated in order to determine the current gains as accurately as possible in order to minimize the error between the CRG output current and set current value. These gain values are used to convert the digital values stored in the ADC’s result registers to corresponding decimal values. The converted digital values are then fed to a digital PI controller, which is implemented in micro-controller. Based on the error between the set point and the measured values, the PI controller varies the duty cycle of the gate signal. More details of this are given in Chapter 4. While calibrating, the sensors are fed externally with dc current which is varied from -9.5 to +9.5 A. For each current reference point, the average values of ADC’s result register is taken. By linearly fitting the average ADC stored values with the values of the external reference current, the gain of the sensor is calculated. The plot of the external reference current values with its corresponding average ADC stored values is shown in Fig. 3.6. This process is repeated for all three sensors in each CRG. Fig. 3.6 shows plot for all three sensors in a specific

2_{Code composer studio is an integrated development environment (IDE) to develop applications for}

(32)

3.3. Current ripple generator CRG. The gain values of all the current sensors in all nine CRGs are reported in Table 3.1.

Externally-fed sensor current [A]

-10 -5 0 5 10 A ve ra ge A D C R es u lt va lu es -0.4 -0.2 0 0.2 0.4 Rphase SP hase TP hase

Fig. 3.6 Current sensor calibration: plot of external reference current and its correspond-ing ADC stored values.

Table 3.1 Current sensor gains.

CRG Serial No. R-Phase S-Phase T-Phase

EK002 26.7523 26.8312 26.8168 EK003 26.5745 26.5182 26.7953 EK004 26.5957 26.5322 26.7308 EK005 26.7094 26.6596 26.6525 EK006 26.6170 26.4341 26.7094 EK007 26.7237 26.5957 26.7738 EK008 26.6951 26.6809 26.8168 EK0010 26.6383 26.6951 26.6809 EK0011 26.5252 26.5322 26.4971

3.3.3 MOSFETs and its driver circuit

The MOSFETs used in the CRG are Infineon IPP120N20NFD N-channel 200 V (VDS)

power MOSFETs. It is equipped with fast diode with reduced reverse recovery voltage.

It has an on-resistance of 12 mΩ. It can operate up to 175◦C [20]. The MOSFETs are

driven by a Fairchild FAN7390MXI driver. Each half-bridge has one exclusive driver and the driver circuit is configured in bootstrap mode.

(33)

the switching frequency is held constant and the duration of the pulse width (turn-on time,

ton) is varied to adjust the mean output voltage. Thus, the average power delivered is

proportional to the duty cycle (Dratio) as given in (3.1). The power switches are controlled

by the micro-controller, which uses the current feedback in a control loop to regulate the output voltage. More details of control loop are discussed in Chapter 4.

Dratio = ton Ts (3.1) S1 S3 S5 S2 S4 S6 Cbus − + Vdc Lf Cf R0 L Cdl Rct Ecell

Fig. 3.7 Topology of the synchronous dc-dc converter, output filter, and cell model.

3.3.4 Output low-pass filter

A second order low-pass LC filter is designed to reduce the ripple current due to the constant switching frequency. The parameters L and C are calculated by modelling the

circuit in PLECS3. The inductor and capacitor values are finally selected to 15 µH and

100 µF respectively. A metallized polyester capacitor with a voltage rating of 100 Vdc and 60 Vac is chosen and the inductor is manufactured by winding a 3.6 m length of

enamelled copper wire having cross-sectional area of 2 mm2 _{in ferrite E-core with an air}

gap of 2 mm. Using (3.2), the cut-off frequency of the filter is found to be around 3.5 kHz. The PLECS model and a sample simulation result are shown in Fig 3.8 and Fig. 3.9 respectively. From Fig. 3.9b, it can be seen that the converter output current is more or less equally shared among the three MOSFETs legs even-though they are switched on/off

at the same time, this is due to slightly different on-state resistance (Rds,on) assumed in

each MOSFETs in the converter.

fc=

1

2π√LC (3.2)

(34)

3.4. Data acquisition and instrumentation time iRef iCRG uDc (measured) vCRGRef Current control iCRG vCRGRef uDc (measured) outputSwitchState Modulation switchStateLeg1 switchStateLeg2 switchStateLeg3 vCellOut iCellOut iCRGOut uDcOut iLeg1Out iLeg2Out iLeg3Out PLECS Circuit iCell iRef vCell iLeg1 iLeg2 iLeg3 (a) (b)

Fig. 3.8 Model of converter circuit: (a) Simulink model; (b)PLECS model.

3.4 Data acquisition and instrumentation

(35)

0 1 2 3 4 5 Time[ms] -10 0 10 20 30 40 50 60 C u rr en t[ A ] IRef ICRG ICell (a) 0 1 2 3 4 5 Time[ms] 0 5 10 15 20 25 C u rr en t[ A ]

ILeg1 Ileg2 Ileg3

(b)

Fig. 3.9 Simulation results of converter circuit: (a) Unfiltered current vs. filtered current; (b) Current sharing between the three MOSFETs legs.

(a) (b)

Fig. 3.10 Climate Chamber: (a) Front-view; (b) Side-view.

(36)

3.4. Data acquisition and instrumentation As the cells are subjected to 0% and 100% SOC cycling , the cell capacity has to defined at a specific current since the higher the current, the more losses will arise both during charge and during discharge. Also, the more the losses, the lower the cell voltage will be during discharge (and vice versa during charge). So, the cell is characterised at a current of 25 A (1 C-rate). SOC control is implemented in the following method: the cells are charged with a constant current until their voltage exceeds 4.1 V. Then, the voltage is held constant at 4.1 V until the current falls below 1/10 C (2.5 A). At this point the cell is con-sidered as fully charged, i.e., SOC=100%. Then, the cells are discharged with a constant current (25 A) until their voltage falls below 3.0 V. At this point, the cell is considered as fully discharged, i.e., SOC=0% [11].

C L CRG

R-Shunt Cluster Multiplexer DCG Cluster CRG Cluster Safety System Li-ion Cells PXI rack PC CAN General Purpose Wires C L DCG CAN VHDCI MXI Express Twisted pair Power Cables NTC Twisted pair Glue Twisted pair

Fig. 3.11 Data acquisition and instrumentation [11].

3.4.1 Multiplexer

(37)

offset values are calculated once every hour in order to nullify any drift in the offset val-ues. While calculating the offset, the SOC cycling experiment is stopped for a time period of around 60 s. The multiplexer along with the safety card, which gives wake-up signals to DCGs, are shown in Fig 4.1. The accuracy of the energy efficiency, charging time and discharging time are very much affected by the speed of the multiplexer which is more discussed in Chapter 5. The schematics of multiplexer is shown in Appendix B.

(38)

Chapter 4 Software implementation

The programming logic and procedural coding of the micro-controller implemented in the CRG is presented in this chapter.

4.1 Software modulation and CRG current control

As briefly mentioned in Section 3.3, the TI C2000 TMS320F28069 micro-controller used in the CRG has three main functions: the generation of three pairs of pulse-width mod-ulated gate signals to three half-bridge circuits, the analog-to-digital conversion of the output currents of the three half-bridge circuits, the dc-link voltage, the temperature of the heat-sink, and establishing a CAN communication bus between the CRGs and the PC. From the LabVIEW GUI, the charging/discharging current set-points, the proportional and integral gains of the PI controller, turn-on and turn-off signals are sent to the CRG via the CAN bus. The CRGs are programmed to turn off if the heat sink temperature

reaches above 85◦C or if an over-current is detected. The LabVIEW GUI receives the

error-message flags corresponding to over-temperature protection and over-current pro-tection via the CAN bus. Since the three half-bridge circuits are operated in parallel, the sum of the three phase currents is send to the GUI as a measurement of the cell current. These tasks are implemented in the micro-controller using the C-programming language in Code Composer Studio v6.1.2 edition. The implemented code is included in this thesis

as Appendix C. The ePWM registers1 are responsible for generating pulse-width

mod-ulated gate signals and trip zone protection. The eCAN registers are responsible for the CAN bus link between the PC and the CRG, the ADC registers are responsible for mea-suring the voltage and currents, and the Timer0 registers is responsible for sending the CAN messages [21]. Before looking into detail of the configuration of these registers, the flowchart of the main program is illustrated in Fig 4.1.

All mentioned tasks except for the task related to the ADC are implemented in their

cor-1_{These registers are small memory elements which can be accessed quickly by the arithmetic and logic}

(39)

responding interrupt service routine function. An interrupt is generated in response to an event at these peripherals. Several interrupts can be generated at the same time, but the CPU will service the interrupt based on the interrupt priority level. The events at the pe-ripherals that generate each and every interrupt is chosen by configuring the appropriate peripheral registers. The configuration of these peripherals registers are briefly discussed in the next sections.

Power on

Boot the code from flash Enter Main Funtion Initialize SysC-trl Registers Initialize PIEC-trl Registers Disable all PIE interrupts

Clear all PIE interrupts

Map user defined ISR address to default ISR address

Copy time critical code to RAM Intialize GPIO, ADC, ePWM, eCAN, Timer0, Flash registers Enable ePWM, ePWM TZ, Timer0, eCAN interrupts Program Stack pointer enters an infinite loop Interrrupt flag Set? Execute ISR function & clear the interrupt flag

yes

no

(40)

4.2. CAN bus implementation

4.2 CAN bus implementation

The enhanced CAN module implemented in the micro-controller is a full-CAN controller and compatible with the CAN 2.0B standard. It is used to establish the CAN protocol to communicate serially with other controllers. The CAN uses a series multi-master com-munication protocol that supports real time control with reliable security at up to 1Mbps communication rate [21]. In this thesis, the data frames are sent from the transmitter node to the receiver nodes. The CAN module supports two different formats of data frames that have different identifier fields. An identifier field contains the address of the receiv-ing node. In this application, extended frames with a 29-bit identifier are used. The CAN extended data frames contain an 8 bytes of data field and the bit field that makes up the extended data frames, along with their position is shown in Fig 4.2.

Fig. 4.2 CAN data frame [21].

The eCAN module has 32 message mailboxes that can store/send 8-byte lengths of data along with a 29-bit identifier bit field and several control bits. The CPU of the micro-controller controls the CAN micro-controller by modifying the various mailboxes and its asso-ciated register. A CAN bus baud rate of 250 kbps is selected and the eCAN registers are configured as shown in Listing 4.1. The baud rate can be calculated from the CPU clock frequency by (4.1).

baud rate = CPUclk frequency

(BRP_reg+ 1) ∗ ((TSEG1_reg+ 1) + (TSEG2_reg+ 1) + 1) (4.1)

ECanaShadow . CANBTC . a l l = ECanaRegs . CANBTC . a l l ; ECanaShadow . CANBTC . b i t . BRPREG = 9 ;

ECanaShadow . CANBTC . b i t . SJWREG = 3 ; ECanaShadow . CANBTC . b i t .SAM = 1 ;

ECanaShadow . CANBTC . b i t . TSEG1REG = 1 0 ; ECanaShadow . CANBTC . b i t . TSEG2REG = 3 ;

ECanaRegs . CANBTC . a l l = ECanaShadow . CANBTC . a l l ;

(41)

In this application, five mailboxes are used, in which four of them are configured to receive messages and one mailbox is configured to transmit a message from the CRG. Whenever a mailbox receives a new message, an interrupt is generated and the CPU reads the messages in a mailbox while servicing the interrupt. Therefore, in total, the CPU services the eCAN interrupt four times. The receive-message pending bit of one mailbox is cleared by the CPU after it has read the message in it. This is done so that the mailbox can receive new messages. The messages are transmitted to the PC in the timer0 interrupt service routine. The messages in a mailbox are transmitted by clearing the transmission request set bit of that mailbox. The code that implements these functions is given in Listing C.7 in Appendix C.

4.3 PWM signals generation and trip zone configuration

The enhanced pulse width modulator (ePWM) peripheral of the micro-controller gener-ates the complex pulse width signals with minimal CPU overhead. The ePWM module is highly flexible and easy to use. The ePWM produces complex pulse width signals by allocating the needed timing and control resources to the configured PWM channel. In this application, the following features of the ePWM module are used [21]:

• Dedicated 16-bit time base counter which is used for period and frequency control. • Two PWM outputs with double edge symmetric operation.

• Dead-band generation with independent rising and falling edge control.

• A trip condition which forces a low state impedance state logic level at the PWM outputs.

• A PWM event triggered ADC start of the conversion and the CPU interrupts. Each ePWM module control and status register set is grouped into 8 submodule registers of which time-based submodule registers, counter-compare submodule registers, action qualifier submodule registers, dead-band generation submodule registers, trip-zone sub-module registers, and event trigger subsub-module registers are used. The main signals used by the ePWM module are:

(42)

4.3. PWM signals generation and trip zone configuration • ADC start of conversion signals (EPWMxSOCA and EPWMxSOCB): Each

ePWM module has two ADC start of conversion signals.

The PWM frequency and the events related to it are controlled by a time-based period (TBPRD) register and the operating mode of the time-base counter. The relation between time-based period and the PWM switching frequency’s different time-base counter modes is shown in Fig. 4.3 for a time-based period value of 4. The time increment of the each step of the counter is determined by the time-based clock which is, in this case, equal to the CPU system clock time period (12.5 ns). The value of the TBPRD register is changed by shadowing, i.e., the updated value is stored in a buffer register and it is transferred to the TBPRD only when the time-based counter equals to zero. This is done to avoid glitches during the active PWM cycle. To generate symmetric regularly sampled PWM signals, up-down counter mode is selected.

Fig. 4.3 Relationship between the based period and frequency for different

time-based counter modes [21].

(43)

using the CMPA registers. To prevent corruption or false operation because of the asyn-chronous modification of registers by software, shadow registers are used. Shadow reg-isters provides temporary location for the active register which controls the hardware. The shadow registers’ content are transferred to the active registers at a strategic point of time. Thus, shadow CMPA registers are used to update the new compare values to prevent glitches during active PWM cycle.

The action-qualifier submodule sets and clears the EPWMxA and EPWMxB outputs when the time-based counter value is equal to the value in CMPA register. In this thesis, dual edge symmetric pulse-width modulation is used. To generate a dual edge symmet-ric PWM signals, up-down count mode of time based counter is selected to compare the CMPA and time-based counter registers. The switching frequency and duty ratio of PWM signals can be easily varied by selecting different values for the TBPRD and CMPA reg-isters by (4.2). Fig 4.4 illustrates how the dual edge symmetric PWM signals is generated using the up-down count mode of time based counter.

fPWM = fsysclk 2 · TBPRD Dratio = 1 − CMPA TBPRD (4.2)

Fig. 4.4 Up-down count mode symmetrical waveform [21].

(44)

4.3. PWM signals generation and trip zone configuration edge delay set in DBFED and DBRED. In this application, the active high complemen-tary mode is selected so that the EPWMxA and EPWMxB outputs are complementing each other. These output signals are given to the upper and lower MOSFET switch in a MOSFET leg. The DBFED and DBRED values are selected such that a shoot-through of the MOSFET leg is avoided. The trip-zone submodule matches the trip zone input TZ1 to the EPWM1 module. When an overcurrent fault occurs, the outputs of the EPWMxA and EPWMxB of the three ePWM modules are forced low. The event trigger submodule sends the EPWMxSOCA start of conversion signals to the ADC module to start the conversion of the sampled values. The register’s configuration of the ePWM1 module is shown in Listing 4.2.

/ / C o n f i g u r e ePWM1 t r i p z o n e r e g i s t e r s

S y s C t r l R e g s . PCLKCR1 . b i t . EPWM1ENCLK = 1 ; EPwm1Regs . TZSEL . b i t . OSHT1 = 1 ;

EPwm1Regs . TZCTL . b i t . TZA = 2 ; / / F o r c e EPWM1A low on t r i p

EPwm1Regs . TZCTL . b i t . TZB = 2 ; / / F o r c e EPWM1B low on t r i p

EPwm1Regs . TZFRC . b i t . OST = 1 ; EPwm1Regs . TZEINT . b i t . OST = 1 ;

/ / C o n f i g u r a t i o n o f t i m e −b a s e r e g i s t e r s

EPwm1Regs . TBCTL . b i t . FREE SOFT = 2 ; EPwm1Regs . TBCTL . b i t . PRDLD = TB SHADOW ;

EPwm1Regs . TBCTL . b i t .CTRMODE = TB COUNT UPDOWN ; EPwm1Regs . TBCTL . b i t . PHSEN = TB DISABLE ;

EPwm1Regs . TBCTL . b i t . SYNCOSEL = TB CTR ZERO ; EPwm1Regs . TBCTL . b i t . HSPCLKDIV = TB DIV1 ; EPwm1Regs . TBCTL . b i t . CLKDIV = TB DIV1 ;

/ / C o n f i g u r a t i o n o f t i m e −b a s e c o u n t e r r e g i s t e r s

EPwm1Regs . TBCTR = 0 ; EPwm1Regs . TBPRD = 2 0 0 0 0 ;

EPwm1Regs .CMPA. h a l f .CMPA = 1 0 0 0 0 ; EPwm1Regs . TBPHS . h a l f . TBPHS = 0 ;

/ / C o n f i g u r a t i o n o f c o u n t e r −c o m p a r e A r e g i s t e r s

EPwm1Regs . CMPCTL . b i t .LOADAMODE = CC CTR ZERO ; EPwm1Regs . CMPCTL . b i t .LOADBMODE = CC CTR ZERO ; EPwm1Regs . CMPCTL . b i t .SHDWAMODE = CC SHADOW ; EPwm1Regs . CMPCTL . b i t .SHDWBMODE = CC SHADOW ;

/ / C o n f i g u r a t i o n o f dead−b a n d module r e g i s t e r s

EPwm1Regs . DBCTL . b i t . HALFCYCLE= 0 ;

(45)

EPwm1Regs . DBCTL . b i t . OUT MODE = DB FULL ENABLE ; EPwm1Regs . DBCTL . b i t . POLSEL = DB ACTV HIC ;

/ / B l a n k i n g t i m e o f 125 n s i s c h o s e n

EPwm1Regs . DBFED = 1 0 ; EPwm1Regs . DBRED = 1 0 ;

/ / C o n f i g u r a t i o n o f ADC SOC e v e n t t r i g g e r r e g i s t e r s

EPwm1Regs . ETSEL . b i t . SOCAEN = 1 ;

EPwm1Regs . ETSEL . b i t . SOCASEL = ET CTR ZERO ; EPwm1Regs . ETPS . b i t . SOCAPRD = ET 1ST ;

/ / C o n f i g u r a t i o n o f a c t i o n − q u a l i f i e r r e g i s t e r s

EPwm1Regs . AQCTLA . b i t . ZRO =AQ CLEAR ; EPwm1Regs . AQCTLA . b i t . CAU = AQ SET ; EPwm1Regs . AQCTLA . b i t . CAD = AQ CLEAR ; EPwm1Regs . AQCTLA . b i t . PRD= AQ NO ACTION ;

/ / C o n f i g u r a t i o n o f i n t e r r u p t e v e n t r e g i s t e r s

EALLOW;

S y s C t r l R e g s . PCLKCR0 . b i t . TBCLKSYNC = 0 ; EPwm1Regs . ETSEL . b i t . INTSEL=ET CTR ZERO ; EPwm1Regs . ETPS . b i t . INTPRD=ET 1ST ;

EPwm1Regs . ETSEL . b i t . INTEN = 1 ;

S y s C t r l R e g s . PCLKCR0 . b i t . TBCLKSYNC = 1 ; EDIS ;

Listing 4.2 Configuration of ePWM1 registers for a PWM switching frequency of 2 kHz.

4.4 ADC configuration

The ADC module is a 12-bit recyclic ADC which core includes sample and hold circuits, front-end analog multiplexers, the conversion core, and other analog supporting circuits. The sample and hold circuits are sampled sequentially and are, in turn, fed by a total of 12 analog input channels. In this application, only 6 channels have been used. A single event triggers six serial starts of conversion. The basic principle of operation is mainly around the configurations of this six individual start of conversions. The ADC submodule has a full range analog input from 0-3.3V.

(46)

4.5. Digital PI controller implementation ePWM1 module is used as trigger source for the 6 channel of conversions. The EPWM1SOCA is generated whenever the EPWM1 TBCTR value becomes zero. This is done to synchro-nize the ePWM and the ADC start of conversion. The initialization of the ADC registers and the conversion of the binary value in the ADC result registers to decimal values is given in Listing C.3, Appendix C.

4.5 Digital PI controller implementation

The sinusoidal current with dc offset is produced by modulating the duty cycle as given in (4.3). The output current is sufficiently controlled using a PI controller. A block diagram of a general PI controller controlling a plant system is depicted in Fig 4.5. This represents a feedback system, where the PI control input E(s) is the error between the system output and reference input. The P-part of the controller output is the error multiplied by the

pro-portional gain. For low values of kp, the system may reach the reference point very slowly

and a steady-state error may remain. For large values of kp, the system may become

un-stable. The integral part of controller summarizes all the errors and multiplies the sum of the errors with the integral gain. Since the integral controller sums the error, it remembers situations it has gone through and effectively removes any steady-state error. However, since, the integral part of the controller summarizes the error over time, this sum can get too high and cause the the output of the controller to saturate. To prevent this saturation, anti-wind up and backup calculation as shown in Fig 4.6 is implemented.

D = D + D sin(ωt) (4.3) kp+ k_si Gp(s) U (s) 1 R(s) E(s) Y (s) − Y (s)

Fig. 4.5 Block digram of the control system

The signal v(t) is the sum of the proportional and integral terms, and the controller output is u(t) = sat (v(t)), where the sat() is the saturation function. This PI controller is im-plemented digitally in the micro-controller by simply replacing the continuous variables

with their sampled versions as given in (4.4) and (4.5). Here tk represents the sampling

instants, i.e., the times when the micro-controller reads its input, h represents the

sam-pling time so that tk+1 = tk+ h, and kt represents the anti-windup term. The integral is

(47)

Kp E(s) P (s)+ V (s) Ki s Kt U (s) E(s)+ − I(s)+ + −

Fig. 4.6 Anti-wind up and back-up calculation

P (tk) = kp· (r(tk) − y(tk)) (4.4)

I(tk+1) = I (tk) + ki· h · e (tk) + kt · (sat (v) − v) (4.5)

In the micro-controller, the sampling time h is equal to the time period of the switching frequency (70 kHz) of the MOSFETs. The digital PI is implemented in the ePWM1 inter-rupt service routine. The output current can be controlled by changing the output voltage of the MOSFET leg, which in turn is controlled by the duty cycle. The ePWM1 inter-rupt service function, which is called for every 14.5 µs, and the duty cycle is computed using the digital PI controller and updated for every 14.5 µs. The code that shows the implementation of digital PI is shown in Listing 4.3.

(48)

4.6. CRG output voltage and current waveforms / / P I c o n t r o l l e r c o d e e r r o r c u r r e n t f = ( r i p p l e r e f p o i n t f − i s e n s e t o t a l f ) * ( f l o a t ) s y s o n ; / / e r r o r c u r r e n t v d c n e w f = _{( k p f * e r r o r c u r r e n t f ) + ( k i f * i n t e g r a l f ) ;} / / P I c o n t r o l l e r o u t p u t / / A n t i windup i f ( v d c n e w f <= 0 . 0 ) { v d c n e w s a t f = 0 . 0 ; } e l s e i f ( v d c n e w f >= v d c s e n s e f ) { v d c n e w s a t f = v d c s e n s e f ; } e l s e { v d c n e w s a t f = v d c n e w f ; } i n t e g r a l f = ( i n t e g r a l f + ( S y s c l k * ( f l o a t ) ( EPwm1Regs . TBPRD<<1) * ( e r r o r c u r r e n t f + ( ( v d c n e w s a t f −v d c n e w f ) / k p f ) ) ) ) * ( f l o a t ) s y s o n * ( f l o a t ) ECAN on ; / / E s t i m a t i n g t h e d u t y c y c l e d u t y n e w f = v d c n e w s a t f / v d c s e n s e f ; / / U p d a t i n g t h e c o m p a r e r e g i s t e r s f o r t h e n e x t c y c l e DT = ( ( D C C u r r e n t r e f f ! = 0 . 0 ) | | ( r i p p l e a m p l i t u d e r e f f ! = 0 . 0 ) ) ? D e a d T i m e R a t i o : 0 . 0 ; / / B l a n k i n g t i m e c o m p e n s a t i o n U i n t 1 6 x = ( U i n t 1 6 ) _{( ( 1 . 0 f −( d u t y n e w f +DT) ) * ( f l o a t ) EPwm1Regs .} TBPRD ) ; / / U p d a t i n g t h e c o u n t e r c o m p a r e A r e g i s t e r s

EPwm1Regs .CMPA. h a l f .CMPA =x ; EPwm2Regs .CMPA. h a l f .CMPA =x ; EPwm3Regs .CMPA. h a l f .CMPA =x ;

r e t u r n ; }

Listing 4.3 Code snippet of ePWM1 interrupt service routine.

4.6 CRG output voltage and current waveforms

(49)

Time[µs] 0 0.2 0.4 0.6 0.8 1.0 O u tp u t V ol ta ge Vo in [V ] -10 0 10 20 30 Rphase SP hase TP hase (a) Time[µs] 0 0.2 0.4 0.6 0.8 1.0 O u tp u t V ol ta ge Vo in [V ] -10 0 10 20 30 Rphase SP hase TP hase (b)

Fig. 4.7 Output Voltage: (a) Synchronized output voltage of 3-MOSFET legs; (b) Output

voltage of 3-MOSFET legs.

Time[µs] 0.2 0.4 0.6 P W M ga te si gn al s in [V ] -1 0 1 2 3 4 P W Mhigh P W Mlow (a) Time[µs] 0.2 0.4 P W M ga te si gn al s in [V ] -1 0 1 2 3 4 P W Mhigh P W Mlow (b)

Fig. 4.8 PWM gate signals: (a) PWM gate signals (fs =70 kHz) to MOSFETS; (b) PWM

gate signals with magnified time scale.

(50)

4.6. CRG output voltage and current waveforms Time[s] 0 0.01 0.02 0.03 0.04 0.05 O u tp u t cu rr en t of ea ch M O S F E T le g [A ] 0 1 2 3 4

Leg1 Leg2 Leg3

Fig. 4.9 Output current shared by MOSFET legs

Time [ms] 0 10 20 30 40 50 C R G O u tp u t cu rr en t [A ] 0 2 4 6 8 10 (a) Time [ms] 0 5 10 15 20 C R G O u tp u t cu rr en t [A ] 0 2 4 6 8 10 (b) Time [ms] 0 2 4 6 8 10 C R G O u tp u t cu rr en t [A ] 0 2 4 6 8 10 (c) Time [ms] 0 1 2 3 4 5 C R G O u tp u t cu rr en t [A ] 0 2 4 6 8 10 (d)

(51)

(52)

Chapter 5 CC-CV and SRC-CV charging

The experimentally obtained key parameters charging time, discharging time, and energy efficiency of SRC-CV and CC-CV charging are reported in this chapter.

5.1 CC-CV charging

Three Li-ion cells are charged with CC-CV charging method. The CC-CV charging has two phases namely constant current (CC) phase and constant voltage (CV) phase. In CC phase, the cell is charged with a constant dc current of 25 A (1 C-rate) until the cell volt-age reaches 4.1 V. When the cell voltvolt-age reaches 4.1 V, charging switches from CC phase to CV phase. During CV phase, constant voltage is applied to the cell until its charging current decreased to 2.5 A (0.1 C-rate) and the charging current is decreased by a factor of 0.1 at regular intervals till it drops to 2.5 A. Then, the cell is discharged with a dc current of 25 A until the cell voltage drops to 3.0 V. This charge and discharge cycle is repeated at least 2 times. The cell current and voltage are measured by the PXIe-6124 card and the card has a sampling rate of 4 million samples per second.

During the charge/discharge cycle, the average value of 4 million samples of cell charg-ing current/dischargcharg-ing current and voltage are measured. As explained in Section 3.4.1, each second the multiplexer reads a pair of cell voltage and current signals. It takes 8 s for the multiplexer to measure all 16 cells’ voltage and current. Hence, the time difference between two consecutive voltage and current measurements of one cell is around 8-10 s. The key parameters charging time, discharging time, and energy efficiency are calculated from the voltage and current data. At 0% SOC, the cell voltage is 3.0 V and at 100% SOC, cell voltage is 4.1 V. The energy efficiency is calculated using (5.1). The energy input during charging and the energy output during discharging are calculated using numerical integration of the products of the sampled voltage and current using the trapezoidal rule. The charging time and the discharging time are calculated using the MATLAB’s function

etime (t2,t1), where t2and t1 are timestamps of the charge/discharge end time and

(53)

current values from one charge/discharge cycle to next charge/discharge cycle was found to be in the range of ±100 mA.

ηenergy =

RTdischarge−end

Tdischarge−startvcell· idischarging· dt

RTcharge−end

Tcharge−startvcell· icharging· dt

(5.1)

The charge/discharge cycle is continued without any relaxation time and the sampled data are stored for every 10 seconds. Therefore, the timestamp of the instant at which there is a change of direction in the cell current is not stored. This leads to an error of at most +10 s in the calculated charging, and discharging times which is illustrated in Fig 5.1. The energy between these two timestamps, both during charging (Fig 5.1c) and discharging (Fig 5.1d), are not taken into account when calculating the energy efficiency of the cell.

Time [mins] 0 30 60 90 120 M ea su re d av er ag e ce ll vo lt ag e [V ] 3.0 3.2 3.4 3.6 3.8 4.0 4.2 (a) Time [mins] 120 150 180 M ea su re d av er ag e ce ll vo lt ag e [V ] 3.0 3.2 3.4 3.6 3.8 4.0 4.2 (b) Time [mins] 60 M ea su re d av er ag e ce ll vo lt ag e [V ] 3.0 3.2 3.4 3.6 3.8 4.0 4.2 (c) Time [mins] 120 M ea su re d av er ag e ce ll vo lt ag e [V ] 3.0 3.2 3.4 3.6 3.8 4.0 4.2 (d)

Fig. 5.1 CC-CV charging and discharging of the cells: (a) The cell is discharged first be-fore being charged; (b) The cell is charged bebe-fore being discharged; (c) Amount of time not taken into account for when calculating charging time; (d) Amount of time not taken into account for when calculating discharging time.

(54)

5.1. CC-CV charging input side of the card has a 16-bit resolution with an input voltage range of 5 V. Hence, the cell voltage are measured with an approximate resolution of 153µV. The charging/dis-charging currents are measured as voltage signals across dc shunt resistors. The voltage signals are amplified by linear amplifiers in the multiplexer and connected to PXIe-6124 card. In LabVIEW, average value of 4 million samples of cell voltage and current are mea-sured and stored in a text file. The CC-CV charging profile is shown in the Fig 5.2. The average values of current and voltage of the cells are measured during CC-CV charging are shown in Fig 5.3. The resulting charging time, discharging time, and energy efficiency of the CC-CV charging method are reported in Table 5.1, Table 5.2, and Table 5.3, respec-tively. Time [mins] 0 10 20 30 40 50 60 70 M ea su re d ch ar gi n g cu rr en t of th e ce ll [A ] 0 5 10 15 20 25 30 M ea su re d ce ll vo lt ag e [V ] 3 3.2 3.4 3.6 3.8 4 4.2

Investigation of sinusoidal ripple current charging techniques for Li-ion cells

Investigation of sinusoidal ripple

current charging techniques

for Li-ion cells

SUNILKUMAR VADIVELU

Investigation of sinusoidal ripple current charging

techniques for Li-ion cells

Abstract

Sammanfattning

Acknowledgements

Contents

Chapter 1

Introduction

1.1

Background

1.2

Literature review

1.3

Objectives

1.4

Outline

Chapter 2

Analysis of battery dynamics using EIS

2.1

Electrochemical impedance spectroscopy

2.2

Electrochemical processes inside a Li-ion cell

2.3

Different dynamic cell characteristics

2.3.1

Mass transport effects

2.3.2

Double-layer effects

2.3.3

Electric and magnetic effects

2.4

Battery models

Chapter 3

Experimental setup

3.1

General overview

3.2

Direct current generator

v

C

L

E

R

Li-ion

Cell

S

S

C

L

S

v

i

i

i

S

3.3

Current ripple generator

3.3.1

Micro-controller

3.3.2

Current sensor

3.3.3

MOSFETs and its driver circuit

3.3.4

Output low-pass filter

3.4

Data acquisition and instrumentation

3.4.1

Multiplexer

Chapter 4

Software implementation

4.1

Software modulation and CRG current control

4.2

CAN bus implementation