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INOM TEKNIKOMRÅDET EXAMENSARBETE

MIKROELEKTRONIK OCH HUVUDOMRÅDET TEKNISK FYSIK,

AVANCERAD NIVÅ, 30 HP STOCKHOLM SVERIGE 2018 ,

Fabrication and Characterization of Low Temperature Annealed Silicon Bottom Cell for CELOG based Tandem Solar Cell Systems

MAX CHUAN CHEN

KTH

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Fabrication and Characterization of Low Temperature Annealed Silicon Bottom Cell for CELOG based Tandem

Solar Cell Systems

by

Max Chuan Chen

A Master’s thesis

submitted in partial fulfillment of the requirements for the degree

of

Master of Science in Engineering - Nanotechnology

June 2018

KTH Royal Institute of Technology Kista, Stockholm,

Sweden

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Degree project in Applied Physics SK202X conducted at Department of Applied Physics,

School of Engineering Sciences, KTH Royal Institute of Technology.

Supervisor:

Dr. Yanting Sun

Photonics Research Unit, Department of Applied Physics, School of Engineering Sciences

Examiner:

Prof. Sebastian Lourdudoss

Photonics Research Unit, Department of Applied Physics, School of Engineering Sciences

Thesis proposal approved by:

Prof. Mattias Hammar

Director of Master’s programme in Nanotechnology

Department of Electronics, School of Electrical Engineering and Computer Science

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Abstract

The continuous improvement of solar cell efficiency is one of the core problems in the development of solar cell technologies. At present, III-V compound semicon- ductor based multijunction solar cells have the record efficiencies and are mainly used for space applications. Despite unmatched performance of III-V solar cells, the terrestrial solar cell market is dominated by silicon-based photovoltaics due to their lower cost. In order to improve the existing photovoltaic technologies, photovoltaic researchers have been working on the integration of high efficiency III-V solar cell on cheap silicon substrate. However, the large lattice mismatch between silicon and III-V compound semiconductors makes the direct growth of III-V on Si challenging and can results in severely deteriorated device performance. Recently, researchers at KTH have demonstrated excellent quality III-V on Si by corrugated epitaxial lateral overgrowth (CELOG) method. In order, to make multijunction solar cell on Si by CELOG process, low temperature processing of silicon bottom cell is required. The focus of this thesis work is to investigate low temperature annealing of silicon solar cell by so called solid phase epitaxial regrowth. Where the topmost layer is both amorphized and doped by ion implantation and subsequent thermal treatment. The metallization of solar cell contacts was done by photolithography, evaporation and sputtering processes. The processed cells presented in this thesis have been charac- terized by various methods such as: Hall e↵ect, four-point probe, high resolution x-ray di↵raction (HRXRD), current-voltage (I-V), external quantum efficiency (EQE), etc..

P-type boron implantation in amorphized Si has been activated at temperature as

low as 700 C and working silicon solar cells were obtained. In general, the fabricated

Si solar cells showed higher reverse saturation current when compared to di↵erent

references, because the ion implantation introduces various crystal defects, which are

shown in X-ray di↵raction results. In conclusion, this work demonstrated that p-type

B implantation can be activated at low temperature but high efficiency silicon bottom

cell should be processed before depositing the III-V seed on silicon in the fabrication

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of III-V/Si based tandem solar cell by CELOG approach to avoid the thermal budget

constraint of III-V semiconductors.

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Abstrakt

Den kontinuerliga f¨orb¨attringen av solcellse↵ektivitet ¨ar ett av k¨arnproblemen i utvecklingen av solcellsteknologier. F¨or n¨arvarande har Group III-V-sammansatta halvledarbaserade tandem-solceller e↵ektivitet rekordet och anv¨ands huvudsakligen f¨or rymdapplikationer. Trots h¨og prestanda f¨or III-V celler, s˚ a domineras den sol- cellsmarknaden av kiselbaserade solceller p˚ a grund av deras l¨agre kostnad. F¨or att f¨orb¨attra de befintliga solcellsteknikerna har olika forskare arbetat med integratio- nen av h¨oge↵ektiv III-V-solcell p˚ a kiselsubstrat. Den stora gittermatchningen mellan kisel- och III-V-sammansatta halvledare g¨or dock den direkta tillv¨axten av III-V p˚ a Si utmanande och kan resultera f¨ors¨amrad prestanda. Nyligen har forskare p˚ a KTH visat utm¨arkt kvalitet III-V p˚ a Si genom korrugerad epitaxial lateral ¨overv¨axt (CELOG) -metod. F¨or att g¨ora en tandem-solcell p˚ a Si genom CELOG-processen kr¨avs l˚ ag temperaturbehandling av kiselcell i botten. Inriktningen i detta avhan- dlingsarbete ¨ar att unders¨oka l˚ agtemperaturgl¨odgning av kiselceller med s˚ a kallad Fast Fas ˚ aterv¨axt. D¨ar det ¨oversta lagret b˚ ade amorphiseras och dopas genom jonim- plantation och efterf¨oljande termisk behandling. Metalliseringen av solcellskontakter gjordes genom fotolitografi, avdunstning och sputtering. De cellerna som presen- teras i denna avhandling har m¨atts av olika metoder s˚ asom Hall-e↵ekt, fyrpunkts probe, r¨ontgendi↵raktion med h¨og uppl¨osning (HRXRD), str¨om-sp¨anning (IV), ex- tern kvante↵ektivitet (EQE) etc. P-typ bor implantation i amorphiserad Si har ak- tiverats vid en temperatur s˚ a l˚ ag som 700 C och producerade fungerande kiselsolceller.

I allm¨anhet uppvisade de syntetiska Si-solcellerna h¨ogre omv¨ant l¨ackstr¨om j¨amf¨ort

med olika referenser, eftersom jonimplantationen introducerar olika kristallfel, vilket

visades i r¨ontgendi↵raktionsresultat. Sammanfattningsvis visade detta arbete att im-

plantering av p-typ B kan aktiveras vid l˚ ag temperatur men f¨or h¨oge↵ektiv bottencell

s˚ a b¨or kiselcellen behandlas innan deponering av III-V.

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Dedicated to my parents.

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Acknowledgments

First of all, I would like to express my greatest gratitude to my thesis supervisor, Dr. Yanting Sun. For providing this thesis opportunity and the immense guidance.

Without his mentoring this work would not be possible. During the weekly discus- sions, he has helped me developed a better understanding of the solar cell materials and related topics. His insightful feedback and guidance made my thesis work ex- tremely rewarding and enjoyable.

I would also like to thank Prof. Sebastian Lourdudoss for being my thesis examiner and having me at his research group. I am grateful for the work opportunity under such expertise in the field of semiconductors. I am also grateful to PhD Student Giriprasanth Omanakuttan, for being my second mentor and guiding me though the process and characterization tools. His help has been extremely helpful throughout the thesis work and is much appreciated. Moreover, I would like to thank the people within the HMA research group for their hospitality: Prof. Anand Srinivasan, PhD student Axel Str¨omberg, PhD student Dennis Weisser and Master student Gabriel Haddad.

Special thanks to Prof. Markus Rinio and Dr. Rickard Hansson at Karlstad University for providing help with the illuminated solar cell measurements, which are crucial part of this thesis. I would also like to acknowledge Dr. Yong-Bin Wang, for his assistance with ellipsometry measurement. Furthermore, I would like to thank the following users and instructors at Electrum laboratory for helping me with the thesis work by providing their invaluable time: Prof. Anders Hall´en, Associate Prof.

Gunnar B Malm, PhD student Mattias Ekstr¨om, PhD student Carl Reuterski¨old Hedlund, Cecilia Aronsson, Magnus Lindberg, Roger Wiklund, Reza Nikpars, Olof Oberg, PhD student Ahmad Abedin, Per-Erik Hellstr¨om and Helena Str¨omberg. ¨

Lastly but most important, I would like to thank my mother and father for their

unconditional love, support and encouragement.

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Table of Contents

Page

Abstract . . . iii

Abstrakt . . . . v

Acknowledgments . . . vii

Table of Contents . . . viii

Symbols . . . xi

Abbreviations . . . xii

1 Introduction . . . . 1

1.1 Future Energy Challenge and Climate Change . . . . 1

1.2 Brief History and Progress of Solar Cell Technologies . . . . 2

1.3 Motivation for CELOG Based III-V on Silicon Tandem Solar Cell . . . 4

1.4 Thesis Goals and Outline . . . . 6

2 Solar Cell Fundamentals . . . . 9

2.1 Solar Energy and Solar Spectrum . . . . 9

2.2 Solar Cell Structure and Operation . . . 11

2.3 Dark and Illuminated Characteristics of Solar Cells . . . 13

2.4 Cell Efficiency Loss Mechanisms . . . 14

2.4.1 Recombination and Carrier Lifetime . . . 14

2.4.2 Ideality Factor and Parasitic Resistances . . . 16

3 Experimental Techniques . . . 18

3.1 Fabrication methods . . . 18

3.1.1 Emitter Doping by Ion Implantation . . . 18

3.1.2 Thermal Annealing and Solid Phase Epitaxial Regrowth . . . . 20

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Page

3.2 Material Characterization . . . 24

3.2.1 Electrical Measurements: Four-Point Probe and Hall E↵ect . . . 24

3.2.2 High Resolution X-Ray Di↵ractometry . . . 26

3.3 Device Characterization . . . 30

3.3.1 Current-Voltage Measurement . . . 30

3.3.2 Quantum Efficiency . . . 31

4 Cell Ion Implantation, Annealing parameters and Metallization Process Flow . . . 33

4.1 W1 & W2 Silicon Pre-Amorphization and Boron Ion Implantation Pro- cess Parameters . . . 33

4.1.1 W1 & W2 Post-Implant Annealing Variables . . . 35

4.2 W3 & W4 & W5 SRIM simulation and Ion Implantation Process Pa- rameters . . . 36

4.2.1 W3: High Si-self PAI dose, W4 & W5: High-Si-self PAI dose + Nitride barrier . . . 36

4.2.2 W3 & W4 & W5 Post-Implant Annealing Variables . . . 40

4.3 Full Metallization Process flow . . . 41

5 Results and Discussion . . . 43

5.1 High Resolution X-Ray Di↵raction Investigation of Implanted Layer . . 43

5.1.1 1

st

Batch: Wafer 1 & Wafer 2 Symmetric (004) ! scans and !-2✓ scans . . . 43

5.1.2 1

st

Batch: Double- and triple-axis coupled scans comparison . . 45

5.1.3 1

st

Batch: Wafer 1 & Wafer 2 Asymmetric (113) Reciprocal Space Maps . . . 46

5.1.4 2

nd

Batch: Wafer 3 & Wafer 4 & Wafer 5 Symmetric (004) ! scans and !-2✓ scans . . . 48

5.1.5 2

nd

Batch Cells: Wafer 3 & Wafer 4 & Wafer 5 Asymmetric (113) High-Resolution Reciprocal Space Maps . . . 51

5.1.6 Estimation of Boron Concentration from Vegard’s Law . . . 54

5.2 Electrical Properties of Solid Phase Recrystallized Layer . . . 55

5.2.1 Sheet Resistance of Solid Phase Recrystallized Layer . . . 55

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Page

5.2.2 Determination of charge carrier type and density . . . 57

5.3 Solar Cell Performance of Solid Phase Recrystallized PN-junctions . . . 58

5.3.1 Current-Voltage Characteristics . . . 58

5.3.2 External Quantum Efficiency Measurements . . . 64

6 Conclusion and Future work . . . 65

References . . . 67

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Symbols

J

sc

Short-Circuit current density V

oc

Open-Circuit voltage

⌘ Conversion efficiency of a solar cell R

Sh

Shunt Resistance

R

s

Serie Resistance

V Voltage

F F Fill factor

P

max

Maximum power point

k

B

Boltzmann constant

T Temperature

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Abbreviations

a-Si Amorphous Silicon

AM Air Mass

CELOG Corrugated Epitaxial Lateral Overgrowth MOTE Million Ton of Oil Equivalent

FF Fill Factor

EQE External Quantum Efficiency IEA International Energy Agency

IPCC Intergovernmental Panel on Climate Change IQE Internal Quantum Efficiency

LBIC Light Beam Induced Current PAI Pre Amorphization-Implant SPEG Solid Phase Epitaxial Growth PV Photovoltaic

IC Integrated circuits

SEM Scanning Electron Microscope

EDX Energy-Dispersive X-Ray Spectroscopy CdTe Cadmium Telluride

CdS Cadmium Sulfide

CIGS Copper Indium Gallium Selenide NREL Nation Renewable Energy Laboratory GaAs Gallium Arsenide

Ge Germanium

InP Indium Phosphide

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1. Introduction

1.1 Future Energy Challenge and Climate Change

In the last few decades, the global energy demand has grown rapidly because of urbanization and population growth. The growing population is striving for a more energy-intensive lifestyle as the modern technologies spread across the globe. From the rise of personal computers in the late nineties to the advancement of smartphones in the past decade, modern technologies have been enabling rapid economic devel- opment as well as globalization. According to the 2017 IEA (International Energy Agency) World Energy Outlook [1], the world’s total primary energy demand in 2040 is estimated to be around 17584 MTOE (million ton of oil equivalent) which are a 28% increase from the 2016 historical value of 13760 MTOE. Thus, supplying the future global energy demand will be a great challenge.

For the time being, global energy consumption is mainly satisfied by depleting fossil fuels of oil, coal and natural gases. Although the world reserves of fossil re- sources are limited in quantity, the climatic aspect is more of concern. Already in the first United Nations Intergovernmental Panel on Climate Change (IPCC) re- port [2], the evidence of human influence on the earth’s climate system has shown a strong correlation between the growing global temperature and the increasing an- thropogenic emission of greenhouse gases. From 2000 to 2010 the total emissions of carbon dioxide, methane and nitrous oxide were highest in human history, the con- sequences attributed to climate change can be observed on all continents and across the oceans, from atmospheric warming to the raising sea level, these extreme weather and related events has negative impact on di↵erent ecosystems. Therefore, the global temperature change is another major concern of the modern society.

In order to achieve sustainable economic growth and climate friendly future, al-

ternative energy resources have been gaining significant interest in both research and

development. Among the non-fossil fuels, solar, hydro and wind are the most promis-

ing ones as they o↵er clean, renewable and climate-friendly energy. Although the

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current outputs of these renewable resources are lower than the fossil fuel production.

It is predicted that these energy resources will contribute significantly in the future power generation. In a sustainable development scenario, in year 2040, solar and wind will account for 15% and 19% of the total electricity generation respectively [1].

Therefore, continuous improvement of these emerging technologies is necessary meet the future energy challenge.

1.2 Brief History and Progress of Solar Cell Technologies

Solar cells or Photovoltaics are devices which directly convert sunlight into usable electric power by utilizing the photovoltaic e↵ect. The phenomenon was first discov- ered by the French physicist Edmond Becquerel in 1839 [3], where he experimented with di↵erent metal electrodes submerged in a electrolyte. By illumination, a volt- age and current were generated from the cell, this device is often considered as the world’s first photovoltaic cell. By 1883, Inventor Charles Fritts was able to create the first solid-state solar cell of 1% efficiency by coating selenium with a thin layer of gold. However, it was not until 1954 that the genuine predecessor of the modern solar cells was made. Prior to 1954, Physicists at Bell Laboratories discovered silicon as light-sensitive material while researching semiconductors. As result, the first modern silicon cell debuted on April 25, 1954, reaching an efficiency level of 6 percent [4].

Thereafter the development of photovoltaics has been absolutely remarkable. The conversion efficiencies of the devices are growing gradually, and plethora of di↵erent photovoltaic technologies exists to meet the future energy production. The individ- ual efficiency for novel technologies over the last few decades shown in Fig.1.1. The current existing solar cell technologies can be often divided into three generations:

• “First generation” solar cells are relatively expensive to produce and have a moderate efficiency. The cells are mainly made from silicon wafer, including mono-crystalline and multi-crystalline silicon.

• “Second generation” solar cells have lower efficiency but are considerably cheaper

to produce. Normally called thin-film solar cells and is made by depositing thin

layers of semiconductor materials on cheap substrate, i.e. amorphous silicon

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• “Third generation” solar cells are devices that are very efficient and generally referred to these solar cells currently in research. They are not commercially applicable due to either low efficiency or high cost. Typically made from variety of new materials, including nanowires, quantum dots, organic dyes, conductive polymers or have a novel structural design i.e. multi-junction.

Fig. 1.1. Nation Renewable Energy Laboratory (NREL) Solar cell effi- ciency chart, the graph shows efficiency of di↵erent solar cell technologies over the last 40 years. [5]. The red square mark the highest cell efficiencies, all are based on multi-junction design.

Despite the global research e↵ort, the low penetration of PV technology in the

energy market is primarily due to the costly productions and installations. In the

past decade, the first-generation silicon based photovoltaics has gain significant mar-

ket share due to the rapid development of integrated circuit industry, the silicon solar

cell benefits tremendously from the silicon IC in term of the reduced material cost

and interchangeable manufacturing processes. In the foreseeable future, the crys-

talline silicon solar cells are expected to continue dominating the PV industry. Thus,

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increasing the efficiencies of the existing silicon cells further can be beneficial by using current facilities, one of the best way to achieve higher efficiency is to introduce a high band-gap semiconductor solar cell on top of the current silicon solar cell, so-called multi-junction or tandem solar cells.

1.3 Motivation for CELOG Based III-V on Silicon Tandem Solar Cell According to the Shockley-Queisser detailed-balance model [6], the optimum semi- conductor for a single junction should have bandgap about 1.34 eV, which results in the energy conversion efficiency limit around 33.7%. One way to overcome this limit of single-junction architectures is to stack di↵erent band-gap semiconductor pho- tovoltaics in optical series shown in Fig.1.2(a). This enables splitting of the solar spectrum, where wide bandgap materials are placed at the top of the system to filter the incoming high-energy photons and the small bad gap materials are placed at the bottom of the tandem system to absorb less energetic photons.

Traditionally, the State-of-Art multi-junction solar cells are made by compound

semiconductor materials of group-III and group-V, which possesses a number of at-

tractive properties for photovoltaic applications. I.e. direct bandgap, large absorption

coefficients, thin layer, etc. Although the expensive cost, they are mainly developed

for space satellite applications due to their high efficiencies. The III-V multi-junction

solar cell are commonly epitaxially grown on GaAs, Ge or InP substrate, these wafers

are not only smaller in diameter compared to silicon wafer but are also more fragile

and expensive. Therefore, using silicon substrate for the bottom cells are of great

interest due to the facts that Silicon is second most abundant element on Earth, high

quality Si wafer are relatively cheap in cost and Si based process technologies are

widely available. Furthermore, Si also has the proper bandgap for an efficient current

match to various practical top cells, a theoretical calculation for conversion efficiency

limit of di↵erent tandem configuration of non-silicon bottom cell and silicon bottom

cell is shown in Fig.1.2(b). Where the author M. A. Green proposed that for a dual-

junction cell, the efficiency limit of a free choice non-silicon bottom cell is 45% which

is only 2.5% higher than for the silicon counterpart [8].

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(a) Schematic of an dual junction solar cell [7].

(b) Caculated efficiencies [8].

Fig. 1.2. a) Tandem configuration. b) calculated efficiencies for di↵erent tandem configurations.

There is numerous way to integrate III-V material on Si substrates. Convention- ally, by wafer bonding technique or epitaxy, both approaches have their own advan- tages and drawbacks: historically, wafer bonding of III-V on Si has provided the most desirable material quality for the active devices due to the fact that the III-V materials are grown on the native substrate and subsequently transferred to silicon substrates.

However, the significant cost of native substrate and subsequent bonding processes

make it non-viable for terrestrial photovoltaic applications. Whereas III-V integra-

tion on Si by epitaxy is applicable since less raw material and no native substrate are

being used. the direct epitaxial growth of III-V on Si has shown to contain various

defects and dislocations due to the large lattice mismatch between III-V and Si. The

misfit dislocation and threading dislocation inside the epilayer have shown to severely

deteriorate the device performance. Recently, Researchers at KTH led by Professor

Sebastian Lourdudoss and Dr Yanting Sun have demonstrated excellent quality III-

V on Silicon by so called corrugated epitaxial lateral overgrowth method shown in

Fig. 1.3. The laterally grown III-V compound semiconductor on Silicon by CELOG

process was shown to be of outstanding quality, where no threading dislocations were

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present [9]. Therefore, CELOG based III-V/Si heterojunction with reduced defect density provide an excellent way to fabricate high efficiency multi-junction solar cells.

Fig. 1.3. a) Schematic of circular InP seed layer on silicon. b) top view SEM image of the InP seed layer. c)SEM image of GaInP on Silicon. [9]

1.4 Thesis Goals and Outline

The initial goal of this thesis was the investigation of III-V on Silicon multi-

junction solar cell. However, the problem arose when the silicon bottom cell with

patterned InP seed are subject to post-ion implantation thermal treatment, shown in

Fig.1.4. This step is crucial for the formation of Si pn-junction where dopant become

electrically active and the ion implantation induced defects are removed. Intuitively,

this issue can solve by processing of the silicon bottom cell before depositing the InP

seed. However, the highly specialized InP seed on Si wafers were grown epitaxially by

an external vendor and is crucial for CELOG process, Therefore, other methods were

considered. One of the possible solutions is so called Solid Phase Epitaxial Growth

(SPEG) of amorphous layers, where pre amorphization implantation is used to induce

a topmost amorphous layer, followed by a normal dopant ion implantation. As result,

this structure can be recrystallized and electrical activated by a lower temperature

thermal process.

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Fig. 1.4. SEM and EDX image of Patterned InP seed layer on Silicon, after 900 C annealing. The first column shown SEM figure of the circular InP seed on Silicon, where top image is magnified. The second column are EDX image of silicon content, the white contract indicates trace of silicon atoms. The third column are indium content and last column are phosphorous content, it is clearly shown that phosphorous content are evaporated.

The main objective of this thesis work is to investigate and develop a silicon bottom cell for CELOG based silicon tandem solar system. The author will design, fabricate, characterize and optimize the sub-cell fabrication procedure, with emphasis on the following points:

• Low temperature annealing for dopant activation and damage removal.

• Adequate solar cell performance in term of small leakage current and adequate conversion efficiency.

• High surface doping for tunnel junction.

The sequence of this thesis is presented in the following order. In Chapter 2, brief

theoretical background for Solar energy and solar cell device physics are reviewed.

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Chapter 3 describes the experimental details and techniques used in this thesis to fabricate and characterize the silicon solar cell prototypes. Complete fabrication process flow can be found in the last section 3.4.2.

Furthermore, all the experimental results are summarized in Chapter 4, such as electrical, optical and physical data are analyzed and compared with other similar publications.

Finally, an overall summary of this thesis is concluded in Chapter 5 and future

work are suggested.

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2. Solar Cell Fundamentals

This chapter will review the theoretical background of solar cell fundamentals and device physics. Firstly, the brief introduction to solar energy and air mass spectrum are described, followed by the fundamentals of solar cell, such as the physical mech- anism behind p-n junction and ideal diode equations. Lastly, a brief description of efficiency loss mechanisms is introduced.

2.1 Solar Energy and Solar Spectrum

The Sun is the greatest energy resource known to mankind, the energy from the Sun powers Earth’s climate and is essential for many nature processes and lifeforms.

When compare with the other energy resources on Earth, which are essentially by- products of solar energy. The solar availability dwarfs all the other combined, it is estimated that one year’s worth of solar energy would far exceed the reserves of the finite fossil energy resources [10].

This tremendous amount of energy originates from the continuous thermonuclear fusion process inside Sun’s core. Through convection, the generated energy transfers towards the surface of the Sun, where the temperature reaches about 5800 Kelvin [11].

At this elevated temperature, most of Sun’s energy emits outward into the outer space

as electromagnetic radiation in wavelength range of visible and near-infrared. This

radiation spectrum can be approximated by a black body radiator at 5743 Kelvin

shown in Fig.2.1. This approximation is comparable to the measured solar spectrum

outside Earth’s atmosphere, also referred as the Air Mass Zero solar spectrum, plotted

in the same figure.

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Fig. 2.1. Solar spectrum [12].

The concept of Air mass coefficient was introduced to distinguish the diverse solar spectrum for various atmosphere conditions and incident angles show in Fig.2.2. Air mass can be quantified by the following equation:

AM = 1

cos ✓ (2.1)

Fig. 2.2. Air Mass [13].

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2.2 Solar Cell Structure and Operation

The simplest photovoltaic cell is essentially a p-n junction, typically a silicon homo-junction where each side is asymmetrical doped. A schematic of a basic solar cell is shown in Fig.2.3, it consists of a moderate doped n-type semiconductor sub- strate (e.g. negative, with donor doping), a narrow and more heavily doped p-type emitter (positive, with acceptor doping), the finger-shaped metal electrodes are de- posited on top so illuminations (photons) can enter the device and the backside is fully covered by back contact.

This simple solar design was implemented in this thesis work. The more advanced device elements which were not included in Fig.2.3, such as textured surface for light trapping, surface passivation, anti-reflective coating and back surface field were not investigated by the thesis author and therefore omitted from the theory part. Readers are referred to additional readings [14], [15] for more detailed information.

Fig. 2.3. Schematic of a simple solar cell device.

Consider Fig.2.3, the imbalance of electron and hole concentration between the

two sides results in interdi↵usion of electron from the n-type substrate to the p-type

emitter and for holes in the opposite direction. Right at the junction interface, a small

region consequently becomes depleted due to the interdi↵usion of charge carriers and

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subsequent recombination at respective side. The remaining charged dopant ions create an internal electrical field which act opposite to the di↵usion direction, as results a potential di↵erence at the junction interface. This built-in potential or built-in voltage is defined as:

bi

= k

B

T

q ln( N

d

N

a

n

2i

) (2.2)

where

kTq

is the thermal voltage, N

d

and N

a

are doping concentration for respective junction side and n

i

is the intrinsic carrier concentration. This space charge region is also known as the depletion region penetrates primarily into the lighter doping side, the total width of depletion region can be estimated by equation:

W

dep

=

s 2"

s bi

qN (2.3)

When light is illuminated on a p-n junction, the photons will penetrate into the silicon solar cell device. For each absorbed photon, an electron hole pair (EHP) is created by excitation of an electron from the valence band to the conduction band.

Dependent on the photons energy, it is absorbed in di↵erent device depth. Where short wavelength photons are absorbed at topmost silicon layers, long wavelengths at bottom. The EHPs generated in the depletion region are immediately separated by the built-in voltage, where the electron drifts toward the n-side and hole the opposite.

For EHPs generated outside depletion region, the carriers di↵use around as there is no electric field, these carriers will di↵use until they reach the depletion region and sweep across the junction or recombine in the emitter or bulk. Therefore, minority carrier di↵usion lengths are important parameters of the emitter and bulk layer and are defined by equation:

L

e

= p D

e

e

L

h

= p D

h

h

(2.4)

where ⌧

e

and ⌧

h

are minority carrier life times for electron and hole respectively,

D

e

and D

h

are the di↵usion coefficients defined as the product of mobility and the

thermal voltage:

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D

e

= k

B

T q µ

e

D

h

= k

B

T q µ

h

(2.5)

When minority carriers are collected and sweep over to the majority carrier side, the equilibrium condition of the diode is disturbed, where neural p-side become more positive and n-side the opposite. As result an open circuit voltage is generated be- tween the terminals of the device. By shorting the diode, the photogenerated electron from n-side will flow through the external circuit to neutralize the photogenerated holes at p-side. This current due to the flow of photogenerated carriers is called short-circuit current also known as photocurrent. Consequently, if an external load is connected to the illuminated device, the photocurrent flow through the external load results in delivering power.

2.3 Dark and Illuminated Characteristics of Solar Cells

Essentially, the output current of an illuminated solar cell can be expressed as

I = I

0

(e

qV /nkBT

1) I

ph

(2.6) where V is the voltage, I

ph

is the photogenerated current, I

0

is the diode saturation current density, n is the diode ideality factor, q is the electric charge, k

B

is the Boltzmann’s constant and T is the temperature. The first term on the right-hand side of equation is the famous Shockley diode equation [16], represents the diode current under dark condition and the second term is the photogenerated current, which can be approximated by the short-circuit current. The typical current-voltage characteristics of a solar cell under dark and illuminated condition is shown in figure. When the solar cell is illuminated the dark characteristics shift down by the photogenerated current.

The fourth quadrant region of this plot is where power can be extracted from the

diode.

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Fig. 2.4. Dark current-voltage characteristics and illuminated for di↵erent light intensities.

Hence, the energy conversion efficiency for a solar cell is given by:

⌘ = P

max

P

in

= J

sc

V

oc

F F P

in

(2.7) where, I

sc

is the short-circuit current, V

oc

is the open circuit voltage F F is fill factor and P

in

is the incident light intensity. From equation, it is clearly that in order to maximize the conversion efficiency three parameters need to be maximized. These three parameters are commonly used to characterize solar cell output:

The first one is the short-circuit current, the second parameter represent the open- circuit voltage which is given by equation when the total current equal zero:

V

oc

= nk

B

T q ln( I

sc

I

0

+ 1) (2.8)

and the last one is the FF factor, which is dependent on the maximum power from the solar cell. P

m

is the maximum power point.

F F = J

mp

V

mp

J

sc

V

oc

, P

max

= J

mp

V

mp

(2.9)

2.4 Cell Efficiency Loss Mechanisms

2.4.1 Recombination and Carrier Lifetime

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short carrier lifetime is so call recombination processes, in photovoltaic applications, low recombination is a key factor for solar energy conversion. There are primarily three types of recombination in semiconductors, Radiative, Auger and Shockley-Read- Hall (SRH) recombination.

Fig. 2.5. Di↵erent recombination mechanisms [17].

• Radiative recombination is a type band-to-band recombination and is the in- verse process of direct optical excitation of electrons. This recombination pro- cess results in spontaneous emission of photon corresponding to the bandgap energy and is a dominating loss mechanism in direct bandgap semiconductors, where the conduction band minimum and valence band maximum has the same crystal momentum. In silicon, this process is negligible.

• Auger recombination are due to the Auger e↵ect, where an electron recombine with a hole gives the excess energy to a second electron instead of emitting light.

The second electron is excited and relaxation to its original state by emitting phonons. It is a dominant recombination process for material with impurity levels greater than 10

18

cm

3

.

• Shockley-Read-Hall (SRH) recombination also known as trap-assisted recombi-

nation occurs due to allowed energy levels within the forbidden bandgap, these

levels are created by defects and impurities in the crystal lattice. The electrons

are relaxed from the conduction-band to the defect level and further down from

defect level to valence band and recombine with a hole. As results the two-step

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recombination process are very efficient. Hence, surfaces and grain boundary with plenty of localized states lying within the forbidden bandgap are especially prone to this recombination process.

2.4.2 Ideality Factor and Parasitic Resistances

Although the single diode model is commonly used to model photovoltaic cells, the ideal model with ideality factor n=1 only accounts for the recombination in the quasi-neutral region of the solar cell [?]. For a real solar cell, recombination through trapping levels in depletion regions are sometime present due to error in design and manufacturing. Thus, including recombination inside depletion region adds an addi- tional term to the dark diode current where the ideality factor is close to 2. As result, the overall dark current can be given by the two-diode model and is given by:

I

dark

= I

01

(e

qV /n1kBT

1) + I

02

(e

qV /n2kBT

1) (2.10)

Furthermore, in a real solar cell device, there are di↵erent parasitic resistances

present in the cell which deteriorates the overall performance, contributors to series

resistance Rs are the bulk resistance of the semiconductor material, bulk resistance

of the metallic contact and lastly the contact resistance between the metallic contact

and the semiconductor. The shunt resistance is caused by leakage across the p-n

junction. It can be around the edge of the cell or across the depletion itself due

to presence of crystal defects and precipitates. Both types reduce the fill factor as

indicated in figure.

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(a) . (b) .

Fig. 2.6. e↵ect of series resistance and shunt resistance on fill factor.

The equivalent circuit of two diode model of a typical solar cell with series resis- tance and shunt resistant elements are shown in figure and is expressed by equation:

I = I

ph

[I

01

(e

q(V +IRs)/n1kBT

1) + I

02

(e

q(V +IRs)/n2kBT

1)] V + IR

s

R

sh

(2.11)

Fig. 2.7. equivalent circuit of two-diode model [19]

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3. Experimental Techniques

In this chapter, the experimental techniques and procedures used in this thesis work will be described, including the ion implantation simulation tool, fabrication tech- niques for prototyping the silicon solar cell, characterization methods.

3.1 Fabrication methods

3.1.1 Emitter Doping by Ion Implantation

Ion implantation is a conventional doping technique for the formation of p+ or/and n+ regions in microelectronics manufacturing, however in the recent years, the solar cell community have shown considerable interest to incorporate ion implantation in solar cell manufacturing, di↵erent solar cell designed with ion implanted emitter and back surface field have shown promising results. In principle, the ion implantation process involves energetic ions bombardment of the target sample, where electrical activation may be achieved by subsequent thermal treatment. The advantages of ion implantation compared to other doping techniques are the precise control of dopant amount and the well-defined depth distribution. A typical ion implanter is shown in Fig.3.1. It consists of several major components:

• An ion generating source, it can be either solid, liquid or gases.

• An ion extracting and focusing mechanism in form of electrostatic lens.

• A mass analyzer using magnetic field to separate the selected ions with certain mass and charge.

• An accelerating column to accelerate or decelerate the ions to the required kinetic energy.

• A scanning system and the wafer station.

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Fig. 3.1. Schematic of a typical ion implanter. [20]

field and guided into a mass analyzer, where the desired ions are screened by mass and charge. Subsequently, the selected ions are accelerated and focused into an ion beam. Finally, the ion beam is scanned across the sample. There are several impor- tant factors when considering ion implantation, the relative mass di↵erence between dopant ion and the target atom and how ion energy a↵ects the depth distribution, since The penetration depth of the ions is primarily determined by the beam energy, typically in the range of values between few keV to few MeV. When consider ions with large kinetic energy inside a crystal lattice, the energy losses can be explained two stopping mechanisms:

• Electronic stopping: Where electronic stopping is due to the inelastic interaction between energetic ions and electron cloud.

• Nuclear stopping: whereas nuclear stopping are nuclei are displaced by collision.

The ion beam angle of incidence and ion beam dose. The implanted dose or fluence is quantified as the total number of ions per area (cm

2

) and is given by the product of flux and the implantation time, described be the following equation

= It

qA (3.1)

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where the beam current (I), implant area(A), implant time (t) and q is the charge of the ions. The main drawback of ion implantation process is the defect formations.

Primary defects are created during the implantation process itself, mainly due to collision between high energetic ions and target atoms in the crystal lattice. During the slowdown, the implanted ions interact anelastically with electrons and elastically with target atoms described in previously. For collisions with sufficient energy trans- fer (above the displacement threshold energy, 15 eV for Si), the knock-on atom will displace from the lattice site, which leave behind a vacancy. Moreover, the displaced atom will recoil with remaining kinetic energy and end up whether creating collision cascade or halt in interstitial sites. Accumulation of defects and disorder eventually lead to amorphization of the material, this critical limit have been studied by sev- eral group. Furthermore, a highly defective region (End-Of-Range (EOR) defects) is formed between the amorphous layer and crystalline due to incomplete amorphiza- tion, illustrated in Fig.3.2.

Fig. 3.2. Illustration of defect distribution of ion implanted samples. [21]

3.1.2 Thermal Annealing and Solid Phase Epitaxial Regrowth

Thermal treatment after ion implantation step is crucial for electrically activa-

tion of the dopant and the damage recovery. The amorphous silicon recrystallized by

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tion in the silicon lattice and becoming electrically active. In this thesis work, the ion implantation samples were annealed in Hydride-Vapor Phase Epitaxy (HVPE) reactor, where a phosphine ambient can be introduced to protect the evaporation of phosphorous in the InP seed layer. Furthermore, Rapid thermal annealing is used to investigate short time e↵ect on the samples. Di↵erent temperature and time are investigated to determine optimal thermal condition.

3.1.3 Front Contact Patterning by Photolithography

Lithography technique are one of the most important process step in the semi- conductors related manufacturing, it enables patterning of device structure by using so called photoresist, a chemical substance sensitive to UV light. By exposing the resist though a photomask and selective removal of the unwanted resist. Di↵erent device pattern can be transferred from the photomask to the sample surface. There are two kinds of photoresist. Positive and negative, when positive resists are exposed, the photoresist’s chemical bonds changes so that it becomes more soluble in the de- veloper. Negative resist behaves in the opposite, where the exposed resist become harden and the unexposed are removed during development.

In this experimental work, the solar cell front metal pattern was defined by lift-

o↵ technique shown in figure. Before the photoresist deposition, the samples were

cleaned with standard procedure of acetone and isopropanol, thereafter a thin layer

of HMDS (Hexamethyldisilazane) is applied for photoresist adhesion. Furthermore,

Negative resist ma-N 1420 was manual spun with a spin coater for 30 seconds, 3000

RPM. This results in a film thickness around 2 µm. This thickness is suitable for

producing under-cuts for lift-o↵ processes. Undercuts is crucial in lift-o↵ process

due to the second development step, where excess metal on photoresist are removed

with acetone/developer in an ultrasonic bath. After the prebake step, the wafers were

exposed in a Karl Suss MA6/BA6 mask aligner. The equipment features a 350W Mer-

cury (Hg) vapor lamp, which produce a broadband exposure spectrum with several

photon emission lines (e.g.h.i-lines). The samples were exposure in vacuum contact

mode which magnification 1:1 and a resolution around 0.1-1 µm. After exposure the

samples were developed in a developer solution ma-533, the defined contact opening

after development with undercut is suitable for lift o↵ process.

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Fig. 3.3. Front contract with lift o↵ step.

3.1.4 Frontside and Backside Metallization

A solar cell contact can be deposited by variety of di↵erent techniques, printed contact, lithography followed by evaporation or sputtering, laser grooving. In this work the front contacts are lithographically defined by lift-o↵ process described in previous section. The front metal stack is deposited by e-beam evaporation, shown in Fig.3.4(a). It is a type of physical vapor deposition technique whereby a high energetic electron beam is generated from a filament. The beam is steered by a magnetic field to strike the source material and vaporize it within a vacuum chamber.

The used evaporator Provac PAK 600 Coating System operate around 10

6

mbar and can deposit a variety of metals: AuGe,Au, Ni,Pd, Pt, Ti, Cr, Ge, Al, Mo,W.

The subsequent backside metallization was done by ion beam sputtering, it is

a deposition technique involves an ion beam to sputter the target material onto a

substrate, schematic shown in Fig.3.4(b). The sputter deposition ion source produces

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deposition technique o↵ers precise thickness control due to its well-controlled rate, another advantage of ion beam sputtering is the pre-clean and assist ion source, where Argon ion beam is available for substrate surface pre-clean, e.g. oxide removal.

The ion beam sputter used in this thesis, Commonwealth Scientific Corporation Ion Beam Sputtering Tool o↵er limited target material. e.g. Al, Ti/TiW, Ni, Ag/Au.

Finally, post-metallization forming gas anneals (FGA) at 500 C for improved contact resistivity.

(a) e-beam evaporation. [22] (b) ion beam sputtering deposition. [23]

Fig. 3.4. Metallization tools.

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3.2 Material Characterization

In this section, brief reviews of the material characterization techniques are pre- sented. All of these techniques are non-destructive and were used in the intermediate steps during device fabrication.

3.2.1 Electrical Measurements: Four-Point Probe and Hall E↵ect Four-Point Probe

The four-point probe technique is a simple method to measure the semiconductor resistivity, the measurement principle relies on four in-line metal probe tip contacting the sample. Shown in figure, where a current is sourced between the first and last probe while voltage is measured between the two inner probes. In this way, resistance contribution due to contact and wire can be eliminated or minimized as result this method is an absolute measurement without the need to calibrate.

Fig. 3.5. Four-point probe measurement. [24]

When characterizing thin semiconductor layers or films, the measure of the sheet resistance R

sheet

is often used. For a uniformly doped sample, the sheet resistance is given by:

⇢ V

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In solar cell devices, the lateral resistance is an important factor of performance since to high sheet resistance will increase the series resistance. Therefore, four-point probe measurement provide a simple way to characterize the lateral resistance of the solar cell emitter. In this work a automatic four point probe meter (Four Dimension Inc. Model 280) was used to characterize the emitter sheet resistance after post-ion implantation thermal treatment.

Hall E↵ect Measurement

Hall e↵ect measurements are commonly used to determine the fundamental trans- port properties of semiconductor materials. The underlying principle of Hall e↵ect measurements is the Lorentz force, given by:

F = q(v ⇥ B) (3.3)

where q is the electric charge of a particle moving inside the magnetic field B and v is the particle’s velocity perpendicular magnetic field direction, the direction of the force exerted on the particle is both perpendicular to the magnetic field and the velocity. Accordingly, in the experimental shown in figure. A current carrying semiconductor is subject to a magnetic field perpendicular to the currents direction, The Lorentz force exerted on the charge carriers due to electromagnetic field creates a transverse electrical current perpendicular to both the magnetic field and the ap- plied current, which in turn creates a measurable voltage across the sample. This voltage is refereed as the Hall voltage and can be used to derive important material parameters such as majority carrier type, carrier mobility and carrier concentration.

These parameters are direct related to the semiconductor’s conductivity or resistivity via equation:

= 1

⇢ = qnµ (3.4)

where is the material’s conductivity, ⇢ is the material’s resistivity, q is the

majority carrier charge, n is the majority carrier concentration and µ is the carrier

mobility. By measuring resistivity with van der Pauw technique and the Hall voltage,

the mobility can be derived from equations:

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µ = |R

H

| = |R

H

|

⇢ (3.5)

R

H

= V

H

t I

x

B

z

(3.6) where R

H

is the Hall coefficient, V

H

is measured Hall voltage. I

x

is the total cur- rent density and t sample thickness. Furthermore, the majority carrier concentration can be obtained from:

n = 1 qR

H

(3.7) In this experiment, a KTH in house-built hall measurement setup is used, the tool comprised of a Varian 4kG magnet, Keithly 220 Current source Keithly 486 Picoamp meter, Keithly 196 DMM, Keithly K7001 Controller (scanner), Lakeshore MPS 622 (magnet power supply), ADP closed cycle He cryostat. Shown in figure,

The sample preparation consists of cleaving the sample into a square about 1x1 cm

2

, oxide removal by HF and pure indium dots were place at the corners for ohmic contact, shown in figure. Several di↵erent samples were measured under room tem- perature.

3.2.2 High Resolution X-Ray Di↵ractometry

High-resolution X-ray Di↵raction (HRXRD) was used in this thesis project to characterize the structural changes of the emitter layer due to ion-implantation and annealing processes. X-ray characterization techniques are well-established and ex- cellent for material analysis due to their non-destructive nature and sensitivity to atomic spacing variations. HRXRD enable ex-situ investigation of epitaxial layers, heterojunctions and superlattice structures. Information regarding the physical prop- erties can be obtained, e.g. lattice relaxation, composition, strain, etc. Further- more, the scientific community have been utilizing XRD for structural investigation of ion-implantation induced defects and strains for di↵erent implant ions and sub- strates [25] [26].

When X-ray beams are incident on a crystal, the radiations will be scattered at

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conditions, the scattered X-rays interfere constructively along a specific direction.

This di↵raction phenomenon was described in 1913 by W.L Bragg. In his theoretical framework, he formulated a simplified interpretation of di↵raction shown in figure below. When three parallel x-ray beams with same wavelength and phase approach the crystalline lattice planes with inter-planar spacing d and are scattered by di↵erent atoms. The two lower beams travel extra length of 2d sin theta and 4d sin theta respectively. Constructive interference occurs when this extra wavelength path equal to an integer multiple of the incident x-ray wavelength.

Fig. 3.6. Illustration of x-ray di↵raction in crystalline lattice

Mathematically, this di↵raction condition can be described by following equation, also known as Bragg’s law of di↵raction:

n = 2d

hkl

sin⇥ (3.8)

where n is the integer multiple, lambda is the incident x-ray wavelength; d is the

spacing between two adjacent planes and theta is the incident angle. By performing

a scan with known incident x-ray wavelength and the outgoing angle is kept equal to

the incoming angle with respect to the crystal planes, the interplanar distance of the

crystal lattice can be obtained by Bragg’s law. For more comprehensive description

on X-ray di↵raction techniques, the readers are referred to following references [27].

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In this work, a PANalytical X’Pert high-resolution X-ray di↵ractometer was used.

The instrumental configuration is shown in Fig.3.7. This instrument features a high voltage (1.8 kW, 50 kV, 45 mA) vacuum sealed copper x-ray source, a four-bounce Ge (220) monochromator inserted between x-ray source and sample stage to produces highly monochromatic Cu K↵1 ( = 1.540562˚ A) x-ray beam, a sample stage attached to a goniometer to achieve following sample rotations and displacements:

• Omega (!) adjust the angle between incident x-rays and sample surface.

• 2Theta (2✓) adjust the angle between incident x-rays and detector.

• Psi ( ) adjust the sample tilt.

• Phi ( ) adjust the in-plane sample rotation.

• x, y in-plane displacement of the sample. z vertical displacement of the sample. High surface doping for tunnel junction.

Fig. 3.7. Schematic of the high-resolution x-ray di↵ractometry.

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detector with a large aperture. This allows collection of wide range of angles where the Bragg di↵raction condition is satisfied. In triple-axis setting, a 2-crystal analyzer is placed in between sample stage and the gas-filled proportional detector. This optional element restricts the angular acceptance of the detector to 12 arc-seconds; thus, the detector only collects a specific Bragg angle and eliminate the other di↵racted x-rays from disorientation and grains. In triple-axis mode, the di↵ractometer is capable of 2-dimensional mapping of the reciprocal space.

In HRXRD experiments, the x-ray di↵ractometer can operate in di↵erent scan modes. In this thesis work, three types of scan technique were used. Each scan technique corresponding to di↵erent type of scanning movement in reciprocal space.

• In the rocking curve or ! scan, the detector is fixed at a specific Bragg angle and the sample is rotated, i.e. x-ray incident angle ! is changed with sample stage rotation. In reciprocal space, this scan movement corresponds to an arc shaped scan path centered on the origin shown in figure below. The di↵erent Bragg angles corresponding to di↵erent d-spacing of the scattered planes. From the width and the shape of the peak one can estimate the material quality and defect density. Since a perfect crystal has an intrinsic width (FWHM) for specific material. Defects cause the rocking curve to broaden beyond the intrinsic width.

• In coupled scan or !/2✓ or 2✓/! scan, both sample stage and detector is rotated simultaneously, where the detector rotation rate is kept twice the rate of the sample stage so the incident angle 2! = 2✓. This scan movement in reciprocal space is a straight line pointing away from the origin i.e. along the scattering vector for a certain (hkl) reflection, shown in figure b.

• Reciprocal space mapping (RSM) is the most complex technique in HRXRD

experiment, the two-dimensional intensity spectrum is obtained by measuring

multiple !/2✓ scans where each scan has an o↵set ! in omega direction. Recip-

rocal space maps provide more comprehensive information regarding the sample

composition, strain, layer tilt, relaxation, etc. By combining scans of symmetric

and asymmetric reflections, full crystallographic properties can be obtained.

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3.3 Device Characterization

In this section, the solar device characterization techniques used in this work are described. The fully processed solar cells were first characterized by the author at KTH Kista, where dark diode characteristics were assessed. Subsequently, the work- ing devices were sent to Karlstad University for standard solar cell characterization.

The solar cells were evaluated by Post-doc Researcher Rickard Hansson, where results of LBIC, EQE and conversion efficiency were obtained.

3.3.1 Current-Voltage Measurement

Solar cell current-voltage measurements are the most efficient method to evaluate the device performances. The overall device efficiency can be determined by extract the key parameters from illuminated and dark I-V curves as explained in previous chapter, i.e. short-circuit current, open-circuit voltage, series resistance, shunt re- sistance, diode ideality factor. A typical I-V measurement system is composed of a test bed with cooling or heating for device mount, an illumination source and a data acquisition system. In this thesis project, a Keithley 4200-SCS Parameter Analyzer and a Cascade Summit 11K manual probe station were used to characterize the dark diode characteristics of the fabricated cells. The connections to the DUT are shown in Fig.3.8, where kelvin configuration is used to minimize the systematic error from contact and the lead resistances.

(a) Measurement connection. [28] (b) Probestation.

Fig. 3.8. IV schematic and Probe station.

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3.3.2 Quantum Efficiency

The current and voltage response of a solar cell have strong dependence on the wavelength of the incident light. The measured solar cell performance when irradi- ated by a particular wavelength of light can be quantified by the quantum efficiency.

It is an indication of the solar cell current generation and loss when irradiated with a particular wavelength of light. These results in a continuous spectrum measure- ment with corresponding photocurrent. There are three di↵erent terminologies when measuring the quantum efficiency.

• External Quantum Efficiency (EQE) is the ratio of total collected charge carriers to the total incident photons.

EQE = number of charge carriers

number of incident photons (3.9)

• The Surface Reflectance is a measure of how much di↵erent wavelengths are reflected by the topmost surface.

• Internal Quantum Efficiency (IQE) is the ratio of total number of collected charge carriers to the total number of absorbed photons.

IQE = number of charge carriers

number of absorbed photons = EQE

1-Reflectance (3.10)

Fig. 3.9. Illustration of the typical EQE, Reflectance and IQE curves. [29]

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The schematic of a typical experimental setup is illustrated in Fig.3.10. A Xenon lamp with monochromator is used to generate the specific wavelength of incident light and the photocurrent is measured under short-circuit conditions. Additionally, white light biasing or white light soaking method is crucial in EQE measurement due to the photocurrent’s non-linearity to the illumination intensity. Thus, the solar cell under test is illuminated with additional white light to emulate the 1 sun condition. In order to di↵erentiate the di↵erent photocurrent generated from monochromatic light and the white light, an optical chopper and a lock-in amplifier is used.

Fig. 3.10. EQE measurement setup. [30]

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4. Cell Ion Implantation, Annealing parameters and Metallization Process Flow

This chapter will review the ion implantation process and annealing process param- eters. Furthermore, a complete metallization flow.

4.1 W1 & W2 Silicon Pre-Amorphization and Boron Ion Implantation Process Parameters

The low temperature doping activation has been heavily investigated for CMOS applications, several groups have demonstrated working pn junction from solid phase epitaxy growth. The silicon pre-amorphization of the first-generation cells was ac- complished by using pre-existing PAI recipe from Ion Technology centre at Uppsala University. Two silicon (100) oriented, n-type (phosphorus doped) monocrystalline silicon wafers (W1 & W2) were implanted with a dose of 2 ⇥10

15

Si cm

2

at 100 keV. The pre-amorphization recipe produces a continuous 120 nm amorphous silicon layer and was verified by spectroscopic ellipsometry, the measured data from five wafer spots were fitted in the built-in Taur-Lorentz amorphous model. The fitted amorphous silicon layer thickness was obtained to be about 126 ±3 nm.

The subsequent boron ion implantations were done at several di↵erent ion ener-

gies and doses. The ion implanted boron distributions were simulated in the Monto

Carlo based software, Stopping and Range of Ions in Matter (SRIM) [31]. Three

boron implants with di↵erent energy and corresponding dose were used to produce a

continuous box shaped dopant profile, the simulated dopant distribution is shown in

Fig.4.1. The doses di↵erence between wafer 1 and wafer 2 were selected to validate

the dose e↵ect on device characteristics. The uppermost limit of the wafer 1 boron

dopant distribution is about 0.5 ⇥10

20

cm

3

and is considered as low dose whereas

wafer 2 is the high dose sample with limit of 4 ⇥10

20

cm

3

. The full ion implantation

process parameters are shown in table 4.1.

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(a) Wafer 1. (b) Wafer 2.

Fig. 4.1. Boron dopant distribution for Wafer 1 and Wafer 2, calculated from SRIM Simulation.

Table 4.1.

Wafer 1 & Wafer 2 ion implantation process parameters

Sample Parameter No. of Implantation

Si-PAI 1

st

B 2

nd

B 3

rd

B

Wafer 1 Ion energy (keV) 100 2 5 15

Ion dose (cm

2

) 2 ⇥10

15

1.2 ⇥10

15

3.0 ⇥10

14

1.0 ⇥10

15

Wafer 2 Ion energy (keV) 100 2 5 15

Ion dose (cm

2

) 2 ⇥10

15

4.7 ⇥10

15

8.0 ⇥10

14

3.5 ⇥10

15

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4.1.1 W1 & W2 Post-Implant Annealing Variables

Post-implantation annealing step is crucial for the recrystallization of the amor- phous layer and the electrical activation of dopants. In this thesis study, the annealing conditions of the co-implanted samples were varied to evaluate the temperature and time e↵ect on the final device performance. The annealing parameters from several preceding SPEG studies [32] [33] were considered and the annealing conditions of this study were selected as following:

Relatively low annealing temperatures of 650 C and 700 C for 30 seconds were selected for the short time low temperature experiment in comparison to conventional high temperature at 1000 C for 15 seconds. The short time annealing of the samples was done in a rapid thermal processing system. For longer annealing time at low temperatures, the samples were annealed in a HVPE reactor at 600 C and 700 C for either 30 minutes or 60 minutes. The full annealing conditions of wafer 1 and wafer 2 are summarized in table 4.2 below.

Table 4.2.

Wafer 1 & Wafer 2 annealing conditions

Sample Temperature( C)

Time

RTA HVPE

15 sec 30 sec 30 min 60 min

Wafer 1

600 ⇥

650 ⇥

700 ⇥ ⇥

1000 ⇥

Wafer 2

600 ⇥

650 ⇥

700 ⇥ ⇥

1000 ⇥

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4.2 W3 & W4 & W5 SRIM simulation and Ion Implantation Process Parameters

4.2.1 W3: High Si-self PAI dose, W4 & W5: High-Si-self PAI dose + Nitride barrier

Adjustments of ion implantation parameters were made to improve the device performance. It is evident that the previous batch implantation profiles were not optimal for solar cell applications. Several studies suggest that the amorphous and crystalline interface should be contained within the boron profile, the related studies shown least leakage current for a/c inside the doped region [32] [33]. In batch 2, three di↵erent ion implantation profiles were designed to test the device performance. The pre-amorphization implantation was altered to produce a continuous amorphous layer of silicon. The silicon pre-amorhpization energy was decreased from 100 keV to 40 keV and the dose was increased from 2 ⇥10

15

to 5 ⇥10

15

to ensure the emitter layer is continuous amorphous. The main di↵erences between wafer 3 and wafer 4/5 are listed as following:

• Wafer 3 have bare silicon surface same as previous batch, on the contrary, a 20-nm layer of silicon nitride was deposited with PECVD on the wafer 4 and wafer 5 surfaces. The introduction of thin barrier layer of silicon nitride or silicon oxide is often used to adjust the surface doping concentration, the highest doping concentration locate between the barrier and samples surface.

The SRIM simulated doping profile and vacancy concentration for wafer 3 is shown in Fig. 4.2, wafer 4 and 5 in Fig.4.3.

• The amorphous layer thickness was estimated by SRIM simulation, where the amorphous threshold equal to the vacancy density of 1 ⇥10

21

shown in Fig. 4.2b.

For wafer 3 with a bare surface, amorphous thickness was estimated to 88 nm.

For wafer 4 and wafer 5 with nitride cap layer shown in Fig. 4.3(b) and Fig.

4.3(d). The estimated amorphous thickness about 65 nm. The estimated amor-

phous thickness of the samples was later validated by spectroscopic ellipsometry,

same as previous batch, the measured data from five wafer spots were fitted in

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fitted to 27 nm and amorphous silicon to 72 nm. Similar values were obtained for wafer 5, where nitride cap layer thickness and amorphous silicon to 27 nm and 72 nm respectively.

• Lastly, the number of boron implantation was reduced in wafer 4 and wafer 5 since the estimated amorphous layer thickness is less than wafer 3. Only two im- plantations were needed to produce a boron profile encapsulate the amorphous region.

The full ion implantation process parameter is listed in the table 4.3

Table 4.3.

Wafer 3, 4, and 5 ion implantation process parameters

Sample Parameter No. of Implantation

Si-PAI 1

st

B 2

nd

B 3

rd

B

Wafer 3 Ion energy (keV) 100 2 8 20

Ion dose (cm

2

) 5,0 ⇥10

15

3,5 ⇥10

15

2,0 ⇥10

15

3.5 ⇥10

15

Wafer 4 Ion energy (keV) 40 2 25

Ion dose (cm

2

) 5,0 ⇥10

15

3,5 ⇥10

15

3,5 ⇥10

15

Wafer 5 Ion energy (keV) 40 2 25

Ion dose (cm

2

) 5,0 ⇥10

15

3,5 ⇥10

15

5,0 ⇥10

14

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(a) W3 simulated ion distribution. (b) W3 simulated vacancy profile.

Fig. 4.2. Wafer 3 SRIM simulated dopant distribution and vacancy profile.

Fig. 4.2(a) shows the ion distribution of wafer 3, the black curve represents the sum of all three boron implantations, with di↵erent energies of, 2 keV, 8 keV and 20 keV. The red curve represents the silicon self-implantation profile. In Fig. 4.2(b), the SRIM simulated vacancy densities are shown.

Each implantation create di↵erent number of vacancy over a certain depth,

the total vacancy concentration are summarized as the light blue curve.

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(a) W4 simulated ion distribution. (b) W4 simulated vacancy profile.

(c) W5 simulated ion distribution (d) W5 simulated vacancy profile

Fig. 4.3. Wafer 4 and 5 SRIM simulated dopant distribution and vacancy

profile. In Fig. 4.3(a) and Fig. 4.3(c), the implanted ion distributions of

wafer 4 and wafer 5 are shown, the black curve represents the sum of two

boron implantations with ion energy of 6 keV and 25 keV respectively. The

red curve represents the silicon concentration from silicon self-implanted

at 100 keV. The total induced vacancy density in wafer 4 and wafer 5 are

show in Fig. 4.3(b) and Fig. 4.3(d), respectively.

References

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