Superconducting Nanowire Single-photon Detectors: WSi SNSPDs for Quantum Optics Applications

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Superconducting Nanowire Single-photon Detectors

WSi SNSPDs for Quantum Optics Applications

Adem Björn Ergül February 2018 Stockholm / Sweden

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All rights reserved. No part of this publication may be produced or transmitted in any form or by any means, electronic or mechanical, including photocopying recording or any information storage and retrieval system, without the prior written permission of the publisher.

For permissions contact:

Adem Björn Ergül Stockholm University Department of Physics Email: adem@kth.se

Copyright c ADEM BJÖRN ERGÜL, 2018 ISBN: 978-91-7729-662-1

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Abstract

In this study we have developed a new fabrication technique for the WSi Su- perconducting Nanowire Single-Photon Detectors (SNSPD). These detectors are specifically designed to interact with the photons in the infra-red region of the electro magnetic spectrum. Fabrication process is described in great detail with the intention of giving the readers a lot of information about the facts or aspects of various situations they might face in the clean room processes. Ultimate goal for the project is to integrate these high-TC SNSPD detectors with the Photonic circuits.

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Contents

Abstract 3

1 Introduction 9

1.1 Material Selection . . . 11

2 Fabrication of Ground Planes and Connection Pads 15 2.1 Optimizing Photolithography Parameters for SNSPDs . . . 15

2.2 Quality Analyses of Optical Lithography Samples . . . 21

2.3 Thin Film and Edge Quality of Test Structures . . . 28

2.4 Cleaning of Test Structures . . . 33

2.5 First Layer of Metal (N b) Deposition . . . 37

3 Fabrication of Thin N b Film-strip for TC Measurements 45 3.1 Resist Coating for the Second Photolithography Step . . . 45

3.2 Photo resist mask (for Stripline) on top of the N b Contact Pads . . 47

3.3 Photo resist mask (for Contact Pads) on top of the N b Stripline . . 50

3.4 Second Layer of Metal N b Deposition . . . 53

3.5 Contact-pads on top of the N b Stripline . . . 58

3.6 Stripline on top of the N b Contact-pads . . . 60

4 Characterisation of the Nb Stripline Device 63 4.1 Electrical measurements . . . 63

4.2 Profilometer Measurements . . . 64

4.3 SEM Analyses . . . 66

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5 Pattern Generator Software for Meandering Nanowire 71

5.1 Software . . . 72

5.2 Output Files . . . 72

5.3 SNSPD v1.0 - Area Exposure Mode . . . 73

6 SNSPD / Electron-beam Nanowire Dose Tests 77 6.1 Dose Test #1: 50µC/cm² < df < 1250µC/cm² . . . 79

6.2 Dose Test #2: 10µC/cm² < df < 250µC/cm² . . . 96

6.3 Dose Test #3: 10µC/cm² < df < 500µC/cm² . . . 112

6.4 Summary of Dose Tests . . . 140

7 SNSPD / Electron-beam Patterning of Devices 151 7.1 Device Design #1 . . . 152

7.2 Device Test #1 . . . 154

7.3 Device Test #2 . . . 156

7.4 Device Test #3 . . . 160

7.5 Device Design #2 . . . 163

7.6 Device Test #4 . . . 164

7.7 Device Test #5 . . . 166

7.8 Device Test #5 - Metallisation . . . 169

7.9 Device Test #6 . . . 174

7.11 Device Design #3 . . . 184

7.12 Device Test #7 . . . 185

7.14 Device Test #7 - SEM Analyses . . . 189

7.15 Estimated Geometrical Resistance . . . 195

7.17 Bonded Sample . . . 201

7.18 Device Test #9 . . . 203

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CONTENTS 7

8 WSi SNSPD - Nanowire Device 205

8.1 Dose Recommendations for E-beam Lithography . . . 206 8.2 WSiThin Film . . . 207 8.3 WSiDevice – First Working Sample !!! . . . 210

Acknowledgements 217

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Chapter 1

Introduction

Superconducting Nanowire Single-Photon Detectors, SNSPDs, are simple and very reliable superconducting devices that can be used as single photon detectors for a wide range of wavelengths and frequencies. These devices have immense potential for many different photon detection applications since they have the ability to cover the waveband from ultraviolet to the far-infrared including optical frequencies. SNSPDs outperform other single photon detectors due to their high efficiency, low dark counts and excellent timing resolution. Unlike conventional low temperature superconductors, SNSPDs made out of high − TC

superconductors could in principle be operated with passive, inexpensive, and compact cooling systems. Furthermore, SNSPDs can be used as a very sensitive detectors for the Quantum Optics Experiments.

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Figure 1: Operation principle of a SNSPD device. First, a resistive hot spot is created by an incident photon and this hot spot grows rapidly due to the increased current density in the nanowire. Due to the resistive barrier, the supercurrent flow is blocked completely across the width of the nanowire. A measurable spike in nanowire resistance appears and this change is recorded by the exter- nal circuitry. Transition from superconducting state to normal conducting state happens only locally. Once the current density on the nanowire decreases, the hot spot starts to cool down. Finally, the supercurrent flow restores by an ex- ternal circuitry which shunts the nanowire device. (Image taken from "MgB2 and MoSi Superconducting Nanowires, JPL/NASA Postdoctoral Fellowship Final Report, 2016, ISBN: 978-91-7729-267-8")

In this study, we have used high − TC superconducting material Tungsten Silicide, (W Si with the bulk critical temperature TC ∼ 3.4K) to develop SNSPD circuits for the detection of photons in the infrared region of the electro magnetic spectrum.

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Material Selection 11

Figure 2: Schematic diagram of a typical measurement circuit. (Image taken from

"MgB2 and MoSi Superconducting Nanowires, JPL/NASA Postdoctoral Fellowship Final Report, 2016, ISBN: 978-91-7729-267-8")

1.1 Material Selection

1) W Si (Tungsten Silicide) is an amorphous superconductor and it can easily be embedded in an optical stack for high efficiency detection. These devices require sub-Kelvin temperatures for high efficiency measurements. The detection effciency of 93 % is possible at 1064 nm wavelength with a dark noise below a few counts per second.

Properties

• T_C ∼3.4 K

• The detection effciency of 93 % is possible at 1064 nm wavelength with a dark noise below a few counts per second.

• Fast recovery times t < 100 ns.

• Amorphous superconductor and it can easily be embedded in an optical stack for high efficiency detection.

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2) M oSi(Molybdenum Silicide) is also an amorphous superconductor and can be embedded in an optical stack for high efficiency detection. This material has a bulk critical temperature near 7 K, therefore devices can be operated above 1 K.

Bragg reflector (DBR) coatings used as the back-mirror for the UV frequencies.

It is possible to achieve 70% efficiency with 375 nm light measured at 3.2 K with the nanowire dimensions 10 nm thickness and 70 nm width. For the currents bias values between 4 and 5 µA the darkcount rates are below 1 Hz. Further- more it is possible to achieve detection efficiency (87.1 % at 1542 nm with 0.7 K base temperature.

Properties

• T_C ∼7 K.

• Possible to achieve 70% efficiency with 375 nm light measured at 3.2 K with the nanowire dimensions 10 nm thickness and 70 nm width.

• Possible to achieve detection efficiency 87.1 % at 1542 nm with 0.7 K base temperature.

• Amorphous superconductor and can be embedded in an optical stack for high efficiency detection.

• Bulk critical temperature near 7K, therefore devices can be operated above 1K.

• Bragg reflector (DBR) coatings used as the back-mirror for the UV frequencies.

• For the bias currents between 4 and 5 µA the darkcount rates are below 1 Hz.

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Material Selection 13

3) N bN (Niobium Nitride) has the critical temperature TC ∼ 10K. Fast cooling with the t<100 ps. Detection efficiencies as high as 67% at 1064 nm wavelength.

Count rates in the hundreds of MHz. Deadtime in the order of a few nanoseconds. These SNSPDs can operate at typical cryogen-free cryocooler temperatures. The polycrystalline structure of NbN makes thin films to be sensitive to the substrate on which they are deposited. Difficult to embed in an optical stack.

Properties

• T_C ∼10 K

• Detection efficiencies as high as 67% at 1064 nm wavelength and count rates in the hundreds of MHz.

• Dead time in the order of a few nanoseconds and fast cooling t<100 ps.

• These SNSPDs can operate at typical cryogen-free cryocooler temperatures.

• The polycrystalline structure of NbN makes thin films to be sensitive to the substrate on which they are deposited.

• Difficult to embed in an optical stack.

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4)M gB2 (Magnesium Diboride) is polycrystalline type-II superconductor with the critical temperature approximately 39 K. Due to the polycrystalline structure it is very difficult to fabricate high quality thin films. Therefore continuous nanowire fabrication is a very challenging task.

Properties

• T_C ∼33 K.

• Polycrystalline type-II superconductor.

• Detection efficiency <1%.

• Due to the polycrystalline structure difficult to fabricate high quality thin films.

• Continuous nanowire fabrication is a very challenging task.

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Chapter 2

Fabrication of Ground Planes and Connection Pads

2.1 Optimizing Photolithography Parameters for SNSPDs

1) First layer of resist: Spin on LOR7B:G-Thinner for 300nm thickness 1st spinning step; Speed: 1000 rpm Duration: 5s

2nd spinning step; Speed : 6000 rpm Duration: 60s Bake on hot-plate at 190^oC for 5 min.

2) Second layer of resist: Spin on S1818 for 1500 nm thickness 1st spinning step; Speed: 1000 rpm Duration: 5s

2nd spinning step; Speed: 8000 rpm Duration: 60s Bake on hot-plate at 120^oC for 90s

3)Exposure parameters:

Time: 6.5s and the expected dose: 25 mW/cm²

4)Development: MF 319 or MF 322, for 30s - 40s for the ground planes

5)Rinsing with deionized water

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Figure 3: Optical Microscope images of test structures after the development of double photo resist layers.

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Optimizing Photolithography Parameters for SNSPDs 17

Figure 4: Zoom to the structure edges. Double edge-lines clearly shows the undercut which is due to the different exposure sensitivity of the photo-resist layers.

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Figure 5: Optical Microscope image of a test structure. Blue area shows the exposed part of the sample (bare wafer) while the purple areas shows the double resist layers.

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Optimizing Photolithography Parameters for SNSPDs 19

Progress Report

Optical lithography samples were coated with Nb thin films. Thin film deposition is made by using 250 W power and 7 min duration. Expected film thickness was ∼ 50 nm and profilometer measurements showed that the film thickness is

∼ 55 nm therefore Nb deposition rate is ∼ 8 nm/min with 250 W power.

Resist lift-off after metal deposition. Normally "Remover-1165" is used for the lift-off process but due to the health hazards, this chemical is not any more available. The replacement chemicals are "M-rem 400" and "M-rem 700". There- fore we have used "M-rem 400" with a similar recipe as Remover-1165; t=5 min duration and Temp = 50^oC. Due to this change, we were not able to lift off optical lithography resist properly, and there was some residual photo resist left on the surface of the chip. In order to over come this problem, we have increased the lift off duration and after waiting ∼ 15 minutes we have used sonication for the final removal. Even with the lowest power, remnants of the metallic film shredded in to the invisible tiny particles within the first couple of seconds of the sonication. When we analysed the sample under the microscope we see that some of the tiny metallic pieces are stuck to the sample surface and it is impos- sible to remove them. Therefore for the next set of samples we have to modify the lift-off step. Here is the recommended process;

1) Heat the M-rem 400 or M-rem 700 solution up to the 50-55^oC.

2) Place the sample in the solution and wait approximately 1 hour.

3) If majority of the film is removed than prepare a new M-rem 400 or M-rem 700solution and put sample into the new beacon.

4) Use sonication with the lowest possible power and try to remove the remnant of the photoresist and the metallic film.

5) Check the quality of the lift-off with microscope and if necessary prolong the duration of wait time at step 2 or duration/power of the sonication.

6) Check the quality of the thin film and residual photo resist left on the surface of bare silicon with SEM.

One of the Li/Nb sample is etched with SF6with the parameters; 90 W ICP and RF Power, T=30 ^oC substrate temperature, Ar and SF6 flow with 5 sccm and the chamber pressure P=7 mTorr. Total etch duration was 10 minutes and half of the chip is covered with an empty silicon wafer. Protected part of the chip did not etched while the material at the exposed part was removed by RIE.

After metallisation, the samples were analysed with SEM in order to see the

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quality of Nb thin film and also the residual resist on the surface of the sample.

Profilometer measurements showed there is no metal accumulation at the edges of the metallic structures. Further details are shown at the next section.

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Quality Analyses of Optical Lithography Samples 21

2.2 Quality Analyses of Optical Lithography Samples

Analyses of the sample quality at different steps of the Optical lithography process and metallisation.

Figure 6: Optical Microscope image of Sample-1 after lift-off.

Figure 7: Optical Microscope image of Sample-2 after lift-off.

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Figure 8: SEM image of Sample-2. Residual optical lithography resist covers entire surface of this sample.

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Figure 9: Optical image of the Sample-2. Zoom to the left corner, film defects are clearly visible.

Figure 10: SEM image of the Sample-2. Zoom to the metallic structures.

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Figure 11: SEM image of the Sample-2. Zoom to the corner of the metallic structure.

Figure 12: SEM image of the Sample-2. Shadowing effect blocks the metal deposition close the structure edge.

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Figure 13: Line scan of the sample edge with profilometer. There is no metal accumulation at the edges of the metallic structures due to the protective double photo resist layers. Nb film thickness is 55 nm.

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Progress Report

The Lift-off process using Mr-Rem 400 was not very successful and there was some residual resist on the surface of Samples. A thin layer of Optical resist covers almost all the surface area of the chips. Therefore we have decided to keep Sample-1 on Mr-Rem 700 over weekend (room temperature) in order to remove this residue. This attempt was partially successful as it shown in SEM images.

Different than Sample 1 we have used an other technique in order to remove the residual resist from Sample 2. After lift-off process we have used RIE and O₂hard ash for cleaning. Here is the recipe (Oxford RIE-80 System);

Process Name: EKMF hard O2 ashing with ICP and RF RF Power: 50 W, ICP Power: 250 W

O₂flow rate: 20 sccm Duration:10 min.

Profilometer measurements showed that Nb thickness is not effected by the cleaning process. Sample 2 was cleaned completely as shown in SEM images.

Wafer preparation for the new set of samples.

Wafer Cleaning:

Sonication of the empty chips for about 5 minutes (power leve 2). Samples should be placed either in isoproponal or acetone. Heating is not necessary.

After that we did RIE hard ashing with Oxford 80 system.

Spin Coating:

When the samples are placed on the chuck of the spinner for resist coating, they were not very stable at 8000 rpm. In order to overcome this unstablity, chuck size and the sample size should be approximately same and there should be at least 4-5 sticky pads underneath the sample. Rotation speeds up to the 6000 rpm is quite stable but higher spin rates can be problematic for the chips larger than >3cm side length.

Cutting the Wafer:

Empty wafer is coated with photo resist prior to cut in order to protect the pol- ished surface from scratched Si pieces. It is possible to scribe the wafer on both

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surfaces (front and back) but it is not clear which is better. It might be better to place a clean paper on to the stage of the scriber and put the wafer up-side down and scribe at the back side. Even though there is an Exhaust, there will be a lot of Si particles all over the wafer. After scribing, Sonication is necessary to remove small particles and dirt.

Since the stage of the Optical Lithography system is only 2", the biggest chip we can process will be either 2" circular wafer or a rectangular chip with 3.6 cm side length (2"/√

2). In order to prepare a rectangular chip, one have to remove 1.48 cm wide pieces of silicon pieces from the edges of the 4" wafer. At the end we will have 4 pieces of rectangular chips to work with with the side length ∼ 3.6 cm.

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2.3 Thin Film and Edge Quality of Test Structures

Sample-1 is kept on Mr-Rem 700 over weekend (room temperature) in order to remove residual photo resist.

Figure 14: Global view of the Sample-1. Most of the photo resist is removed but the sample is not completely clean.

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Thin Film and Edge Quality of Test Structures 29

Figure 15: Zoom to one of the test structures. Sample surface is clean.

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Figure 16: Nb thin film. Average grain size is ∼ 20nm.

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Thin Film and Edge Quality of Test Structures 31

Figure 17: Zoom to the corner of a test structure.

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Figure 18: Separation between N b thin film and bare Si. Darker metallic flakes are extended onto the Si wafer due to the Optical Lithography resist undercut.

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Cleaning of Test Structures 33

2.4 Cleaning of Test Structures

RIE O2 hard ash is used for removal of residual photo resist.

Figure 19: Sample surface before and after the RIE O2 hard ash.

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Figure 20: Zoom to one of the test structures. Sample surface is very clean.

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Cleaning of Test Structures 35

Progress Report

Two new chips ("2017-03-30 Sample 1" and "2017-03-30 Sample 2") were prepared for the Optical Lithography Process. As explained previous reports we are using double resist layer (Lor7B and S1818) process. After spin coating samples were exposed with UV for about 6.5 seconds with the Optical Lithography.

Development of the resist layers were made by MF-319 for 35 seconds and Sam- ples were imaged under the Optical microscope. Both samples showed a clear undercut. Profilometer measurements revealed that the total resist thickness is

∼ 1.789 µm for Sample 1 and ∼ 1.813 µm for Sample 2.

Ground planes and connection pads for the Samples "2017-03-30 Sample 1" and

"2017-03-30 Sample 2" are prepared at the AJA system. We were planning to deposit Ti(5nm)/Au(50nm) as a ground plane but these materials do not exist in the system right now. One possibility was to use Cr but eventually we have decided to use Nb for the ground planes. By depositing Nb we will be able to use all the test pads on the chip for the TC measurements regardless of the deposition order, which would not be the case if we use Ti/Au ground planes.

By using Nb for both connection pads and the thin film strip, we will eventually have two kinds of test structures on the chip; first one where the connection pads are under the thin film strip and the second one where the connection pads are above the thin film strip. With these set of samples, we will be able to examine how does the deposition order effects the fabrication of different kind of samples and if is there a problem of continuity at the merging points of metallic structures that are created at different Optical lithography steps. The only concern for the Nb connection pads is the oxidation of the thin film between the two Optical Lithography steps but since our samples have very large,

∼ 0.25 mm², overlap area the resistance due to native oxide layer should be minuscule.

Total deposition duration was 5 min. and expected Nb film thickness is ∼ 45 nm.

Samples "2017_03_30_Sample 1" and "2017_03_30_Sample 2" were placed in to the Mr-Rem 700 for about 35-40 min. The developer was on top of hot plate and the temperature was ∼ 60 ^oC. Nb film is removed without any problem therefore sonication was not needed. After the removal of the Nb film samples were rinsed with the mili-Q water and the thickness of the metallic structures are measured with the profilometer. We have measurements height of the metallic structures at various different parts of the chip and the measured values are;

41.5 nm, 39.1 nm, 41.2 nm, 39.7 nm, 41.1 nm. Therefore Nb deposition rate is

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approximately 40 nm / 5 min ∼ 8 nm/min for the 250 W (33%) of the max gun power (750 W) in the AJA system.

We have received two 2" Si/SiO2 wafers from KTH-Biox group that are coated with a native oxide layer ∼ 50 nm. First we will test the electrical conductivity of these wafer and if useful we will use these wafers for the next step of sample fabrication.

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First Layer of Metal (N b) Deposition 37

2.5 First Layer of Metal (N b) Deposition

Figure 21: Optical Microscope image of Sample 1 after first Optical Lithography Process. Blue area shows the exposed part of the sample (bare wafer) while the purple areas shows the double resist layers.

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Figure 22: Zoom to the edge of the Sample. There is a clear undercut due to the double layer exposure.

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Figure 23: Global view of the chip during the lift-off process. Sample is inside the hot Mr-Rem 700 solution. Thin metalic film sitting on top of the Optical resist ripped out completely without sonication. Red color represents the color of the Optical resist "S-1818".

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Figure 24: Global view of the chip after rinsing with the mili-Q water.

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Figure 25: Optical microscope image of a test structure after the removal of the first metallization layer. Removal of the resist layer with Mr-Rem 700 was successful and therefore sonication was not needed. But there is a thin layer of residual resist on the sample surface and therefore RIE ashing is necessary before the spin coating of second Optical lithography layer.

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Figure 26: Zoom to the film surface and the structure edge.

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Progress Report

Two samples were prepared for the second Optical lithography exposure step.

We did RIE 02hard ash and double photo-resist layer spin coating (Lor 7B - 6000 rpm and S1818 - 8000 rpm).

We did Optical Lithography for the second layer of the metallization. A non- sticky gel-pak piece is placed on to the Optical Lithography systems sample stage before loading the samples. Non-sticky gel-pak piece has to be approximately same size as the sample itself. It has two advantages, first stabilizes the sample by resisting to shift during loading and unloading and creating a soft cushion for the contact mode exposure. Exposure time was 6.5 second and the samples were developed approximately 38 sec. with MF-322, and finally rinsed with mili-Q water.

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Chapter 3

Fabrication of Thin N b Film-strip for T_C Measurements

3.1 Resist Coating for the Second Photolithography Step

Figure 27: Sample 1 after the first optical lithography resist layer coated, Lor 7B. Resist thickness is much higher at the edges compared to the center of the chip due to the rectangular shape of the silicon wafer. This height difference between different parts of the sample can cause problems during the Optical lithography exposure, therefore we recommend using 2" circular wafers for the sample processing.

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Figure 28: Image of the Sample 1 after the second optical lithography resist layer coated, S1818. We have placed in total five sticky pads under the sample in order to stabilize it to the chuck for 8000 rpm rotation.

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Photo resist mask (for Stripline) on top of the N b Contact Pads 47

3.2 Photo resist mask (for Stripline) on top of the N b Con- tact Pads

Figure 29: Global view of the chip after development of second Optical lithography exposure.

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Figure 30: Zoom to the crossing point between the bare silicon, N b contact pads and Photo resist mask.

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Photo resist mask (for Stripline) on top of the N b Contact Pads 49

Figure 31: Global view of a sample. Contact pads are fabricated at the first Optical lithography step and the resist mask for the stripline is created at the second Optical lithography step. Sample is ready for the second metallisation step.

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3.3 Photo resist mask (for Contact Pads) on top of the N b Stripline

Figure 32: Zoom to the crossing point between the bare silicon, N b stripline and Photo resist mask.

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Photo resist mask (for Contact Pads) on top of the N b Stripline 51

Figure 33: Global view of a sample. N b stripline is fabricated at the first Optical lithography step and the resist mask for the contact pads are fabricated at the second Optical lithography step. Sample is ready for the second metallisation step.

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Progress Report

Metal deposition after the second optical lithography. N b film is deposited for about 5 min and expected film thickness is ∼ 40nm. This strip-line sample is now ready for the TC measurements.

SEM analyses of the different kind of strip-line design. Depending on the layer order either the stripline or the connection pads are placed on top of one an- other.

Analyses of the obtained results and general discussion regarding the Optical Lithography step.

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Second Layer of Metal N b Deposition 53

3.4 Second Layer of Metal N b Deposition

Figure 34: Global view of the Sample 1 after second metallisation/development layer. Mr-Rem 700 is used for the development, sample is kept in the hot solution about ∼ 45 min at 55^oC.

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Figure 35: Optical microscope image of the Sample 1 after second metallisation.

Connection pads and the strip-line are aligned properly. Some parts of the chip consists o double N b layer. Sample looks very clean and it is ready for the low temperature measurements.

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Figure 36: Zoom to the overlapping part between the side connection and the strip-line. It is not possible to guess deposition order of the different layer by just looking at the optical lithography layers.

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Figure 37: SEM image of the Sample 1 after second metallisation.

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Figure 38: SEM image of the Sample 1 after second metallisation. Red rectangular area shows the zoomed region.

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3.5 Contact-pads on top of the N b Stripline

Figure 39: Cross-section between double and single N b layers and the bare silicon wafer. At this device contact-pads are located on top of the N b stripline.

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Contact-pads on top of the N b Stripline 59

Figure 40: Thin film boundary and the under-cut is clearly visible for different deposition layers.

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3.6 Stripline on top of the N b Contact-pads

Figure 41: Cross-section between double and single N b layers and the bare silicon wafer. At this device N b stripline is located on top of contact-pads.

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Stripline on top of the N b Contact-pads 61

Figure 42: Thin film boundary and the under-cut is clearly visible for different deposition layers.

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Chapter 4

Characterisation of the Nb Stripline Device

4.1 Electrical measurements

Nb stripline device which are ready for the low temperature measurements.

Therefore just before the measurements, we made electrical characterisation, profilometer measurements and SEM imaging.

Expected geometrical resistance is;

R = ρL

A (4.1)

where, ρ = 152nΩ.m, L = 2.5mm and A =0.5 mm × 40 nm. Therefore the expected resistance for the stripline is R = 19Ω. We have measured a few samples and the results are R = 160Ω, 207Ω, 273Ω, 356Ω, 396Ω, 398Ω. We do not really know why these measurements results are very different then the geometrical resistance. First suspicion was that, there might be a layer of residual resist on the samples but the resistance values were similar even after 10 minutes of hard 02 ash with RIE. Therefore the origin of this resistance can not be the residual resist covering the sample surface. It might be that between the two deposition steps, contact pads and the stripline, the first layer of the N b film is oxidized and this native oxide layer creates a series resistance we are measuring.

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Figure 43: Locations of the profilometer measurements on the N b device.

4.2 Profilometer Measurements

Previous SEM analyses on N b stripline devices showed that due to the undercut of double photo resist layer process the film edge is not very smooth and there is a step in between bare silicon wafer and the thin film. In order to get some quantitative values, we have scanned structure edges of a device and measured film thickness.

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Profilometer Measurements 65

Scan-1:Single step, 53.1 nm.

Scan-2:Single step, 56 nm.

Scan-3:Double step, 6.2 nm & 46.8 nm Scan-4:Double step, 6.1 nm & 47.4 nm Scan-5:Double step, 6.2 nm & 46.5 nm Scan-6:Double step, 6.5 nm & 35.9 nm Scan-7:Single step, 42 nm

These measurements showed that due to the double layer process, we are measuring two steps at the film edges. The first layer is only ∼ 6 nm thick and it originates from the under-cut while the second layer is ∼ 45 nm for this device and defined by the deposition time.

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4.3 SEM Analyses

a)

b)

Figure 44: a)Global view of the Sample-1 at ∼ 45^otilted sample holder. b)Global view of the chip with the scanning electron beam is tilted ∼ 80^o compared to the normal angle of the sample.

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SEM Analyses 67

a)

b)

Figure 45: a)Zoom to the crossing point between where N b stripline and contact pad films are deposited on top each other. Electron beam is tilted ∼ 80^o. bZoom to the crossing point between N b stripline and contact pads. Upper-right corner shows where the N b films were deposited on top each other. The upper thin film layer, contact pads, has rough film edge together with an extension layer due to the undercut. Profilometer measurements showed that this extension layer is ∼ 6 nmthick.

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a)

b)

Figure 46: a)Global view of the Sample-2 with the electron beam is tilted ∼ 80^o compared to the normal angle of the sample. b)Zoom to the crossing point between where N b stripline and contact pad films are deposited on top each other for Sample 2. Electron beam is tilted ∼ 80^o.

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SEM Analyses 69

Figure 47: Zoom to the second N b layer film edge.

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Figure 48: Zoom to the crossing point between different parts of the device named Sample 2. Film continuity is clearly visible from this image.

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Chapter 5

Pattern Generator Software for Meandering Nanowire

We are developing a special software called "Pattern Generator Software for the Meandering Nanowire Detectors". This software will create CAD designs for the e-beam exposure. It is possible to manually draw the e-beam exposure patterns using the Raith’s own software but due to the shape of our detectors, many meandering parts, drawing manually may take very long time and it will not be possible to modify the CAD design once it is finalized. Considering the fact that we want to try many different materials and therefore many different resonator designs, it is better to develop a software that will create the desired e-beam exposure CAD design with the necessary input parameters.

Raith Turnkey 150 has different kinds of exposure modes such as, area exposure, line exposure and dot exposure modes. Line exposure and dot exposure modes are technically the same; when a line has the same starting and ending point, that structure is handled as a dot. The patterning of the SNSPDs can be done by line exposure mode or with the area exposure mode. We need to do some dose tests in order to see which method is the best.

The Raith Turnkey 150 software application creates and saves designs in GDSII file format. This file format is simply a text format consisting of two columns with numbers. In this file, every row represents a point in the design; first column is the x-coordinate value and second column is the y-coordinate value of the point. Instead of using Raith software for design of meandering nanowire, we are writing a program that creates a text file which has a similar structure as the GDSII file. We can later import these program-created text files into Raith

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System. By using this new program, we will able to create many different designs with varying parameters.

5.1 Software

Pattern generator program is written in C language and it is capable of creating meander patterns with different input parameters. Our nanowire design consists of two kinds of structures, meandering center line and polygons for the rest of the sample.

There are numerous advantages to using a C language based program in patterning. Once the program is written, it requires minimal effort to manipulate the source code in order to change the design parameters, to compile and run.

Programming does not require any other application in order to run; it can execute independently. These particular properties make programming in C language very fast and reliable. Thus, we will able to design several different resonators in a short span of time, even though they consisted of hundreds of separate parts with drastically different design properties.

5.2 Output Files

Our software creates two text files simultaneously, one for 2D plot in Matlab and the other one for the Raith Software, which are called "SNSPDMatlab.txt" and

"SNSPDRaith.txt", accordingly. "SNSPDMatlab.txt" file consists of five columns;

X-coordinate, Y-coordinate, RB (larger meandering radius), RS (smaller meandering radius) and Total Length values of pattern.

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SNSPD v1.0 - Area Exposure Mode 73

Figure 49: An example of the output file "SNSPDMatlab.txt" with the coordinate and some design parameters.

Figure 50: An example of the output file "SNSPDRaith.txt" with the object de- scription at the first line and the coordinate values following.

"SNSPDRaith.txt" file has a special structure which is required for Raith Soft- ware. Definition of an object starts with the "#" sign and first line keeps the properties of that object defined. First element of first line shows the type of the object; L for line and dot, 1 for polygon. Second element is used for specifying dose, third for layer and fourth for width values. Each row represents a point, with X and Y coordinates values, in micrometer.

5.3 SNSPD v1.0 - Area Exposure Mode

The properties of the desired layout such as write field size, nanowire length or nanowire width have to be defined before compiling the program. These

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properties are called input parameters of the layout and they line up just after the definition of variables at the top of the program text. A complete design has 10 different input parameters. As we have mentioned before, it is possible to pattern nanowires with area or line exposure modes of the e-beam. In the first version of the software we will use only area exposure mode. Our design consists of meandering center line and some additional polygons. In order to get the desired design outcome, one should be very careful while choosing the values for input parameters.

Two most important input parameters are WF which defines write field size, TOTALLwhich describes the total length of the nanowire and NOBAOL which defines number of repetitions of the unit structure depending on the total length of the nanowire.

Design Parameters:

WF: Write Field Size

TOTALL: Total length of the nanowire in the units of µm.

NOBAOL: Number of Unit Structure in one write field.

stepsize: Width of the nanowire, in microns.

teta: Angle between two consecutive points at the bending parts of the design.

delta: Gap between the meandering nanowire and the lower part of the cap ar- eas.

capwidth: Cap size in microns. Caps are necessary in order to overcome the current crowding at the meandering parts of the nanowire.

l1: Distance between first and second point i.e. the size of the input Polygon.

l3: Distance between last two points, i.e. the size of the output Polygon.

NOLG: Number of lines at one group of meandering structures. Should be al- ways 2 for the area exposure mode.

Compiling and Running Commands:

deligeyik@deligeyik$ gcc -g path.c -o path -lm deligeyik@deligeyik$ ./path

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SNSPD v1.0 - Area Exposure Mode 75

Figure 51: Input parameters for this nanowire are as such; TOTALL=75µm;

NOBAOL=5.0 therefore unit structure is repeated five times; stepsize=0.1µm that means the nanowire is only 100nm wide; teta=9.0 that means the angle between two consecutive points at the bending parts of the design is nine de- grees; delta=0.25µm that means the the gap between the meandering nanowire and the lower part of the cap areas are 250 nm; capwidth=1 µm that means the Cap width is one micrometer; l1=1 µm that means size of the input polygon is one micrometer; l3=1 µm that means size of the output polygon is also one micrometer; WF=8+l1+l3 that means the write field size is ten micrometers and finally NOLG=2 which indicates that we are creating a design for the area mode exposure of the electron beam system.

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Figure 52: Bending angle, teta, for the meandering parts.

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Chapter 6

SNSPD / Electron-beam Nanowire Dose Tests

This week, we have worked on the dose test regarding the electron beam patterning of the nanowires. Since this was our first dose test we have tried a wide range of exposure doses in order to get an idea how the nanowire width is changes with the exposure dose.

The e-beam process consists of five main steps;

1) Cleaning the Chip:

First we have cleaned empty wafers with RIE;

Process Name: EKMF hard O2 ashing with ICP and RF RF Power: 50 W, ICP Power: 250 W

O2flow rate: 20 sccm Duration:10 min.

2) Spin Coating:

After cleaning we have moved to spin coating of the chips with the e-beam resist.

We have decided to use single layer technique as a starting point and if needed in the future we will try double layer process. For the first test we have decided to use positive e-beam resist CSAR-62 AR-P 6200.09. We have conducted a spin curve study and finally decided to use rotation speed 3150 rpm. After the spin coating we have baked the chip at 150^oCfor about 60 seconds on the hot plate.

After the bake we have measured the film thickness with the profilometer and measured the film thickness are; 295 nm, 276.8 nm, 271.9 nm, 277.4 nm, 278.1 nm, 279.5 nmat different parts of the chip. Therefore the average film thickness was ∼275 nm.

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3) Exposure:

Once the chips were prepared for the electron beam patterning, we have booked the Raith - Turnkey 150 System and exposed the design, "SNSPD_D001", that is created by the software we have developed earlier. We have used 25 kV ac- celeration voltage with the step size of 8 nm and area exposure mode for the meandering nanowires. 10 µm write-field size with the active area of 25 µm×

25 µmrectangle is used. Exposure of each meandering nanowire takes only 5.2 secondswith the beam current of 0.02259 nA (measured at the Faraday cup).

4) Development:

After electron beam patterning, we have used developerAR 600-546 ( 99 %Amy- lacetate) for about 60 seconds at the room temperature in order to remove the exposed parts of the chip. After the development of the resist, we have imaged the chip with the Optical microscope and the exposed patterns were clearly visible. Therefore we have concluded that the development time was close to the ideal duration and does not require any drastic tuning.

5) Metallisation and Lift-off:

Once the electron beam patterns are created, next step is to do metallization and lift-off. We have used AJA system and deposited ∼24 nm thick Nb thin film. We have used Acetone as a remover with the sonication bath. We have used the lowest possible power of the sonication with only 5 × 10 seconds duration. One can also heat the acetone but it is good to keep the temperature of the bath lower than 50^o C. On the other hand, the recommended remover, AR 600-71, 300-76, is currently not available at the Nanofab lab.

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Dose Test #1: 50µC/cm²< df <1250µC/cm² 79

6.1 Dose Test #1: 50µC/cm² < df < 1250µC/cm²

Figure 53: Global view of the dose test sample after development of the e-beam exposure. Design named "SNSPD_D001" is used for this dose test. First struc- ture that is barely visible at the lower left corner of the image has the base area exposure dose 50µC/cm². The dose factors were "1" for the horizontal axis and

"5" for the vertical axis. We have exposed a 5 × 5 matrix with the dose addi- tion method, therefore dose values were 50µC/cm², 100µC/cm², 150µC/cm², 200µC/cm² and 250µC/cm² for the first row starting from the lower left corner of the chip. On the other hand exposure dose values were 50µC/cm², 300µC/cm², 550µC/cm², 800µC/cm²and 1050µC/cm²for the first column again starting from the lower left corner of the chip. In this chip lowest exposed dose was 50µC/cm² while the highest exposure dose was 1250µC/cm² which is the over-exposed device at the upper right corner of the chip.

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Figure 54: Optical microscope image of the "Dose Test #1" after N b metallisation and lift-off. Zoom to the first four rows of the chip.

Figure 55: Optical Microscope images of the test structures with the doses 350µC/cm² (a), 400µC/cm² (b) and 450µC/cm² (c). Images clearly show that the width of the nanowires increases as the dose factor is increased.

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Figure 56: SEM image of the global view of the "Dose Test #1". Image shows the dose test chip after film deposition and lift-off process.

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Figure 57: SEM image of the test structure with the exposure dose 100µC/cm². Second device in the first row from lower left corner. Global device sizes are also measured. Nanowire is continuous and there is no problem regarding the edge roughness of the nanowire.

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Figure 58: SEM image of the same test structure with the exposure dose 100µC/cm². Nanowire is wider, ∼ 160 nm, compared to the designed value, 100 nm.

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Figure 59: SEM image of the test structure with the exposure dose 150µC/cm².

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6.2 Dose Test #2: 10µC/cm² < df < 250µC/cm²

Figure 71: Global view of the "Dose Test - 2" after development of the exposed e-beam pattern. Nanowire design named "SNSPD_D001" is used for this dose test. Test structures that are located at the first row of the exposure area are barely visible. First nanowire at the lower left corner of the image has the base area exposure dose 10µC/cm². The rise parameters for the exposure dose were

"1" for the horizontal axis and "5" for the vertical axis. We have exposed a 5 × 5 matrix with the dose addition method, therefore dose factors were 10µC/cm², 20µC/cm², 30µC/cm², 40µC/cm² and 50µC/cm² for the first row starting from the lower left corner of the chip. On the other hand exposure dose values were 10µC/cm², 60µC/cm², 110µC/cm², 160µC/cm² and 210µC/cm²for the first column again starting from the lower left corner of the chip. In this chip lowest exposed dose was 10µC/cm² while the highest exposure dose was 250µC/cm² which is the device at the upper right corner of the chip.

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Figure 72: SEM image of the global view of the "Dose Test #2". Image shows the test chip after 24 nm N b thin film deposition and lift-off process.

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