Dynamic Virtual Admittance Control Hardware-In-The-Loop Real-Time Simulation

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IN

DEGREE PROJECT ELECTRICAL ENGINEERING, SECOND CYCLE, 30 CREDITS

STOCKHOLM SWEDEN 2020,

Dynamic Virtual Admittance Control Hardware-In-The-Loop Real-Time Simulation

DAMIEN GADOU-SANYAL

KTH ROYAL INSTITUTE OF TECHNOLOGY

SCHOOL OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE

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K ^UNGLIGA T EKNISKA HÖGSKOLAN

M

ASTER

T

HESIS

Dynamic Virtual Admittance Control Hardware-In-The-Loop Real-Time

Simulation

Author:

Damien GADOU-SANYAL

Industrial supervisor:

WilliamLEON GARCIA

Academic supervisor:

Nathaniel TAYLOR

Academic examiner:

HansEDIN

A thesis submitted in fulfillment of the requirements for the degree of Master degree

in the

School of Electrical Engineering and Computer Science

May 21, 2020

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iii

Abstract

Dynamic Virtual Admittance Control Hardware-In-The-Loop Real-Time Simulation

English:

To enhance the transient stability and the power oscillation damping of the power grid, supplementary controllers can be applied to the embedded point-to-point High- Voltage Direct Current (HVDC) links. The work presented in this report aimed to validate the Dynamic Virtual Admittance Control (DVAC) designed in SuperGrid Institute, in Software- and Hardware-In-The-Loop (SIL and HIL) simulations.

The DVA control was first studied analytically and implemented in an offline simulation, on a basic test-system. A two-area test-system was then modelled as the base for validation of the stabilising control. The fault applied to test the controller’s efficiency was a three-phase short-circuit on one of the AC transmission lines linking the two areas. The DVAC was validated on the test-system, first by SIL, and then by HIL real-time simulation. For the purpose of turning the simulation into an HIL simulation, the DVAC was implemented in code C in a Raspberry Pi computer, and the IEC 61850 communication protocol was studied in detail to be configured for the HIL simulation’s set-up.

The SIL and HIL simulations of the DVAC on a three-phase short-circuit proved the control’s ability to damp power oscillations in around 5 seconds, twice as fast as if no control is implemented.

Swedish:

För att förbättra elnätets transientstabilitet och dämpning kan kompletterande styrenheter användas på inbäddade högspänningslikströmslänkar (HVDC). Arbetet som presenteras i denna rapport syftade till att validera Dynamic Virtual Admit- tance (DVA) reglering, utvecklat i SuperGrid Institute, i simuleringar med mjuk- och hårdvara-i-loop (SIL & HIL).

DVA studerades först analytiskt och implementerades i en offlinesimulering, på ett grundläggande provsystem. Ett testsystem i två områden modellerades sedan som bas för validering av regleringens stabilisering. Felet som användes för att prova styrenhetens effektivitet var en trefas kortslutning på en av de växelström- sledningar som förbinder de två områdena. DVAC validerades på provsystemet, först av SIL och sedan av HIL realtidssimulering. För att omvandla simuleringen till en HIL-simulering implementerades DVAC i kod C i en Raspberry Pi-dator, och IEC 61850-kommunikationsprotokollet studerades i detalj för att konfigureras för HIL- simuleringens uppsättning.

SIL och HIL simulering av DVAC validerades för en trefasig kortslutning och bekräftade att regleringen kunde dämpa ut effektoscillationerna inom 5 sekunder, dubbelt så snabbt jämfört med om ingen reglering var implementerad.

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v

Acknowledgements

My internship was completed in the Architecture & Systems program of SuperGrid Institute. Therefore, I would like to thank the whole simulation team in which I was integrated: William LEON GARCIAwho supervised me, Antoine GHYSELINCKand Ahmed ZAMAfor their time and useful advices, and Laurent CHEDOTfor the global management of my internship. I would also like to thank Juan-Carlos GONZÁLES

for his clear explanations of the DVAC principles. Last but not least, I thank all Su- perGrid Institute’s colleagues who made my stay really enjoyable in the company.

Also, I would like to thank Nathaniel TAYLOR who closely followed me from Stockholm, and gave me the right guidances to complete my internship in time.

Then, I thank my parents for supporting me since the beginning of my studies. I would not have gone this far if they would not have always been beside me.

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vii

List of Figures

1.1 Different steps of the DVAC validation process via simulation on a

two-area test-system . . . 3

2.1 SMIB system [7] . . . 5

2.2 SMIB equivalent system [7] . . . 5

2.3 Variation of the electrical power versus the rotor angle [7] . . . 6

2.4 Stable and unstable equilibrium points [7] . . . 7

2.5 Equal Area Criterion [7] . . . 8

2.6 Comparison between a pure AC SMIB (a) and a mixed AC/DC SMIB (b) [8] . . . 8

2.7 Equal Area Criterion comparison between a pure AC SMIB (A) and an AC/DC SMIB (B) [8] . . . 10

2.8 Comparison of offline and real-time simulations [2] . . . 11

3.1 AC/DC SMIB . . . 15

3.2 Common mechanical damped oscillator . . . 15

3.3 Power-angle curves with the DVAC control implemented [8] . . . 16

3.4 A simple model to implement the DVAC . . . 17

3.5 Effects of the DVAC on a simple test-system . . . 17

4.1 Modelling of the two-area test-system in Hypersim . . . 20

4.2 DVAC block diagram . . . 20

4.3 Offline simulation of the DVAC on the test-system . . . 22

4.4 Real-time simulation of the DVAC on the test-system . . . 23

5.1 HIL simulation set-up . . . 25

5.2 HIL simulation principle . . . 26

5.3 SV communication inside the substation [1] . . . 29

5.4 SV message content [3] . . . 30

5.5 Hypersim sample count variation as a function of the published sample 32 5.6 Publication from Hypersim to the RPI . . . 33

5.7 Hypersim loopback communication test . . . 34

5.8 Publication from the RPI to Hypersim (1 ASDU) . . . 35

5.9 Publication from the RPI to Hypersim (8 ASDU) . . . 36

5.10 Simulation of a delay on the DVAC correction . . . 37

5.11 HIL simulation of the DVAC on the test-system . . . 38

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xi

List of Tables

5.1 SV message content [17] . . . 31 5.2 Communication configuration . . . 32

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List of Abbreviations

AC Alternating Current

APDU Application Protocol Data Unit ASDU Application Specific Data Unit CLF Control Lyapunov Function CCT Critical Clearing Time DC Direct Current

DVAC Dynamic Virtual Admittance Control HIL Hardware-In-The-Loop

HVDC High Voltage Direct Current IED Intelligent Electronic Device KTH Kungliga Tekniska Högskolan LCC Line Commutated Converters MMC Modular Multi-Level Converter PCC Point of Common Coupling PMU Phasor Measurement Unit RPI Raspberry Pi

RT Real-Time

SGI SuperGrid Institute SIL Software-In-The-Loop SMIB Small Machine Infinite Bus SR Sampling Rate

SV Sampled Value

TSO Transmission System Operator VSC Voltage Source Converter

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1

Chapter 1

Introduction

1.1 General introduction

The global society in which we are living needs energy to thrive. Whether it is to grow food, to manufacture goods, to move, or to heat houses, our society relies on a continuous access to different forms of energy. Electricity is one of them. During the last decades, the humanity made the most of what seemed infinite reserves of fossil fuels (mainly coal) to produce electricity. But the products emitted by the consumption of these fuels turned out to be very harmful for the atmosphere, and to cause its global warming. A global warming itself being the cause of huge climate imbalances threatening life on Earth. To counterbalance this phenomenon, while providing the society with the quantity of energy that it needs to sustain its economy, renewable intermittent energies, like solar or wind, were introduced into the electrical mix to reduce the greenhouse gases’ emissions.

But the substitution of the former synchronous machines with wind turbines is causing stability issues. Indeed, in the case where a transmission line or a power plant was shut down, the grid operators could use the kinetic energy stored into the rotating synchronous machines to compensate for the loss of power. However, wind turbines rotors are disconnected from the grid because of the power electronics devices needed to control them. The grid operators cannot access the inertia of the rotating wind turbines, hence a resulting lack of inertia in the power grid.

This is one of the issues tackled by the Architecture & Systems program of Su- pergrid Institute, an independent research platform. This institute is an Institute for Energy Transition, meaning that it aims to develop the electric power system of the future, i.e. an interconnected network with alternating and direct currents at very high voltages. This power grid integrates renewable energy sources, which can be located very far from the consumption centres, and sometimes offshore. Therefore, the "supergrid" also needs to be controlled in order to ensure stability and security of the energy transmission.

More particularly, the Architecture & Systems program focuses on the development of wide-scale DC grids. Compared with AC grids which constitute the main part of today’s power grid, and for which the industry possesses decades of development and feedback, DC grids bring up specific constraints that challenge the engineers. This program thus studies the protecting means of DC grids against electrical faults, the transformation of DC voltages, and the behaviour of LCC and VSC technologies which are predominant devices on combined AC/DC power systems.

To this end, the researchers lean on electromagnetic transient simulations to design

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2 Chapter 1. Introduction

power converter control systems, and real-time simulations to demonstrate the per- formance of a new technology before it is to be integrated in the network.

1.2 Objectives of the internship

This work aims to complete the Electrical Power Engineering degree of the univer- sity of KTH. I followed this master as a double-degree student from École Centrale Lyon engineering school.

The global objective of my internship is to validate the Dynamic Virtual Ad- mittance Control (DVAC) via real-time simulations. This control was designed by Juan-Carlos GONZÁLESin SuperGrid Institute. To this end, a basic electrical system was chosen to test the efficiency of the DVAC: a modified Kundur system [13]. It is a two-area system commonly used to study stability issues. For this study, an HVDC link was added in parallel of the AC transmission line.

Different kinds of simulation were considered in this work: offline, Software-In- the-Loop (SIL), Hardware-In-the-Loop (HIL), Power-Hardware-In-the-Loop (PHIL).

SIL, HIL, and PHIL simulations are run in real-time (RT), as opposed to offline simulations. The principles of those different types of simulation are explained in section 2.2.

Originally, several steps were contemplated:

• First, implementing the test-system in an offline, and then SIL real-time simulation with the DVA control being included in the simulation (figure 1.1a).

• Then, turning the simulation into an HIL real-time simulation, where the DVAC is implemented outside of the simulation.

– In the first place, a prototyped controller is connected to the simulation.

In the present work, the DVA control is translated into C code and implemented in a Raspberry Pi single-board computer (figure 1.1b).

– Next, a prototype of a phasor controller provided by an industrial man- ufacturer is connected. This prototype will have the role of a DVA controller as well (figure 1.1c).

– Industrial Phasor Measurement Units (PMUs) are then added to the set- up. These PMUs will receive the measured signals from the simulation, and communicate them to the phasor controller via IEEE C37.118 communication protocol (figure 1.1d).

• Finally, if the previous steps are functional, it would be possible to connect the AC/DC converter prototype available in SuperGrid Institute, thus replac- ing one of the simulated converter (the prototype is a Modular Multi-Level Converter - MMC). At this point, the simulation becomes a PHIL real-time simulation (figure 1.1e).

During the 6-month time-scale of the internship, the DVAC could only be implemented in a Raspberry Pi computer. All the simulations were done with HYPERSIM, a Real-Time simulator applied for power systems and developed by Hydro-Québec, which is now available from OPAL-RT Technologies.

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1.3. Context of the internship 3

(A) SIL RT simulation (B) HIL RT simulation with a prototyped controller

(C) HIL RT simulation with an industrial controller

(D) HIL RT simulation with an industrial controller and industrial PMUs

(E) PHIL RT simulation with a prototyped MMC

FIGURE1.1: Different steps of the DVAC validation process via simulation on a two-area test-system

1.3 Context of the internship

This work is included in several projects in which the Architecture & System program is working in collaboration with industrial companies and Transmission Sys- tem Operators (TSOs). Most of all, this work is a contribution to the HIL demonstra- tion of the DVAC in the context of the project Grid 2030

This project is a collaboration with the Spanish TSO Red Eléctrica de España, which wishes to prevent oscillations on the HVDC link between France and Spain. The DVA control could be used by the TSO to optimise this link.

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5

Chapter 2

Theoretical background and definitions

Before introducing ourselves to the principles of the DVAC, and to the rest of the achieved work, a reminder of the basics of transient stability, as well as a more detailed description of the different types of simulation, are necessary.

2.1 Transient stability of an SMIB system

2.1.1 Equilibrium points of an SMIB system

Transient stability analysis of a multi-machine power grid is a very complex phenomenon. Fortunately, the important principles of power grid stability can be understood via the analysis of a simple system like a Single-Machine-Infinite-Bus system (SMIB). Figure 2.1 represents an example of SMIB system.

FIGURE2.1: SMIB system [7]

For the following analysis, several assumptions are made. The synchronous generator is modelled as a constant emf E⁰_qbehind its transient reactance x⁰_d. The system is lossless and the transmission line is modelled by a series reactance. Voltages and currents are symmetrical. The mechanical power seen by the generator is constant.

The voltage at bus N is given by UN =UN6 θN, where UN and θNare fixed.

An equivalent scheme of the SMIB system is thus given in figure 2.2. The sum of the reactances of the transmission lines and the two transformers is represented by x_tot.

FIGURE2.2: SMIB equivalent system [7]

The swing equation then gives the dynamic of the system [7]:

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6 Chapter 2. Theoretical background and definitions

˙δ=ω ω˙ = ¹

M(Pm−Pe−Dω) (2.1)

where:

• δ is the rotor angle of the machine

• ω = ω_g−ω_s is the difference between the rotor speed and the system synchronous speed

• M is the inertia constant of the generator

• D is the mechanical damping constant

• P_mis the mechanical power seen by the generator

• Peis the electrical power flowing between the two buses, Pe=_P_max_sin(δ−θ_N) If it is assumed that θ_N = 0, the swing equation becomes, at the equilibrium point:

˙δ

˙ ω

=

ω₀

1

M(P_M−P_emaxsin(δ₀) −Dω₀)

=⁰ 0

(2.2) Obviously, ω₀ = 0, so during steady-state the mechanical power equals to the electrical power (P_m = P_e). Figure 2.3 shows the variations of the electrical power P_e(δ)versus the rotor angle δ.

FIGURE2.3: Variation of the electrical power versus the rotor angle [7]

As one can see, there is no possible solution for δ₀if P_m > P_emax. There is only one solution if P_m = P_emaxwhich is δ₀ = ^π₂. And if P_m < P_emax, there are two possi- ble solutions: δ0=δsand δ0=δu.

Hence, there are two operating points in normal operation which are _δ_s

0 and

_δ_u

0 . It will now be shown which one is the stable equilibrium point.

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2.1. Transient stability of an SMIB system 7

2.1.2 Stability of an SMIB system’s equilibrium points

Let’s first consider δ_s. The rotor angle is initially set at δ_s. Imagine that, due to a disturbance, the rotor angle moves to δ1(see figure 2.4). At this point, Peis bigger than Pm, and therefore ˙ω < 0 according to equation 2.1. The rotor thus decelerates until its rotational speed reaches zero. The angle δ then starts decreasing. Once it passed δs, Pebecomes smaller than Pmand from this point ˙ω >0. The rotor acceler- ates again, so the speed ω reaches 0 at δ₂, and the angle δ increases. Again, the angle passes δ_s, the rotational speed decelerates, and the rotor swings back. If there is no damping in the system, the rotor will oscillate around δ_s. But if there is some damp- ing, the rotor angle goes less far each time it swings back, and will finally return to δs. If the other case is considered, δ_u, it can be assumed that a disturbance causes the rotor to move from δuto δ3. Here ˙ω > 0 and thus the rotor keeps accelerating and the angle moves away from δ_u. Likewise, if a disturbance displaces the rotor angle to δ₄, ˙ω <0 and the rotor keeps decelerating while the angle moves away from δ_u.

FIGURE2.4: Stable and unstable equilibrium points [7]

Hence, one can conclude that δsis the stable point and δuthe unstable point. [7]

gives this definition of transient stability, that will now be discussed:

The SMIB system is transiently stable if the generator remains in synchronism with the infinite bus after being subjected to a large disturbance. Instability that may result occurs in the form of increasing rotor angle (or speed) of the generator leading to its loss of synchronism.

2.1.3 Equal Area Criterion

The figure 2.5 shows the variations of Peas a function of δ before a three-phase fault on the transmission line (P_e^pre), during the fault (P_e^fwhich is assumed zero), and after the fault (P_e^post). The rotor angle is initially at δ_s^pre, and moves to δ_cafter the fault gets cleared. The angle then increases until δmaxbefore swinging back.

One can demonstrate [7] that the SMIB system is transiently stable if there is a maximum angle δ= δmaxfor which Aa = A_d.

Some physical interpretations of the surfaces A_aand A_dcan be obtained [7]:

• A_a is the accelerating area. It represents the kinetic energy injected into the system during the fault.

• A_dis the decelerating area. It represents the ability of the post-fault system to absorb energy, i.e. potential energy.

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FIGURE2.5: Equal Area Criterion [7]

(A) AC SMIB (B) AC/DC SMIB

FIGURE2.6: Comparison between a pure AC SMIB (a) and a mixed AC/DC SMIB (b) [8]

When δ_max =δ_u^post, the surface A_dis at its maximum value, and is written A_dmax. Hence, the SMIB is transiently stable if A_a < A_dmax.

2.1.4 Transient stability comparison between AC and AC/DC SMIB sys- tems

So far, only a system exclusively composed of AC lines was considered. But the power system contains more and more DC lines linking countries between themselves or offshore wind farms to the land. DC transmission lines have indeed several advantages for long distance transmissions:

• No line inductance reduces the transmissible power with the distance.

• The absence of skin effect allows more power to transit through the line.

• Because there is no need for compensation, the DC lines are less costly for distances longer than several hundred kilometres.

But DC lines affect the transient stability as it will now be shown. For the comparison, the SMIB is reinforced with an AC line in one case, and a HVDC line (High- Voltage Direct Current) in the other case (see figure 2.6).

The AC lines are assumed to be loss-less and of reactance X₁₂. The internal reactance of the generator is assumed negligible compared to the reactance of the AC

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2.1. Transient stability of an SMIB system 9

transmission line (X⁰_d1 X₁₂). Under those assumptions, the dynamics of the two different systems are expressed by [8]:

AC SMIB system:

Mω˙ +Dω =P_m−P_e1(δ) (2.3) AC/DC SMIB system:

Mω˙ +Dω =Pm−Pe2(δ) (2.4) where:

• Pe1(δ) = _2P_maxsin δ and Pe2(δ) = P_maxsin δ+P_hvdc are the electrical power flows transiting into each lines

• Pmax=E_d⁰U₂/X12

• P_hvdcis the constant reference of the HVDC link

• E⁰_dis the internal voltage of the generator

• U₂is bus 2 voltage

• X₁₂is the transmission line’s reactance

The variations of the electrical power before, during, and after the fault as function of the rotor angle are given on figure 2.7. The continuous line is the electrical power flowing between the two areas before the fault occurs, and the dotted line is the electrical power flowing after the fault was cleared (only one AC transmission line is connected).

The two systems are set to transmit the same amount of power, for the comparison to be coherent. Thus, P_hvdc = Pmaxsin δs. The stable (δs) equilibrium points of both systems are then equal, as well as the unstable (δ_u) equilibrium points. Also, the trajectory during the fault needs to be the same in both cases. So, in the pure AC SMIB, one of the AC lines is disconnected, while in the other case, the HVDC line is disconnected. In this configuration, both systems reach the same point when the fault is cleared (δ_cl).

After the fault is cleared, the system gets back to its pre-fault configuration as the line is reconnected. On figures 2.7, one can see that the decelerating areas 4- 5-6-7 are different from one case to another. The available decelerating area A^DC₂ is smaller in the mixed AC/DC case than A^AC₂ , which means that the transient stability is worsened when a line is reinforced with an HVDC link not controlled for stability purposes [10].

From this analysis, it can be understood that there is a need to add some control layers to the AC/DC converters, in order to improve the transient stability of AC/DC grids. In this work, the solution called Dynamic Virtual Admittance Con- trol(DVAC) is studied.

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(A) AC SMIB (B) AC/DC SMIB

FIGURE 2.7: Equal Area Criterion comparison between a pure AC SMIB (A) and an AC/DC SMIB (B) [8]

2.2 Offline, Real-time, SIL, HIL and PHIL simulations

The program Architecture & Systems of SuperGrid Institute has the means to run different kinds of simulation, each one of them representing a different level of realism.

The first level of realism is offline simulation. This type of simulation is the most commonly used when one has to model and design an electrical system. From the layout of transmission lines to the optimization of motor drives, offline simulations enabled the development of numerous applications. The operations can take the amount of time that the processor needs to solve them, without any restrictions.

And therefore, a ten minutes phenomenon can take much more time to be simulated. The objective though, is to obtain the results as fast as possible, depending on the available computation power, and the mathematical complexity of the model [2].

To add a supplementary layer of realism, one can run real-time (RT) simulations.

In that case, one loop of operation has a limited amount of time to be solved. The duration of time needed to compute all the equations of a given time-step has to be shorter than the simulation time-step. Otherwise, the simulation accumulates some lateness that will bring to fake results. It is said that an "overrun" occurs when the simulator oversteps the simulation time step to solve one loop of operations. This kind of simulation aims to bring in the reality of the industrial devices that actually solve the operations on the real system. Those devices have inherent working rates that restrict its capacity to receive the data from externally connected devices, process it, and send back the result. At this level, when all the elements of the system are simulated, the simulation is said to be Software-In-The-Loop (SIL).

On figures 2.8a and 2.8b, one can see that the simulation steps are either slower or faster than the simulation time-step. Whereas, on figure 2.8c, the simulation step’s lengths is shorter than the simulation time-step. And after one step is solved, the simulation waits for the next simulation time-step to solve the following loop of operations.

Once an SIL real-time simulation is functional, the next step is to place some parts of the model outside the simulation. These parts of the simulated system will

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2.2. Offline, Real-time, SIL, HIL and PHIL simulations 11

(A) Offline simulation: faster than real-time (B) Offline simulation: slower than real-time

(C) Real-time simulation: synchronized

FIGURE2.8: Comparison of offline and real-time simulations [2]

be achieved by the physical counterparts that actually achieve these tasks on the electrical grid. This kind of simulation is called Hardware-In-The-Loop (HIL) sim- ulation. And finally, if power components are also connected to the simulation, i.e.

components which require a certain amount of power, the simulation becomes a Power-Hardware-In-The-Loop (PHIL)simulation.

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13

Chapter 3

Supplementary controllers for embedded HVDC links

3.1 State of the art of AC stability enhancing controllers

Because the HVDC links reduce the stability margins of the power system, as was shown in section 2.1.4, supplementary controllers are necessary to improve the global transient stability. These controllers provide the AC/DC converters with a setpoint of power to inject into the AC grid. When a disturbance occurs, the power setpoint is modulated in order to damp the resulting oscillations, taking advantage of the power available in the converters.

Different kinds of controllers can be found in the literature. A survey of controllers to damp interarea oscillations was done in [4]. Those controllers work under different principles regarding the converters’ technology (VSC or LCC), the input measurements (frequency, phase, voltage, etc.), the output (active or reactive power modulation), the method of control, etc. The methods that will be detailed here are in most cases implemented in VSC-HVDC links, as an independent control of the active and reactive power is possible with this technology, unlike LCC-HVDC links.

Three different feedback signals are mainly used to determinate the stabilizing output of the controllers: either the frequency or the phase difference between the HVDC terminating buses, or the active power flow in the parallel AC transmission line. In the following, control methods applied to these different inputs will be detailed.

Controllers modulating the power reference based on frequency measurements were considered in [15, 16]. The method described in these articles is based on the use of Control Lyapunov Functions (CLF) to improve transient stability after a large disturbance, by modulating the active power of the VSC-HVDC. It also presents additional controllers based on linear theory to provide the system with positive damping by modulating either the active or reactive power. The latter case is feasi- ble only when no active power is being transferred on the HVDC link.

The authors then added a Multichoice Controller which selects the right correcting feedback depending on the situation’s needs. Power modulations comes from Small Signal Analysis (linear control) to damp power oscillations, or from Lyapunov theory (nonlinear control) to enhance transient stability. To change the power flow conditions, or support the voltage, the power reference is taken as the difference between the online measured values, and the set values specified by the operator.

In this way, if a large disturbance occurs, the priority is given to the preservation of synchronism. Therefore the Multichoice Control first selects the input signals

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14 Chapter 3. Supplementary controllers for embedded HVDC links

coming from transient stability and blocks the others. Then, once the first swing is controlled, it switches to signals coming from Small Signal Analysis to provide damping and possibly voltage support.

When tested on a two-area power system, the active power based control provides good damping of the oscillations resulting from a three-phase short-circuit. But the system is unstable if it is heavily loaded, and without reactive power support.

[19] also studied the effect of active and reactive power modulation of a VSC-HVDC link, based on the link endings’ frequencies. This study shows that the Critical Clear- ing Time (CCT) is, in both cases, longer than when there is no HVDC link in the system. The evolutions of the CCT as a function of the active power and the reactive power setpoint modulation loops are also given. One can see that the CCT is maximum for a certain value of the active power modulation gain, and then decreases.

But it is constantly increasing with the reactive power modulation gain.

The use of the frequency measurements to modulate the active power is also presented in [11], where the control is then implemented on the Nordic 44-bus test- system.

In the articles [12, 6], the idea of modulating the active power setpoint of the VSC-HVDC as a function of the cable endings’ phase angles is highlighted. This control emulates the behaviour of an AC line, and therefore the active power flow on the HVDC link varies depending on the difference of the phase angles. Accord- ing to [12], it provides the parallel AC system with a bigger synchronizing torque in the case of a disturbance, and therefore decreases the risk of transient rotor angle and voltage instabilities.

Finally, [5] proposes a feed-forward control which generates a power step on the HVDC link after the disconnection of a parallel AC line. This improves the transient stability of the system. As the frequency in the post-fault situation does not come back to its initial value, the power step through the HVDC link reduces the frequency drop and the generators are kept in synchronism. In order to do this, the step has to be set equal to the nominal flow of the disconnected AC line.

3.2 SGI’s solution to improve transient stability: DVAC

A solution was developed in SuperGrid Institute to improve the transient stability of a power system which contains HVDC links [8, 9]. This solution is called the Dy- namic Virtual Admittance Control (DVAC) and has the particularity to comprise the three different stabilizing methods mentioned in 3.1.

Let’s consider the AC/DC SMIB system given on figure 3.1.

The slave converter controls the active power injection into the grid, given by the following reference:

P_{hvdc_ref}= P_hvdc0+_∆P_hvdc (3.1) In this equation, P_hvdc0is the active power injected in steady-state conditions by the system operator, while∆Phvdc is the extra active power that is injected when a disturbance occurs. The correct amount of active power that will damp the resulting oscillations needs to be injected.

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3.2. SGI’s solution to improve transient stability: DVAC 15

FIGURE3.1: AC/DC SMIB

Initially, the system motion is given by:

Md²δ

dt² = P_m−P_l−P_ac−P_hvdc0−_∆P_hvdc (3.2) If the chosen control input is [8]:

∆Phvdc =Pm−P_l−P_hvdc0−Pac+K_δM(δ_ref−δ) +DωMdδ

dt (3.3)

The motion equation becomes:

d²δ dt² +Dω

dδ

dt +K_δ(δ_ref−δ) =0 (3.4) The resulting system is a damped harmonic oscillator which can be compared to a common mechanical system (figure 3.2), where K_δ is the stiffness of a spring and D_ωis a viscous damping coefficient.

FIGURE3.2: Common mechanical damped oscillator

The particularity of this control is that it possesses three different actions:

• The term proportional to the angle difference is the synchronizing power. This term emulates the behaviour of an AC line, and helps to synchronize both regions even in the case where the parallel AC line trips.

• The term proportional to the speed deviation is a damping power. It helps to damp the oscillations resulting from a disturbance.

• The last term results from measurements of the system. It compensates for the nonlinearities of the system. This term is also a feed-forward action that can quickly compensate for the loss of power flowing into the parallel AC line, and to avoid the appearance of power loops.

It is then needed to show that this control law actually improves the transient stability of the SMIB system. Figure 3.3 gives the power-angle curve of the system

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in two configurations. In the first case, no power limit is given to the slave converter, i.e. the converter can inject as much power as it needs. In the second case, the amount of power that can be injected by the converter is limited to 1 pu. In these two graphs, the active power injected when the DVAC is implemented, is compared to the case where the active power injected is constant. It is to be noted that the electrical power P_e(δ)is the sum of the power transiting through the AC line (P_maxsin δ) and the power transiting through the HVDC link (P_hvdc).

(A) No HVDC link power limits (B) HVDC link power limited to 1 pu

FIGURE 3.3: Power-angle curves with the DVAC control implemented [8]

As it can be seen on figure 3.3a, the power is equally shared between the AC transmission line and the HVDC link in steady-state conditions, i.e. at δ^s. Also, the choice of the control law is a non-linear function that linearises the output power of the machine P_e. And finally, one can compare the decelerating area obtained with the DVAC to the one obtained with constant references. When the DVAC is implemented, the decelerating area becomes infinite (see A^DVAC₂ compared to A^Const₂ ).

When the HVDC link injected power is limited to 1 pu (figure 3.3b), the electrical power is a linear function until the HVDC link reaches its maximum capacity. Com- pared to the case where the reference DC power is constant, one can see that the decelerating area is bigger with the DVAC implemented. Also, the maximum angle δ^uthat the system can reach to remain stable is higher.

3.3 Offline simulation of the DVAC on a simple test-system

To have an idea of how the DVAC affects the oscillations caused by a disturbance on the power system, a simple test-system was modelled in Hypersim. This system consists in a synchronous machine linked to two different infinite buses. It is connected to the first bus via an AC transmission line, and to the second bus via one half of an HVDC link (i.e. there is only one AC/DC converter and the infinite bus has a DC voltage). It is represented on figure 3.4, with the main parameters indicated on the right side (H being the inertia constant of the machine).

The DVAC is implemented inside the simulation and sends an active power reference to the AC/DC converter, obtained from the measurement of the angle and frequency on the Point of Common Coupling (PCC - the common node between the

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3.3. Offline simulation of the DVAC on a simple test-system 17 d_AC1 =1 km

d_AC2 =140 km P_hvdc =_{250 MW} P_m1=500 MW H₁ =4 s FIGURE3.4: A simple model to implement the DVAC

generator, the AC transmission line, and the AC/DC converter) and the AC power flowing through the AC transmission line.

The maximum capacity of the converter is 500 MW, and the DC voltage is equal to 640 kV. The angle and frequency measurements are obtained from simulated PMUs.

A three-phase short-circuit is applied on the middle of the AC line. It starts one second after the beginning of the acquisition, and lasts 200 ms. The resulting disturbance on the system is observed when the converter’s controller is given a constant active power reference, and when it is given a reference modulated by the DVAC (figure 3.5).

FIGURE3.5: Effects of the DVAC on a simple test-system

As one can see, the DVAC has a significant impact on the damping of the oscillations. When it is not implemented, the oscillations last more than 10 seconds, whereas the oscillations are damped after around 3.6 s when the DVAC is implemented. As expected also, the power peak injected by the converter at the fault instant is twice as big compared to when the DVAC is deactivated. This is because the DVAC acts directly on the power injected by the converter to the AC grid to correct disturbances. However, it can be seen that the converter injects almost 2 GW, whereas its capacity is equal to 1 GW. For the simulation to be more realistic, the

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power injected by the converter could be saturated at less than 1 GW. Or else the protection which blocks the injected current, when it reaches high values, could be activated.

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19

Chapter 4

SIL simulation of the DVAC

4.1 Modelling of the test-system

In order to test the DVAC, the choice of a test-system has first to be made. A two-area test-sytem commonly used for stability analysis is the model introduced by Prabha Kundur [13]. This model is composed of two areas of two synchronous machines, linked by an AC transmission line. In the present case, it has been decided to adapt this model to the study, by the addition of a HVDC link in parallel with the AC line.

This model is represented on figure 1.1a.

Here, MMC converters were chosen to be the AC/DC converters, as this type of converter is a main research topic within SGI. The controllers of the MMCs were designed in Hypersim by Ahmed Zama [20]. Thus, the DVAC acts on one of the MMC configured to be the slave converter i.e. the converter which controls the power injected into the AC grid (the master converter controls the DC voltage).

The modelling of the test-system in Hypersim was done step by step. First, the basic Kundur model, available in the software’s example library was debugged, and used as a base model (figure 4.1a). Next, one of the areas was replaced by an infinite bus. And one part of an HVDC link was connected to the PCC, the other part being connected to a DC infinite bus (figure 4.1b). Then, the DC infinite bus was removed, another MMC added and connected to the AC infinite bus (figure 4.1c). And finally, the AC infinite bus was replaced by the two machines that were present originally on the basic Kundur model (figure 4.1d).

The parameters of the retained model (step 4) are given below:

Line Lengths:

d_AC1= _d_AC2=_{220 km} d_AC3= d_AC5=35 km d_AC4= d_AC6=10 km d=_{50 km}

Loads:

PLD1=_{635 MW} Q_LD1= −133 MVAr P_LD2=1161 MW Q_LD2= −_{214 MVAr} Generators:

P_m1=P_m2=P_m3=P_m4=_{700 MW} H₁= H₂= H₃= H₄ =3.7 s

HVDC line:

P_hvdc0 =_{100 MW} V_hvdc =630 kV

The maximum capacity of the MMCs is also set to 1 GW.

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20 Chapter 4. SIL simulation of the DVAC

(A) Kundur model - step 1 (B) step 2

(C) step 3 (D) step 4

FIGURE4.1: Modelling of the two-area test-system in Hypersim

4.2 Implementation of DVAC

As explained in section 3.2, the DVA control law is divided into three parts: one proportional to the speed deviation, one proportional to the angle deviation, and the last one proportional to the active power flow between the two areas. Here, the speed and angle deviations are measured as the difference between the two areas’

measured frequencies and phase angles. And the feedback law is calculated as the difference of the active power scheduled to flow between the two areas, and the active power flow actually measured in the lines linking the two areas. The mean value of the phase angle difference obtained in steady-state operation is subtracted to actual measured difference, so that the correction is equal to zero in normal operation.

The DVA correction is implemented in a block-diagram in Hypersim, as shown in figure 4.2.

FIGURE4.2: DVAC block diagram

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4.3. Offline simulation of the DVAC on the two-area test-system 21

The DVAC gains are tuned using the following formulas [8]:

k_δ = ^Mω

n2

P_n

D_ω=2ξω_n (4.1)

where:

• ωnis the desired natural frequency, i.e. the frequency of the power oscillations without any correction;

• Pnis the nominal power of the HVDC link;

• ξ is the damping coefficient of the power oscillations between the two zones.

In the presented work, without the DVAC, the oscillations measured in the case of a three-phase fault on one of the AC line have a frequency of approximately 0.5 Hz. Moreover the inertia of the machines is set on 3.7 s, hence a corresponding k_δ = 0.42. And if a damping of 5% is retained, then D_ω = 41.85. The feed-forward gain is set to k_ff =1. The DVAC gains keep the same value in all the simulations of this report.

4.3 Offline simulation of the DVAC on the two-area test-system

A three-phase short-circuit of 200 ms is simulated on one of the AC transmission lines, at a distance of 50 km from the first area. The simulation is ran two times: first with a constant active power reference given to the MMC, and then with a modulated active power generated by the DVAC. The result is given on figures 4.3.

As one can see on figures 4.3a and 4.3b, the damping of the oscillations is im- proved when the DVAC is activated. The modulation of the power reference by the DVAC can be seen on figure 4.3f. During the oscillations,∆Phvdc 6=0. The reference then tends toward the initial power reference P_hvdc0when the disturbance is cleared.

Consequently, the modification of the power reference creates oscillations on the active power flowing through the HVDC link (figure 4.3e), which is to be expected.

Oscillations also appear on the DC voltage of the HVDC link, as one can see on figure 4.3c.

4.4 SIL real-time simulation of the DVAC on the two-area test-system

In order to make the simulation run in real-time, the whole system has to be broken down into several parts. Each part is considered as a different task by Hypersim, and will be allocated to a certain core of the simulation target. For instance, one task takes care of an area of two machines, another one takes care of an MMC converter, another of the HVDC cable, etc. In the present work, the system is quite basic, so only two cores are needed to simulate all the tasks, with a simulation time-step of 25 µs.

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22 Chapter 4. SIL simulation of the DVAC

(A) (B)

(C) (D)

(E) (F)

FIGURE4.3: Offline simulation of the DVAC on the test-system

The same fault as the one simulated in section 4.3 is exposed on figures 4.4. As one can see, the graphs are very close to those obtained with an offline simulation.

Only the peak values of the phase difference, and of the HVDC voltage are higher in the real-time simulation.

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4.4. SIL real-time simulation of the DVAC on the two-area test-system 23

(A) (B)

(C) (D)

(E) (F)

FIGURE4.4: Real-time simulation of the DVAC on the test-system

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25

Chapter 5

HIL simulation of the DVAC

5.1 Set-up of the simulation

In the time-period of the internship, only the implementation of the DVAC on a Raspberry Pi (RPI) computer was tackled. The set-up is given on figure 5.1. The output data goes out of the simulation through the ethernet port 3, while the input data enters the simulation through port 4. The two ports are actually connected to an ethernet switch, on which the Rasperry itself is plugged. The hardware of the utilised RPI is the 4^thversion.

FIGURE5.1: HIL simulation set-up

The diagram on figure 5.2 shows the principle of the HIL simulation. Measure- ments done by on the modelled PMUs inside the simulation are sent via IEC 651850 to the RPI. The RPI processes the data, and sends back the MMC active power reference, which is then given to the MMC controller.

5.2 Programming of the Raspberry Pi

The RPI computer plays here the role of the DVAC controller. It is the first step before the implementation of a real phasor controller on a HIL simulation. Thus, the RPI receives measurements of the frequency and phase angle from the PCC of both areas, as well as the AC power flowing through the AC transmission line. These measurements are processed inside the RPI by the DVAC algorithm and the resulting power reference is published back to Hypersim.

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26 Chapter 5. HIL simulation of the DVAC

FIGURE5.2: HIL simulation principle

The architecture of the program was taken from a former project achieved in SGI.

The code is thus divided in 6 different C files:

main.c: Main program that calls all the subprograms. Composed of an initialisation step followed by an infinite loop which is stopped by the user.

IED.c: Defines the input/output (I/O) variables of the DVAC controller, as well as some parameters.

init_SV-GOOSE.c: Initialises the Sampled Value Receiver and the Sampled Value Publisher.

listener.c: Receives the data from the Ethernet and store them into a table.

control.c: Calls the DVAC algorithm with the necessary arguments.

DVAC.c: Contains the DVAC algorithm.

Some of these programs will be described below.

5.2.1 main.c

As described above, the program starts by creating two structures (defined in IED.c):

one containing the I/O variables and the other one containing some parameters that are useful for the DVAC algorithm.

A memory address table svAddressTable is then created. This table will contain the values received by the SV Receiver the last time it was called. There are 5 entries, one for each measurement needed by the DVAC.

Next, the SV Receiver is created and configured by init_SV-GOOSE.c. A parallel thread is launched. This thread, governed by the function listener.c, is activated each time a SV is received on the Ethernet port. Likewise, the SV Publisher is created and configured by init_SV-GOOSE.c.

The SV Publisher continues to be configured below. The required number of ASDU is added to the Publisher, and each of them is configured to publish 32 bits

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5.2. Programming of the Raspberry Pi 27

integers.

The infinite loop subsequently begins. A first measurement of the time is done, and compared to the measurement done in the previous call of the DVAC. If a period dT elapsed, the DVAC algorithm is called (function DVAC). And the returned value of the power reference is memorized in the list of messages to be sent (SVPub- lisher_ASDU_setINT32). Then, when the number of calls of the DVAC function is equal to the chosen number of ASDU, the correct Sample Count value is assigned to each message, and the package is published (SVPublisher_publish).

5.2.2 init_SV-GOOSE.c

This program contains the two functions which initialise the SV Receiver and the SV Publisher.

The first function creates a Subscriber set on the required APPID (0x4000). And a receiver background thread is launched.

The Publisher needs more configurations. The Mac Address is rewritten in the format required by the Publisher creator. It is then given, with the other parameters to the Publisher creator function (SVPublisher_create).

5.2.3 listeners.c

The program listener.c contains the function svUpdateListener which reads the data received by the SV Receiver and transmit it to the svAddressTable. It first creates a table to which the same memory address as the svAddressTable is attributed.

Then, the several variable’s values are extracted from the SV message via the function SVSubscriber_ASDU_getINT32. The received data are encoded on 4 bytes.

Therefore the wanted variables have to be read every 4 received bytes. Here, the first five received variables are the AC power, the two areas’ frequencies, and the two area’s phase angles. The three other variables are sign integers related to the sign of the power and the two frequency values. If the integer is equal to 1, the op- posite of the corresponding value is written in the table. This is done to compensate the inability to send negative values from Hypersim. And this is useless for the angle measurements as the angles are constrained in the interval[_{0; 2π}]before being published.

Also, because the way to send floats via IEC 61850 was not found, the values are multiplied by a 10ⁿfactor depending on the required accuracy. The received values are thus corrected in this function by multiplying by 10⁻ⁿin return.

5.2.4 DVAC.c

The DVAC algorithm is coded in C in this function. First, the measured AC power is converted in pu. Then the total scheduled power is obtained as the addition of the scheduled AC power plus the HVDC reference power P_hvdc0. Here, the scheduled AC power was taken as the steady-state measured power during normal operation of the system. And from this, the feedback action equal to the difference between the total scheduled power, and the total measured power flowing between the two

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areas, is calculated.

The two other correcting terms, the frequency and angle deviations are also calculated. As the angle measurements were displaced in the[O; 2π]interval, the angle difference is brought back to the interval[−π; π]. Also, for the correction to be equal to zero during normal operation, the angle difference in steady-state operations is subtracted to the measured angle difference.

From this, the active reference power is calculated as the sum of the power, frequency and angle differences, weighted by the gains D_ωand K_δ.

5.2.5 Improvements to be done

Several ideas of improvements of this code were raised but could not be addressed in time during this internship. For instance, it would be better to replace the table svAddressTable by a buffer. Indeed, it is not sure whether all the values that were written in the table are used by the DVAC or not. It is possible that the data are rather overwritten before being taken into consideration by the controller. If a buffer is used instead, the data will pile up, and thus avoid to overwrite the previous measured data. Only the first arrived value will be processed by the DVAC.

Also, the RPI 4 possesses 4 cores, all of them processing background operations at all times. It is possible though to select 2 cores to process the hole background operations, thus letting the 2 others free for the DVA control.

5.3 IEC 61850 communication protocol

Because the industrial phasor controllers generally use the protocol IEC 61850 to communicate data with the converters’ controller, it was decided to use the same protocol for the communication between the simulation target and the RPI. This protocol has several constraints that one has to follow in order for the communication to be operating.

5.3.1 General description

The IEC 61850 standards define the publication and the receipt of Sampled Values (SV). The norm is used for the exchange of data in a substation, between the Merging Units and the Intelligent Electronic Devices (IEDs - e.g. the DVAC controller or the converters’ controllers). This protocol defines communication exclusively via Eth- ernet [3]. The diagram 5.3 represents the different devices of a substation, and the different means of communication. The IEC 61850 protocol deals with the process bus framed in blue.

The sampled values are sent periodically, with a sending period which depends of the measured signal frequency and the Sampling Rate (SR). Thus, for a nominal frequency of 60 Hz and an SR of 256 samples per cycles, the sampled values are published every¹/60×256≈_{65 µs.}

The SV messages contain different pieces of information about the destination of the message, its source, or its length. And at the end, the actual usefull measured value, or APDU (Application Protocol Data Unit). However, each APDU can be a

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5.3. IEC 61850 communication protocol 29

FIGURE5.3: SV communication inside the substation [1]

package of several measured values called ASDUs (Application Specific Data Unit).

One APDU can contain up to 8 ASDUs. The exact content of a SV message is given on figure 5.4.

The ASDU field must also contain additional fields [1] like the svID (Sampled Values IDentifier), which is a unique string used by the subscription, or the smpCnt (Sample Count), which is a counter indexing the SV message.

5.3.2 Modelling of the communication

The IEC 61850 communication protocol was designed in order to be applied on any types and brands of devices, and to avoid configuring the devices one by one.

Thanks to its structured modelling approach, the devices can configure themselves [17].

The devices are broken down into physical and logical devices. The physical device is the device which is connected to the network [17] and which is identified by a network address. One physical device contains one or more logical devices, which represent the different functions of the physical device.

Then, each logical device has one or more logical nodes. The logical nodes are groups of different types of data corresponding to the same power system function.

For instance, there are logical nodes for automatic controls, for metering and measurement data, etc. On table 5.1, the different data objects of the XCBR logical node are presented. As one can see, data object has a specific data class (Sampled Value, Measurement Value, etc) and is linked to a specific type of information. An exhaus- tive list of the available logical nodes can be found on [18].

Here, three physical devices, or IEDs, were selected : the PMU, the MMC controller and the DVAC controller.

The PMUs send to the DVAC controller 5 measurement signals: the frequencies and phase angles of the two areas, as well as the measurement of the AC power flowing through the AC transmission lines. In addition, three integer signals are

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FIGURE5.4: SV message content [3]

sent, related to the frequencies (one signal for each area) and the AC power. These integers are equal to 1 if the measured signal is negative, or else to 0 if they are positive. These signals were added because it has not been found how to publish negative values from Hypersim, and therefore the absolute value of the frequency and AC power measurements can only be published. The angle measurements are constrained between 0 and 2π, so only positive values are to be published from Hy- persim, and such integer signals are not needed. The limitations of IEC 61850 via Hypersim are addressed in section 5.3.3.

On the other hand, the DVAC controller sends the active power reference to the MMC controller. Personalised logical nodes were created on the software ICD De- signer. The table 5.2 sums up the communication configuration.

5.3.3 Inherent limitations and delays

During the test of the communication between the RPI and the simulation software Hypersim, certain limitations were noticed. More precisely, two kinds of limitations were studied: the limitation on the type of data (integer, float, positive or negative) that can be published, and the presence of delays visible in the form of steady stages in the received data in Hypersim.

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TABLE5.1: SV message content [17]

Publishable types of data

To configure the communication on Hypersim’s side, the software ICD Designer was used. This software generates an .icd file that is then loaded on Hypersim. Two types of data can be chosen, either .i (integers) or .f (floats). It appeared that only .i data could be used on Hypersim. If one tries to publish or receive .f data from Hypersim, the resulting value is always 0.

Therefore only integers can be transferred. This limitation was overstepped by multiplying the published data by a 10ⁿfactor, and the received data by 10⁻ⁿ, where n is chosen depending on the required accuracy. However, the accuracy is limited by the maximum value that can be published by Hypersim, which is equal to 16383.

In the present configuration, the value n was chosen to be 4 for the frequency measurements, 3 for the angle measurements,−6 for the AC power measurement, and 4 for the MMC power reference.

On the other hand, it was noticed that only positive integers could be published from Hypersim. Whereas it is possible to send negative integers from the RPI to Hypersim.

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Physical devices Logical devices Logical nodes Data objects

PMU_IED PMU_1 PMUA0 PowAC

Omeg1 Omeg2 Delta1 Delta2

PMUB0 SignP

SignW1 SignW2

MMC_IED MMC_1 DVAC0 Pref

DVAC_IED DVAC_ctrl_1 DVAC0 Pref

PMUA0 PowAC

Omeg1 Omeg2 Delta1 Delta2

PMUB0 SignP

SignW1 SignW2 TABLE5.2: Communication configuration

Communication from Hypersim to the RPI

The communication was studied in both directions, from the simulation target (i.e.

Hypersim) to the RPI, and vice-versa.

For the first case, a sinusoidal signal of frequency 60 Hz and amplitude 10 is published from Hypersim to the RPI. The data received in the function listener.c, are written in a text file, and then placed in a plot. On this plot, the time axis is retrieved via the sample count that indexes each message. This sample count increments up to 15359 and is then reinitialized to 0. Figure 5.5 shows the variation of the sample count as a function of the sent sample.

FIGURE 5.5: Hypersim sample count variation as a function of the published sample

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One way to retrieve the real time from this is to count the number of times the sample count is equal to 0. And then the time is expressed by:

time= ((nb_SmpCnt×15359) +SmpCnt×65·10⁻⁶ (5.1) On figures 5.6, the superposition of the sinusoid sent from Hypersim and the one received by the RPI is shown. The comparison was done in the case where the number of ASDU per message is equal to 1 (left side), and where it is equal to 8 (right side). On figures 5.6a and 5.6b, the data were received on the function listener.c, while on figures 5.6c and 5.6d, the data were received in the function main.c (in the infinite loop).

The acquisitions of the two published and received signals were done separately, so the phase difference must not be taken into account. But the amplitude and the frequency of the sinusoids are the same as the original signals. However, one can see that the sinusoids captured in the main program of the RPI are a little bit misshapen, compared to the signals received in the function listener. This shows that there are some differences between the data received by the RPI on its Ethernet port, and the data used by the DVAC function.

(A) 1 ASDU (B) 8 ASDU

(C) 1 ASDU (D) 8 ASDU

FIGURE5.6: Publication from Hypersim to the RPI

Communication from the RPI to Hypersim

Likewise, the publication from the RPI to Hypersim was considered. On the signal received on Hypersim, delays were spotted in the form of constant stages. These stages are visible on the graph 5.7 which represent a sinusoidal signal sent from Hy- persim to the RPI, and directly back to Hypersim. They are approximately 1 ms long,

Dynamic Virtual Admittance Control Hardware-In-The-Loop Real-Time Simulation

Dynamic Virtual Admittance Control Hardware-In-The-Loop Real-Time Simulation

DAMIEN GADOU-SANYAL

K UNGLIGA T EKNISKA HÖGSKOLAN

M

T

Dynamic Virtual Admittance Control Hardware-In-The-Loop Real-Time

Simulation

Abstract

Acknowledgements

Contents

List of Figures

List of Tables

List of Abbreviations

Chapter 1

Introduction

1.1 General introduction

1.2 Objectives of the internship

1.3 Context of the internship

Chapter 2

Theoretical background and definitions

2.1 Transient stability of an SMIB system

2.2 Offline, Real-time, SIL, HIL and PHIL simulations

Chapter 3

Supplementary controllers for embedded HVDC links

3.1 State of the art of AC stability enhancing controllers

3.2 SGI’s solution to improve transient stability: DVAC

3.3 Offline simulation of the DVAC on a simple test-system

Chapter 4

SIL simulation of the DVAC

4.1 Modelling of the test-system

4.2 Implementation of DVAC

4.3 Offline simulation of the DVAC on the two-area test-system

4.4 SIL real-time simulation of the DVAC on the two-area test-system

Chapter 5

HIL simulation of the DVAC

5.1 Set-up of the simulation

5.2 Programming of the Raspberry Pi

5.3 IEC 61850 communication protocol

K ^UNGLIGA T EKNISKA HÖGSKOLAN