Development of an off-line silicon wafer warpage measuring tool Linas Čapas

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Development of an off-line silicon wafer warpage

measuring tool

Linas Čapas

Master of Science Thesis TRITA-ITM-EX 2021:8 KTH Industrial Engineering and Management

Machine Design SE-100 44 STOCKHOLM

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Examensarbete TRITA-ITM-EX 2021:8

Utveckling av formmätningsverktyg för off-line mätning av vrängning hos kiselplattor

Linas Čapas Godkänt 2021-01-18 Examinator Ulf Sellgren Handledare Björn Möller Uppdragsgivare ASML Netherlands B.V. Kontaktperson Gijs Kramer

Sammanfattning

Vrängda kiselplattor och de problem som uppstår på grund av det är ett känt fenomen inom halvledarindustrin. För att kringgå dessa problem behövs god mätnoggranhet och det nuvarande sättet att hantera vrängda kiselplattor på inom företaget är långt från idealt. En batch kiselplattor hämtas hos kunden med antagandet att alla kiselplattor är identiskt vrängda. Ett enda exemplar som representerar hela batchen väljs sedan ut och skickas till ett externt mätföretag. Metoden som används för att mäta kiselplattan innehåller föroreningar och metoden repar även kiselplattan, som därmed inte kan användas efteråt. Utöver mätmetodens brister tillkommer även en utökad logistik och större materialspill som tillför kostnader för företaget.

Examensarbetets syfte är att förbättra mätmetoden som används för att utvärdera kiselplattornas vrängning och målet med projektet är att utveckla en prototyp som tillåter att mätmetoden görs internt inom företaget.

Rapporten innehåller metodiken som användes för att uppnå det slutgiltiga konceptet samt resultatet, och innehåller planeringsmoment samt projektets delmoment som: WBS, GANNT, funktionsnedbrytning, kravspecifikationer samt urvalsmatriser.

Det valda konceptet består av en sorteringsmaskin kombinerat med mätutrustningen och liknar en FOUP (Front Opening Unified Pod), vilket tillåter sorteringsmaskinen att tillföra och byta ut kiselplattorna som ska mätas. Mätutrustningen består av en roterande rörelse hos kiselplattan och en linjär rörelse hos en konfokal sensor placerad ovanför kiselplattan. Kombinationen av de båda rörelserna tillåter att hela kiselplattans yta mäts med ett givet vinkel- och radiellt steg. Genom att vända kiselplattan uppochner med sorteringsmaskinen och utföra samma mätning igen kan kiselplattans korrekta form estimeras genom att eliminera gravitationseffekten.

Konceptet utvecklades i detalj och tillverkningsunderlag och ritningar togs fram samt komponenter avsedda för tillverkning av en prototyp beställdes. På grund av COVID-19 pandemin uppstod dock kommunikationssvårigheter och förseningar i ledtider. Detta påverkade leveranserna och en del komponenter kom inte fram förrän i slutet av examensarbetet och det fanns därmed ingen tid över för montering eller tester som kan styrka konceptet, vilket får lämnas över till företagets anställda.

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Master of Science Thesis TRITA-ITM-EX 2021:8

Development of an off-line silicon wafer warpage measuring tool Linas Čapas Approved 2021-01-18 Examiner Ulf Sellgren Supervisor Björn Möller Commissioner ASML Netherlands B.V. Contact person Gijs Kramer

Abstract

Warped wafers and all the issues arise with them. are known issue in semiconductor industry. To solve those issues, the shape of the wafer needs to be known precisely. Current way of working when it comes to warped wafers is far from ideal within the company. A batch of wafers is acquired at customer’s site and it is assumed, that all the wafers in the batch are warped identically. A single specimen, representing the whole batch, is then taken to external company to be measured. As the method of measuring currently used contaminates and scratches the wafer, wafer must be scrapped afterwards. All the logistics and scrapped wafers add unnecessary costs to the company.

To optimize the warpage measuring procedure, a graduation internship project was initiated with a goal to develop a prototype of the tool, enabling inhouse warpage measuring.

The report contains all the methodology used to reach the final concept and results and includes methods such as: WBS, GANTT chart, Functional breakdown, Design requirement specification, Morphological matrix and PUGH’s matrix.

Final concept of warpage measuring tool consisted of implementing wafer sorting apparatus for wafer handling and enclosing the measuring tool to a custom housing, resembling a FOUP (Front Opening Unified Pod), allowing wafer sorting apparatus to load and unload test specimen for measuring. The measuring concept consists of rotary stage, where the wafer is loaded and rotated in addition to linear stage, that holds a confocal sensor above the wafer and moves it across the surface of the wafer, measuring the profile of the wafer, rotated every defined number of degrees between the measurements. Gravity induced deflection is eliminated by flipping the wafer using same wafer sorting apparatus and measuring the wafer inverted, thus allowing to estimate the true shape of the wafer.

The concept was developed in more detail, drawings for manufacturing the parts were created and the parts for building a functional prototype were ordered. Because of the COVID-19 pandemic, there were inevitable communication difficulties and delays in lead times, resulting in parts arriving on the last days of the internship, leaving no time for assembling and testing the actual prototype, therefore proof of concept is yet left to be tested by the employees of the company.

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FOREWORD

I express my sincerest gratitude to ASML and all the people inside the organization for providing me with the opportunity to write my master’s thesis at this astonishing company and always helping me on the way even through this uncertain time of worldwide pandemic.

I would like to thank Gijs Kramer for trusting me with the assignment, welcoming me and guiding me in every aspect during my stay at ASML.

Additionally, I would like to thank colleagues from the Service Lab, Modelshop, Wafer Processing groups and everyone involved in general.

Finally, I am grateful for my academic supervisor Björn Möller and examiner Ulf Sellgren for all the help while writing this thesis.

Thank you all.

Linas Čapas Eindhoven, October 2020

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NOMENCLATURE

This chapter presents the notations and abbreviations used in the document.

Abbreviations and expressions

3D Three-dimensional

CAD Computer Aided Design

D&E Design and Engineering

DUV Deep Ultraviolet

EUV Extreme Ultraviolet

FEA Finite Element Analysis

FOUP Front Opening Unified Pod

FOSB Front Opening Shipping Box

Off-line External or separate, i.e., not within the photolithography machine PEEK Polyether ether ketone

RFID Radio-Frequency Identification

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1 INTRODUCTION

This chapter describes the background, the purpose, the limitations, and the methods used in the presented project.

1.1 Background

This document is a documented report of a graduation internship project at ASML Netherlands B.V. The graduation internship and the project results achieved during it will act as a master thesis project to obtain master’s degree from KTH Royal Institute of Technology in Stockholm, Sweden in Engineering Design study program, Machine Design study track.

The off-line warpage measuring tool is a part of an ongoing project within the company. The tool is intended to change the way of working when it comes to issues that warped silicon wafers cause as they are not perfectly flat and as they are used for production of semiconductor chips, even the smallest imperfections of wafer geometry can cause issues. Current way of working is inefficient and rather uncertain due to its nature. Currently, silicon wafer warpage is measured outside of the company, thus many additional potential risks arise since silicon wafers are brittle and fragile to handle. Transporting them to outside facilities and back takes multiple days and causes a risk of wafers being damaged. Usually, a batch of warped wafers is acquired at a customer’s site. One sample from the whole batch is then taken to external supplier for measuring. Measuring is done by contact probe method in non-cleanroom environment, both factors contributing to contaminating and scratching the wafer, irreversibly damaging it, which leads to scrapping the wafer. It is assumed afterwards, that the measured warpage value is valid for the whole batch of wafers.

The off-line warpage measuring tool would enable to measure and (or) verify every wafer individually inhouse without having to scrap the wafer once it has been measured as the measuring process now would-be non-contact and wafers would be handled in cleanroom environment by automated machinery, leaving less error for human factor errors. All this combined results in wafer warpage being measured faster and cleaner, allowing for potential financial savings as well.

1.2 Purpose

The purpose of this project is to develop a worked thorough concept of measuring the amount of warpage present on silicon wafers in a clean, contamination free and non-contact way inhouse cheaper, faster, while meeting the accuracy requirements, as well as to design, manufacture and test a worked thorough prototype. To fulfil the purpose of the project, following research questions will be addressed:

 How to handle silicon wafers and measure silicon wafer warpage in a contamination free way?

 How deflection of a silicon wafer due to gravity could be eliminated during the measuring procedure?

 What methods and what hardware components could be implemented to measure the warpage of silicon wafers to reach desired levels of measuring accuracy?

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1.3 Delimitations

Because of limited period of the Master Thesis internship as well as rather broad scope of the project, the following delimitations apply to the project:

 Due to Master Thesis project including manufacturing and testing an actual prototype, the concept generation will be limited to an extent, that allows choosing the most feasible concept to be developed in detail further on.

 The parts will be designed with professional attitude, having economic, environmental and performance impacts in mind, but no in depth FEA calculations will be performed to optimize the parts once they are manufactured, unless they do not meet the performance requirements.

 Final appearance and user friendliness of the prototype will not be emphasized and will not be considered to be a critical requirement since the project work will focus on functional prototype that proves the concept and thus will be operated by qualified member of D&E team.

 A boundary condition is established, that silicon wafer handling equipment present in premises of the company is capable of handling silicon wafers that are warped up to ± 1 mm, thus everything related to warped wafer handling is left outside of the scope of the project.

 No active particle measurement will be performed to estimate the cleanliness inside the operating environment, the result is meant to be clean by design.

1.4 Method

Because of a broad project scope and a limited time available, a strong emphasis was put on project planning and structuring the workflow. Using WBS, presented in Figure 1, following main stages of the project were identified: Project planning, product development, product realization, project closure and administrative. Each of the main stages were divided into smaller sub-stages.

A GANTT chart was created to plan and schedule the work throughout duration of the project. To minimize uncertainty and risks, a risk assessment table was created. All are added as Appendices. Since ASML has extensive knowledge in the field that is well documented, major source of information was confidential documents of the company as well as interviews and meetings with employees of ASML.

Because of the size and complexity of the company, variety of different departments get involved in projects. For that reason, meetings were conducted with multiple employees from different departments and a design requirement specification was finalized and approved by people of multiple competences.

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Functional breakdown of expected wafer warpage measuring tool was developed and the functions were used in morphological matrix to generate multiple possible concepts. The concepts were presented in an organized meeting with multiple team and group leaders from different departments of the company and the final concept to be developed further was chosen.

1.5 Sustainability and ethical considerations

Throughout entire design process, a strong emphasis was put on sustainability and environmental impact. The primary source of materials, manufacturing facilities and components was intended to be internal facilities and resources of the company, the reason being faster lead times, no transportation of the parts between multiple suppliers, better communication, allowing to notice possible design and drawing flaws, leaving less room for errors. The initial sensor of choice was chosen to be a different one that ended up in the final design, the reason being that a relatively old sensor, which is not being produced by the manufacturer anymore, was found in stock at the company’s measuring facilities. The sensor met all the performance requirements, however quite a few design changes were needed to implement the sensor successfully, due to new sensor being older, therefore bulkier, taking more space and having different mounting interfaces. Functionality of the prototype could be easily further improved if needed and more features could be implemented without having to completely discard the old version.

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2 FRAME OF REFERENCE

This chapter provides the information about wafer warpage in terms of the warpage phenomenon itself, its causes, and consequences as well as how warpage influences the work of ASML.

2.1 Introduction to chip fabrication process

Fabrication of semiconductor chips is a highly complicated process, involving many steps within multiple disciplines. To fully understand the role ASML plays in the process as well as what is a silicon wafer, what causes it to warp and what are the issues that arise with it, a simplified flowchart of semiconductor chip fabrication process is presented below in Figure 2, and process step 5 is where ASML’s machines are the key contributors.

Figure 2. Simplified flowchart of semiconductor chip fabrication process (van Gerven, 2017)

The first step of the long process is fabrication of a silicon wafer, which is the fundamental element of a semiconductor chip. An ingot of crystalline silicon is formed by melting silicon and drawing the molten silicon upwards, allowing it to cool down and form a solid cylinder-shaped ingot. The ingot is then sliced into thin pieces, that are known as wafers. Wafers are then further processed by lapping, etching, polishing to achieve needed geometric and physical properties.

Once the wafer has been processed, materials are applied to the wafer, such as silicon oxide layer, silicon nitride layer and layer of photoresist. Once the wafer has been coated, this is the stage, where ASML comes in. ASML manufactures photolithography machines, that use Deep

Finally, the chips are enclosed in special plastic packaging in another plant

Wafers are sawed out of a block (ingot) of very pure crystalline silicon Polishing Material deposition or modification The resist is applied to a spinning wafer to achieve a uniform layer Lithography for semiconductor manufacturing in a nutshell: lenses shrink a mask pattern and project it onto a wafer Light Reticle mask Lens

The chip pattern is “burned” into the resist in an exposure step The print is developed through etching and heating Ion implantation The resist is removed The wafer processing cycle is complete, and a single chip layer has been

fabricated After all the

required cycles have been completed, the

chips can be cut out of the wafer and tested Wafer Pattern being transferred onto wafer Repeat thirty to forty times

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ultraviolet (DUV) or Extreme ultraviolet (EUV) light to expose reticle mask and transfer mask’s patterns onto the wafer. This step, while briefly described in a single sentence, requires state-of-the-art machines of enormous complexity. Exposed photoresist can then be chemically removed. These patterns, where photoresist is removed, are then etched. Etched regions are exposed to ionized gases, implementing ions to the features. These steps are then repeated multiple times for multiple layers of the chip to be created.

When all layers are exposed, the wafer is cut into individual chips and then individually tested, packaged, and proceeded for further usage.

Whole semiconductor chip fabrication process is explained in a very brief manner with plenty of simplifications. It is done so to introduce the reader to the process, so further stages of thesis work are understood better.

2.2 Silicon wafers

Silicon wafer is a thin slice of semiconductor, such as crystalline silicon, used for fabrication of integrated circuits. The wafer serves as substrate for microelectronic devices built in and upon the wafer as silicon has semiconductor material properties.

Wafers are formed of highly pure, nearly defect free single crystalline material. In the industry of electronics, wafers are generally varying from 25 mm to 450 mm in diameter, most common being the 300 mm ones. Wafer size has been increasing throughout the years due to the fact, that with increasing wafer area, proportionally increasing amount of chips can be produced, while the price of production step increases at slower rate than the area of wafer increases.

Basic properties of 200 mm and 300 diameter wafers can be found in Table 1 and multiple sized patterned wafers can be seen in Figure 3 below:

Table 1. Silicon wafer properties

Wafer diameter, mm 200 300

Thickness, µm 725 775

Thickness variation, µm ± 10 ± 3

Weight, g 53 125

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Warpage is a term used to define the height difference between the highest and the lowest points of median surface of a free, unclamped wafer versus a reference plane that is globally parallel to the wafer (ASML, 2020). Schematically warpage is depicted below in Figure 4.

Figure 4. Silicon wafer warpage (ASML, 2020)

Silicon wafers have orthotropic crystalline structure, therefore X, Y and Z axes are defined and depicted in Figure 5 below.

Depending on the warp per axis, a few typical warpage shapes can be identified, and those terms are commonly used within the company when referring to warped wafers:

Table 2. Terms used to define warpage shape

Shape Warp on X axis Warp on Y axis

Bowl + + Umbrella - - Saddle + - Saddle - + Taco 0 +/- Taco +/- 0

In Figure 6 below, saddle, umbrella and taco shaped wafers are depicted.

Warp

+Y

+X

+Z

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Figure 6. Saddle, umbrella, and taco shaped wafers (Microchemicals GmbH, 2020)

2.3 Commercial wafer warpage measuring

Semiconductor industry being one of the most complex and technologically demanding industries, requires cutting-edge equipment and machinery to keep pushing the limits and driving the world further. Silicon wafer warpage is a well-known phenomenon and warpage measurement frequently comes along with measuring additional properties of the wafer, such as thickness, total thickness variation (TTV), bow, roughness, etc.

Commercial equipment for measuring mentioned properties exists with exceptional performance. High performance of these instruments is valuable for wafer metrology purposes, however, the measuring tool to be designed within this thesis is meant to be used for less accurate wafer measuring than the commercial measuring equipment.

Several well-known tools can be seen summarized in a table below:

Table 3. Comparison of well-known commercial warpage measuring tools

Name KLA-Tencor PWG Ultratech 4G+ Sentronics

SemDex A31

FRT MicroProf 300

Picture

Warpage limit (mm) 0.5 0.7 8 0.6

Wafer handling Automatic Automatic Automatic Automatic

XY resolution (mm) 0.2 0.2 0.2 0.2 Z resolution (nm) 0.1 0.1 20 20 Warpage measuring accuracy (µm) <0.1 <0.1 <1 1 Number of measured points >1M >1M >1M >1M

Measurement method Optical, contactless Optical, contactless Optical, contactless Optical, contactless

Other measured properties

Thickness, flatness,

nano-topography -

Thickness, flatness,

nano-topography -

Approximate cost €10M €4M €4M €4M

The tools mentioned above are highly complex, enabling them to be integrated into the manufacturing and processing processes in semiconductor fabs. Less complex equipment and methods for wafer warpage measurement can be found as well and are presented below.

E&H MX2012

Whole product series MX 20x from E+H is based on two heavy plates mounted parallel to each other. In the plates, there are capacitive distance sensors mounted. The wafer can be loaded automatically and manually depending on the tool’s model. MX 2012 (Figure 7.) allows measuring thickness, TTV, warpage, stress of the wafers of 300 mm in diameter, 500-1000 µm in thickness,

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with an accuracy of 1 µm. MX2012 has an array of 69 capacitive measuring sensors, thus resulting in 69 measured points across the wafer.

Figure 7. E&H MX2012 (E+H Metrology GmbH, 2020)

Contact probe measuring

This warpage measuring method is the most primitive one out of all mentioned. Warpage measuring is carried out by using coordinate measuring machine (CMM), whilst the test specimen is resting on 3 points on the bottom surface. An array of 177 points is probed, showing height deviations across the wafer and curve fitting is performed within the points to get more detailed results. To minimize gravity induced the deflection, the wafer is flipped, and corresponding points are measured on a flipped wafer. This measuring method, while being simple, irreversibly scratches and contaminates the wafer due to measurements happening outside the cleanroom, mechanical probe touching the surface of the wafer and the wafer touching 3 metal support points on both front and back surfaces. Another downside of this method could be added to the list as the wafers are intended to be used further after warpage inspection, however, as the wafers are scratched and can’t be used anymore, it is assumed that a single wafer represents a whole batch of warped wafers. This assumption reduces the accuracy and result certainty for exact wafer specimen. The advantages of this method over other methods are that warpage, thickness, and size of the wafer are not limiting factors and even highly warped wafers can be measured. The setup for contact probe measuring is depicted below in Figure 8.

Figure 8. Contact probe warpage measurement setup (ASML, 2020)

2.4 Wafer handling and contamination

Silicon wafers being such fragile items must be handled with extreme care. While blank wafers are expensive, they become significantly more expensive once exposed and require even more care when handling. As much as silicon wafers are vulnerable to handling, in production they are as vulnerable to contamination. A single dust particle might ruin entire batch of chips on the wafer.

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Even though all wafers are handled in cleanroom environment, the wafer must be stored in a special container – industry standard front opening unified pod (FOUP) and cannot even be opened surrounding cleanroom environment if the wafer is meant to be further processed.

For those reasons, handling silicon wafers is usually done by automated equipment with enclosed environment. One type of such machines is called wafer sorters. These machines allow multiple FOUPs to be loaded and once loaded, wafers can be aligned, sorted, inspected, and moved from one FOUP to another in enclosed environment with high positioning accuracy, gentle and contamination-free handling. One of the wafer sorters is presented in Figure 9. Wafers of 300 mm in diameter are industry standard, therefore wafers of such size can be handled by majority of the equipment. For smaller, 200 mm diameter wafers, a different end effector of the robotic manipulator is needed, therefore the same wafer sorter cannot be used to handle wafers of both sizes without additional tweaks and hardware changes.

Figure 9. Wafer sorting machine by Brooks Automation (Brooks Automation, Inc, 2020)

Inside every wafer sorter, there is a robotic manipulator, which moves along the wafer sorter, which is capable of gripping and manipulating the wafers. Such wafer handling manipulator can be bought off-the-shelf and used for developing a custom solution for wafer handling. An example of wafer handling robot is presented in Figure 10 below.

Figure 10. Wafer handling robot by Brooks Automation (Brooks Automation, Inc, 2020)

Looking into the scope of master thesis project, as it involved building and testing actual prototype of the tool, the choice on wafer handling solutions becomes even more narrow. Developing a device for wafer handling that has custom interfaces for loading and measuring the wafers would be expensive and complicated multi-disciplinary project on its own and it would be unrealistic to develop such machine in addition to actual warpage measuring instrument.

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Interface for wafer handling

In the semiconductor industry, silicon wafers are typically stored, carried, and transported in either FOUP or FOSB (Front Opening Shipping Box) containers. These containers have unified top, bottom, and frontal interfaces so they are compatible with all wafer processing equipment and wafers are possible to load/unload for processing. The top interface consists of a flange, allowing robotic carriers clamp and transport the container around the fab. The bottom interface accommodates three V-shaped grooves acting as a kinematic coupling for precisely locating the container on the tool, a rounded rectangle groove for securing and clamping the container to the tool, and occasionally a RFID tag, so the container and stored wafers could be recognized by the tool allowing for custom settings for a specific container. The front interface of both FOUP and FOSB consists of a front frame with a removable door. All the standard tools in semiconductor fabs are capable of opening and closing the door automatically after ensuring a tight connection between the container and the tool. The plastic body of the container with removable door prevents the stored wafers from external contamination.

Figure 11. Universal interfaces of a FOUP

Figure 12. Interface of a wafer sorting apparatus, where a FOUP is placed (ASML, 2020)

In case a custom solution is chosen to be developed to handle the wafers, it must be able to accommodate the FOUP and open the front door automatically. In addition to that, FOUP must be accommodated, meaning there must be three protruding pins, that allow FOUP to be accurately located and seated every time it is loaded.

All mentioned features already exist on the standard wafer sorting equipment at premises of ASML. This leaves no other rational option than to design the warpage measuring tool in a such way, that usage of existing wafer sorting equipment is implemented. As adding additional hardware to the inside of expensive commercial equipment is risky and yet results are uncertain, the design choices are narrowed down to the warpage measuring tool resembling a FOUP.

Top interface

Frontal interface

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All the reasoning above would lead to the following design choices and realization of previously mentioned functions – wafer handling, preventing contamination and providing interface for wafer handling in a way, which is schematically depicted from the top view in Figure 13.

Specimen of warped wafers are stored in up to three FOUPs (depending on the configuration of the wafer sorter), whereas one of the load ports is occupied by the warpage measuring tool itself. The robotic manipulator inside the wafer sorter can pick up warped wafer from any of the FOUPs, move and load it to the tool for measuring. Once the measuring is completed, the robotic manipulator unloads the warped wafer and returns it to the same slot in the same FOUP or into different FOUP if desired. A 3D visualization of the wafer sorter with warpage measuring tool and a FOUP loaded can be seen in a Figure 14 below.

Figure 14. 3D CAD render of warpage measuring tool (green) as an add-on to the wafer sorting apparatus with a standard FOUP (orange) loaded

Designing warpage measuring tool, that resembles a standard FOUP, so it can be integrated with a wafer sorter is possible in a few methods that are covered below.

First option of providing required interfaces is modifying a standard FOUP by drilling holes and adding supplementary parts and equipment needed to measure the warpage. This ensures all the interfaces of a FOUP are correct and the tool can be successfully integrated with the wafer sorter. There are a couple of downsides to this method, however. First and most important of all, FOUPs are meant to be used for transporting and storing the wafers, not to be used as a base for precise

Warpage measuring

tool FOUP FOUP FOUP

Wafer sorter

Test wafer pickup/return Test wafer loaded

for measuring

Wafer sorter moves the test wafer

Figure 13. Schematic drawing of warpage measuring tool as an add-on to the wafer sorting apparatus

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measuring equipment. The main body of a FOUP is made of polycarbonate material which is not stiff enough to be used as a base for measuring equipment, where normally thick granite or steel plates are being used. Secondly, using standard FOUP leaves very little to almost no space for adding supplementary structures and parts to hold the sensor(s) and other parts or apparatus should they be needed. A similar execution of a tool (not warpage measuring related) can be seen in one of Estion-Technologies GmbH products below in Figure 15, where additional equipment is added to a standard FOUP.

Figure 15. E-Wafer-Dockingstation of Estion-Technologies GmbH (Estion-Tech GmbH, 2020)

The second option is to design a custom enclosure, that resembles standard FOUP. This method allows for designing stiff and robust structure with better utilization of the space available on the wafer sorter between the load ports. While this method should lead to a better performance of the warpage measuring tool, it is more challenging task to design the body of the tool, as it has to have matching interfaces with a FOUP – the V grooves with a center hole for kinematic pins and active clamping on the bottom surface, as well as the frontal interface, to accommodate the door from a FOUP, ensuring a tight seal between the frame and the door, and also ensuring that door latch correctly and can be automatically opened by the wafer sorter. Similar solutions of executing a tool such way (not warpage measuring related) can be found in products from Brooks Automation and are presented in Figure 16 below.

Figure 16. Custom tool for calibrating wafer sorting apparatus with interfaces of a FOUP (MicroTool Technology, 2020)

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Throughout the procedure of measuring the wafer, it is important to have the wafer located and supported accurately and steadily the whole time. Ideally, the wafer should be supported without adding any additional loads and stresses that lead to distortion from the original shape of the wafer. In case the measuring procedure involves moving the wafer itself, wafer support shall be robust against forces, vibrations and similar disturbances caused by the wafer moving mechanism. During the research phase and talks with employees from ASML, many potential ways of supporting the wafer were found. The complexity varies from having the wafer to sit on three support points, to mechanically gripping the wafer by the edges and even suspending the wafer mid-air by implementing vacuum and compressed air in cases where the requirements are the most demanding.

In the sections below, a few most feasible options of supporting the wafer are presented and explained in more detail.

Vacuum chuck

One of commonly used methods to support the wafer is using a vacuum chuck and a common example of a vacuum chuck can be seen in Figure 17. A vacuum chuck is a cylinder with milled pocket grooves on the top surface, where a flow of vacuum is provided to the grooves. When silicon wafer is placed on top of the chuck, a tight seal appears between the pocket and the wafer surface, resulting in silicon wafer being clamped to the chuck.

Figure 17. Vacuum chuck (MTI Corporation, 2020)

This method of wafer clamping is already used in some of the modules within ASML machines. Implementing this method of supporting the wafer allows rotating the wafer while it is clamped. Since warped wafers are in interest in this project, clamping not a flat wafer results in applied clamping force over circular area, therefore the wafer is distorted from its original shape and to get accurate results of wafer warpage, the additional deformation must be taken in to account. Using this method, both 200 mm and 300 mm diameter wafers can be supported with no additional tweaks. The downside to this method is that silicon wafers can only be supported on the bottom surface, as flipping, and clamping the wafer would result in top surface being contaminated and this would result in failing to meet the performance requirements stated in upcoming chapters.

Three-point support on the bottom surface

A plane can be defined by three points in space. Having three support points around the circumference of the wafer it is guaranteed that wafer will stay stable, despite the shape of the wafer. The supports are spaced 120° apart of each other. Three-point support on the surface case is presented in Figure 18 below.

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Figure 18. Schematic of three-point wafer support on the bottom surface (Ito, Natsu, & Kunieda, 2010)

In case the wafer is supported using this method, the stability of the wafer depends entirely on the weight and the friction between the surface of the wafer and the support, since there is no active clamping mechanism present, such as vacuum or mechanical clamping. In case the wafer needs to be moved or rotated while being supported using this method, friction between the wafer and the support and acceleration are the key factors for a stable wafer support.

This support method, however, would not fully comply with performance requirements (stated in upcoming chapters) in case the wafer had to be flipped, as it would result in the top wafer surface being touched, thus limiting the number of options to compensate for gravity induced deflection. What is more, due to natural shape of wafer warpage, which tends to be mostly symmetrical with respect to X and Y axes of the wafer, the wafer will most likely not rest horizontally, since the supports are not symmetric with respect to X and Y axes. Depending on the measuring principle, this might be a factor that needs addressing when measuring or processing measured data.

Using this method, both 200 mm and 300 mm diameter wafers can be supported with no additional tweaks.

Three-point support on the edge

Like the previous method, the only difference is that the support points are moved further away from the center and the wafer rests on the edge rather than resting on the surface as in the previous method.

Figure 19. Schematic of three-point wafer support on the edge (Natsu, Ito, Kunieda, Naoi, & Iguchi, 2005)

Having the wafer to rest on three points touching the very edge of the wafer, complies with design requirement (described in upcoming chapters), which states that the wafer cannot be touched further away than two millimeters from the edge and thus allowing the wafer to be flipped and supported on the other surface should it be needed.

Supports

Wafer

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To simplify the post processing of measuring data in case the wafer cross-section is scanned, a cutout slit for the beam of the sensor can be added to the support pins if wafer is supported by the edge. Such case is presented in Figure 20. This would result in sensor registering only the values while reading the distance to the wafer and registering no values while outside the range of the wafer. This is only valid, when increments of rotation are chosen in a such way, that once the support is located underneath the sensor, the sensor beam is located within the slot, not above the protruding edges of the support.

Figure 20. Wafer support pin with a slit.

According to W.Natsu et al. (2005), three-point support is better in terms of positioning repeatability and anti-disturbance ability when compared to one-point support (vacuum chuck). Using this method, both 200 mm and 300 mm diameter wafers cannot be supported without additional tweaks. Supporting a 200 mm diameter wafer on the edge would result supports sitting on the surface of 300 mm diameter wafer. In case this support method should be implemented for both type of wafers, support arms, holding the support pins, would have to be made extendable, so in both cases wafer is supported by the edges.

Four-point support on the edge

This method is identical to the three-point support on the edge method, mentioned above, the only difference being added fourth support point and now the supports being spaced symmetrically with respect to X and Y axes of the wafer. While having fourth support might seem counter-intuitive, as only three points are needed to define a plane, and four points would result in over constrained system, in ideal case silicon wafer warpage follows symmetrical shape with respect to X and Y axes of the wafer, the wafer would rest horizontally, as both wafer warpage and the supports would be symmetrical with respect to the X and Y axes of the wafer.

However, the ideal case scenario mentioned is highly unlikely as even the smallest inaccuracies would contribute significantly to inaccurate end results. Even though silicon wafer would deform and comply to the four support points resting stable, this would result in deformed wafer, therefore unreliable warpage measurement results.

Silicon wafer

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Figure 21. Schematic drawing of saddle shaped warped wafer supported on four points on the edge

Like for the three-point support on the edge mentioned above, same additional adjustments would need to be implemented to support wafers of different diameters.

Mechanical edge grip

One of the methods available to grip and securely locate the wafer, commonly used in wafer sorting equipment is mechanical grip. Supporting the wafer in such way does not contaminate nor scratch any of wafer’s surfaces. This method requires at least three supports spaced 120 degrees apart and at least one support to be extendable on longitudinal direction to apply the force and mechanically clamp the edge of the wafer. Schematically, the method is depicted below.

Figure 22. Schematic drawing of mechanical edge grip (top view)

This method requires force being applied to the silicon wafer. As silicon wafer is very thin in comparison to its diameter, even minor forces can cause unwanted deflections of the wafer. While these minor deflections are not that critical when it comes to wafer handling in mentioned wafer

High zone High zone Low zone Low zone Support point Support point Support point Support point Fclamp Silicon wafer Support in clamped position Support in unclamped position Stationary support

Stationary edge supports Retractable edge support

Silicon wafer

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sorting equipment, when measuring the wafer is in interest, deflections due to external forces ideally should be non-existing, so the wafer is in its true shape.

Vertical wafer support

In case gravity induced deflection compensation method (discussed in further chapters) is chosen to be to measuring the wafer vertically, the wafer must be supported accordingly. Horizontally and vertically supported wafers are schematically presented below in Figure 25.

Figure 24. Horizontally and vertically supported wafer (Jansen, 2006)

To support silicon wafer vertically, it should be done by locating the wafer on 2 stationary V-grooves on the bottom of the wafer and gently clamp it to a third support point. Such clamping mechanism is schematically depicted in Figure 25. Even though such clamping method would cause additional deformation on the wafer, it has been observed by Jansen (2006), that

deformations of a 200 mm diameter wafer with a thickness of 0.6 mm can be as low as 0-3 µm.

Figure 25. Schematic drawing of supporting the wafer vertically (Jansen, 2006)

As it is most likely for the wafers to be loaded and unloaded by existing wafer sorting machine, it means that wafers will be handled in a horizontal orientation, eventually meaning that once the wafer is loaded onto the measuring tool, the wafer will have to be rotated 90 degrees to a vertical position. This results in additional tilting mechanism or stage that must be implemented, adding even more complexity to the final design.

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2.5 Warpage measuring

2.5.1 Measuring principle Stationary multi sensor array

One of the least complex methods, requiring no moving actuators, stages or gantries is to place the silicon wafer stationary and have multiple sensors to measure different points of the wafer. Illustration of such principle is presented in Figure 26 below. The XY resolution of measured results is dependent on the number of sensors. Such method is used in E+H instruments mentioned in Chapter 2.2. Some of the instruments have as much as 69 sensors for wafers of 300 mm in diameter. (E+H Metrology GmbH, 2020)

Figure 26. Multiple distance sensors measuring different locations of a surface (Keyence Corporation, 2020)

The benefits of this method are that silicon wafer is measured stationary, meaning no additional vibrations occur and affect the results and that it requires no moving mechanisms to measure the wafer. The downside to it is that the number of sensors limits result resolution. In case dense measuring grid is needed, the number of sensors and peripheral equipment to process sensor data might become unacceptably expensive. Another limiting factor for the XY resolution is the size of the sensor – resolution of measuring grid can be as dense, as densely sensors are mounted next to each other. As an example, if a measuring sensor is a cylinder, 20 mm in diameter, and measures a single point, physical spacing between measured points of two sensors is 20 mm and that is excluding any additional space for hardware required to mount the sensors.

XY scanning

Like the contact measuring probe method, mentioned in Chapter 2.2, a contact probe can be replaced with a contactless measurement sensor and wafer can be measured non-contact way, eliminating, or reducing contamination and wafer damaging related to contact measuring method. XY resolution of the measured grid now is limited by the measuring spot size of the sensor in addition to the mechanical positioning resolution.

This measuring method allows to have a grid of points measured across the surface of the wafer. Depending on the resolution requirements, number of points measured can be easily adjusted for the optimal ratio between the measuring time and XY resolution of the results.

Positioning of the sensor above the wafer can be achieved using cartesian positioning gantry or also a polar coordinate gantry. In case of cartesian gantry, silicon wafer shall remain stationary, whereas the XY gantry is located above the wafer. A cartesian gantry wafer measuring setup was implemented in a research by H.Liu, et.al. (2013) and is presented in Figure 27 below.

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Figure 27. XY stage for wafer warpage measuring (Liu, et al., 2013)

The other option, polar gantry, is a convenient solution, providing more design freedom and better utilization of the space available, since silicon wafer has a circular shape. Instead of having two linear stages, positioning the measuring sensor on X and Y coordinates accordingly, one linear stage is replaced with a rotary stage, thus resulting in positioning the measuring sensor in polar coordinate system. Measuring grid and schematic drawing of such measuring system is presented in Figure 28 below.

Figure 28. Polar coordinate system and schematic drawing of polar measuring system

Having a polar coordinate positioning system, and knowing the coordinate of a linear actuator and rotation angle of a rotary stage, the position of the sensor can be transformed into cartesian coordinates with a following relation:

{𝑥 = 𝑟 cos 𝜃_{𝑦 = 𝑟 sin 𝜃} (1)

where x, y – cartesian coordinates of the sensor, r – position of a linear stage, 𝜃 – angular position of the rotary stage.

Using either of the methods to measure the wafer warpage would result in a point grid with height values. Knowing X and Y coordinates, data fitting could be performed to get more dense height map of the wafer in case measured grid is too sparse. Measurement grid can be plotted, and the visual representation of measurement results can be expected to be as below in Figure 29.

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Figure 29. Height measurement grid (ASML, 2020)

Line scanning

Same hardware setup as mentioned in the paragraph above allows for a slightly different execution of measuring the wafer – section scanning. Instead of creating XY grid of measured points, the wafer is scanned across a straight line through its center, and then another line across the wafer is measured, rotated by defined angle around the center point of the wafer. Measuring method is depicted below in Figure 30.

Figure 30. Wafer line scanning principle (Kobelco, 2020)

The resolution of measurement results using this method would be the same as using the XY scanning method described in previous paragraph. Using the line scanning method, however, the line scan is performed in one continuous movement in a single direction, in comparison to multiple bi-directional steps when the grid is scanned. Using a single continuous movement minimizes the influence on backlash of the mechanical components in the gantries improving the accuracy and repeatability of the results.

Alternatively, instead of scanning a straight line and then rotating the wafer by an increment, it is possible to perform a scan while rotating the wafer at fixed linear position and then moving the sensor by an increment on the linear direction. This would result in multiple concentric circles measured going from outside towards the center of the wafer. This method gives no advantage, it might be more convenient to have measured data in that circular order for ease of post-processing. Measured cross sections can be plotted in polar coordinates, resulting in 3D height map of the wafer.

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Edge scanning

The last method to be discussed is measuring the edge height of the wafer around the circumference. This can be done either having a distance sensor mounted on XY positioning gantry, as mentioned in previous paragraphs, yet using such measuring method on XY positioning gantry would be inefficient, or using dedicated edge measuring sensor, while rotating the wafer around its center point. While the latter method is commonly used for inspection of wafer edges, detecting cracks and chipped edges, the height variation of the edge can be measured as well. Measuring method is schematically depicted below in Figure 31.

This method requires only a rotary stage with a vacuum chuck wafer support and a single sensor while providing detailed height measurements around the edge. The downside to this method is that using such setup, a major part of the wafer is not measured. By placing the sensor to a known position in relation to the vacuum chuck, the height of center part, that is clamped by the vacuum chuck can be known in addition to the height of the wafer’s edge. The situation is schematically depicted below from the top view, where the blue zone represents known or measured area, whereas the orange color shows the unmeasured or unknown area. Wafer diameter depicted is 300 mm, diameter of the vacuum chuck is 50 mm and measured area around the edge is 20 mm wide, as the measuring range is taken from product’s catalog by BRS-Bright Red Systems GmbH (BRS - Bright Red Systems GmbH, 2020).

2.5.2 Measuring sensor

There are multiple ways of measuring silicon wafer warpage depending on the accuracy and resolution needed. Majority of commercially available tools, some of them mentioned in Chapter 2.2, use highly expensive optical interferometers, that are unmatched in terms of accuracy and resolution. For this project, considering the accuracy requirements, that are roughly an order of magnitude lower, compared to commercially available equipment, interferometers were omitted, and more conventional measuring tools and methods were evaluated.

Warped wafer Rotary stage Edge measuring sensor Warped wafer Edge measuring sensor Vacuum chuck Measured edge height Unmeasured area

Figure 31. Schematic drawing of wafer edge scanning

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According to definition of the term warpage in Chapter 2.3, warpage is defined as a difference between minimum and maximum deviation of a mid-plane points from a reference plane, parallel to the wafer. To measure true wafer warpage, mid plane of the wafer must be precisely known and therefore wafer’s thickness would need to be measured, for the thickness variation of the wafer not to affect the result accuracy.

In scope of this project, according to design requirement specification, requirement P.4 (stated in upcoming chapters), the results of measured warpage must be within ±10 µm of actual warpage. According to the document with a list of wafers used within the company provided by the company itself, it can be observed that all 300 mm wafers come with TTV from 0 to 0.6 µm and wafer’s center thickness within ±3 µm. This indicates, that even without measuring wafer’s thickness and calculating the real distance to the median plane, but only by measuring the distance to wafer’s surface, as long as the measuring sensor’s accuracy is within a range of ±6.4 µm, the performance requirement is still met, and the necessity of measuring wafer’s thickness can be abandoned. As stated by the product requirement specification in further chapters, requirement P.3, the measurable warpage must be ±1 mm, meaning the sensor must have a measuring range of at least two millimeters in an ideal case scenario.

While there are no hard requirements on XY resolution of the measurements, the measuring spot size of the sensor might be one of the factors limiting the XY resolution. Depending on the type of sensor, for measuring range of at least 2 mm and resolution of ±10 µm, measuring spot size could vary from approximately 5 mm all the way down to 3 µm (Micro-Epsilon, 2020).

A several sensors to measure wafer warpage are covered in more detail below. Capacitive displacement sensors

Capacitive proximity sensors are non-contact measuring devices, capable of high-resolution (up to nanometer level) distance and thickness measurements. Working principle of capacitive sensor is based on change of capacity between electrodes of the sensor when the distance between the measured object and the sensor changes. Fairly simple construction of the sensor provides high-accuracy measurements for relatively low price. The downside to capacitive sensors is relatively large measuring spot size, meaning capacitive sensor is not well suited for measuring the warpage by scanning the wafer with a single sensor for a high-resolution measuring grid and therefore well suited for a stationary multi sensor array measuring.

For the criteria mentioned above, a suitable capacitive displacement sensor for measuring wafer warpage can be found with following performance specifications:

Table 4. CSH2-CAm1,4 performance specification

Sensor code, manufacturer CSH2-CAm1,4, Micro-Epsilon

Measuring range, mm 2

Extended measuring range, mm 4

Linearity, µm ±0,5

Resolution, nm 1,5

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Confocal distance sensors

Confocal sensors optical distance measuring sensors based on reflected light principle. Polychromatic white light is focused onto target surface by a multiple lens system, that are arranged in a such way, that white light is dispersed into multiple color light. Depending on the distance to the measuring target, one specific wavelength is focused on the target and it is being reflected to a light sensitive sensor element. Depending on the color, thus wavelength, of the color reflected to the light sensitive sensor element, the distance to a target object is determined.

Confocal sensors are capable of measuring thickness of transparent objects using a single sensor; therefore, the thickness of a silicon wafer can be measured at any point as well, increasing the measuring accuracy by eliminating the wafer thickness error.

Figure 33. Confocal sensor working principle (Micro-Epsilon, 2020)

While confocal distance sensors are highly compact, accurate and versatile, they are significantly more expensive than the rest. Confocal sensors typically have a measuring spot size within the range ≥ 60µm, going down all the way even to 3 µm. Such small measuring spot size makes these sensors ideal for measuring the warpage by scanning the wafer using a single sensor. Using such sensor, the XY measuring resolution is more likely to be limited by positioning accuracy of the positioning mechanism rather than the sensor itself.

A confocal sensor, matching criteria mentioned above can be found with such performance specifications:

Table 5. IFS2405-3 performance specification

Sensor code, manufacturer IFS2405-3, Micro-Epsilon

Linearity (distance), µm ±0,75

Linearity (thickness), µm ±1,5

Resolution, nm 36

Active measuring area (spot size), µm 9

While searching for a suitable measuring sensor, an existing confocal sensor was found at the premises of the company. Even though the sensor is a relatively old one and is no longer produced by the manufacturer, the performance specifications of the sensor match the ones needed for the purpose. The specifications of the existing sensor can be found in the table below:

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Table 6. IFS2401-3 performance specification

Sensor code, manufacturer IFS2401-3, Micro-Epsilon

Resolution, nm 120

Active measuring area (spot size), µm 25 Laser displacement sensors

Laser displacement sensors typically use a laser light source and a CMOS (Complementary metal– oxide–semiconductor) detector. The light beam is projected through a lens to a target object, then it is reflected from the surface and through another lens is focused to a CMOS detector. Depending on the change of the distance to a measured object, the angle between projected and reflected beam will change and that change is registered by the CMOS detector which translates the reflection angle into distance. Working principle of laser triangulation sensor can be found in Figure 34. below:

Figure 34. Laser triangulation sensor schematic and working principle (MTI Instruments Inc, 2019)

Like confocal sensors, laser triangulation sensors also tend to have small measuring spot size, making them ideally suited for scanning the wafer with a single sensor. Suitable laser triangulation sensor can be found with the following performance specification:

Table 7. ILD1750-2 performance specification

Sensor code, manufacturer ILD1750-2, Micro-Epsilon

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2.6 Gravity induced deflection

Since silicon wafers have a large diameter over thickness ratio, wafers sag and deform significantly when placed onto supports in comparison to the magnitude of wafer warpage. Gravity induced deflection could be in order of tens of micrometers for a 200 mm diameter wafer all the way over 100 micrometers for a 300 mm diameter wafer according to Jansen (2006). As only the deformation due to warpage is in interest, all the other causes of deformation must be eliminated or reduced to a minimum, one of them being the weight of the wafer.

Figure 35 below illustrates the principle of eliminating gravity induced deflection. In the figure, wafer is depicted supported by a single chuck, however, the principle stands for three-point support as well. When wafer is horizontally resting on three support points, total deflection of the wafer (y(x,y)) is superposed of deflection of the true shape of the wafer (s(x,y)) and also deflection due to gravity (g(x,y)).

Figure 35. Schematic principle of wafer deflection due to gravity (Natsu, Ito, Kunieda, Naoi, & Iguchi, 2005)

There are several methods of how gravity induced deflection could be minimized, each having pros and cons compared to each other.

Measuring the wafer vertically

By placing silicon wafer vertically and freely supporting it, the wafer becomes substantially more rigid and does not sag as if it was placed horizontally. Vertical wafer measurement is used in commercial, high precision wafer inspection tools. It should yield the most accurate results out of all methods proposed. However, such method is the most complex out of all, due to the reasons mentioned in vertical wafer support section above.

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Inverting the wafer

This method is one of the most used methods amongst researchers and it is also the one used in current way of measuring wafer warpage. What is more, using such method allows geometric error of measuring equipment to be eliminated as the wafer would be measured twice, i.e., front, and back surfaces. When the top surface of the wafer is measured, total deflection of the wafer can be expressed as follows:

𝑦_𝑓(𝑥, 𝑦) = 𝑔𝑓(𝑥, 𝑦) + 𝑠𝑓(𝑥, 𝑦) (2)

where according to Figure 35, y(x, y), g(x, y) and s(x, y) are total deflection, deflection due to gravity and deflection of the wafer true shape accordingly, index t meaning top surface of the wafer.

Similarly, the wafer is inverted and now the bottom surface is measured the same way and the deflection of the bottom surface can be expressed the same way as for top surface:

𝑦_𝑏(𝑥, 𝑦) = 𝑔𝑏(𝑥, 𝑦) − 𝑠𝑏(𝑥, 𝑦) (3)

where index b represents the bottom surface.

As the thickness deviation of the wafer is significantly smaller than the total deformation of the wafer, it is assumed that deformation of the true wafer shape is the same for top and bottom measurements:

𝑠_𝑓(𝑥, 𝑦) = 𝑠𝑏(𝑥, 𝑦) = 𝑠(𝑥, 𝑦) (4)

It is also assumed, that gravity induced deflection is the same for measured top and bottom surfaces, therefore expressed:

𝑔_𝑓(𝑥, 𝑦) = 𝑔𝑏(𝑥, 𝑦) = 𝑔(𝑥, 𝑦) (5)

Subtracting two measurements at corresponding points yields the result of wafer warpage, which can be expressed:

𝑠(𝑥, 𝑦) =𝑦𝑓(𝑥, 𝑦) − 𝑦𝑏(𝑥, 𝑦)

2 (6)

Gravity induced deflection can be acquired using the following equation:

𝑔(𝑥, 𝑦) =𝑦𝑓(𝑥, 𝑦) + 𝑦𝑏(𝑥, 𝑦)

2 (7)

Equations and description acquired from W.Natsu et al. (2005)

Implementing this method for minimizing the effect of gravity induced deflection requires no additional hardware in case existing wafer sorting apparatus is implemented to manipulate the wafers, as the apparatus has wafer flipping mechanism within itself already. After top surface of the wafer is measured the data is stored. The operator would use the wafer sorting apparatus to pick up the wafer from the tool, flip it, align the notch for precise grip and accurate placement, and put the flipped wafer back to the measuring tool. It is worth mentioning, that once the wafer is measured, in case it was rotated, it should be moved back to its initial position, then flipped and

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loaded back. All the actions are executed automatically, therefore the accuracy of wafer alignment and positioning is limited by performance of the wafer sorting apparatus, should it be used. As finding information on existing wafer sorting apparatus was complicated, alternative industrial solutions are found to be positioning the wafer within accuracy of ± 0.1 – 0.3 mm as well as rotary aligning the wafer within ± 0.1 – 0.3°, depending on the model (Jel Corporation, 2020). The performance of wafer sorting apparatus at the company’s premises is expected to match or even outperform similar equipment with mentioned positioning and alignment accuracies, therefore the positioning and alignment accuracy of the existing wafer sorting apparatus will be considered to be the same. After surface of flipped wafer is scanned and data is stored, a calculation script would be run where the data is stored to align corresponding measured points and perform the calculations as described above. This method, however, is not possible if the measured wafer is supported on a vacuum chuck or three-point support closer to the center, since if the wafer is flipped, wafer’s top surface would be scratched and damaged while there is a “need” requirement, that wafer must not be touched on the top surface.

Limitations of such method are that there are several assumptions made during the calculations described above. For very accurate results, these assumptions should be replaced by actual and weighted numbers, such as wafer thickness variation. Additionally, slope of wafer placement, deflection due to stress of surface treatments should be considered. It is also assumed that stiffness is linear throughout the warpage range, and that is something that should be investigated in more detail for more accurate results.

Subtracting the sag of a flat silicon wafer

Another method to compensate for gravity induced deflection is to measure the sag of a flat silicon wafer that comes with warpage ≤ 5.00 µm according to the documentation provided by the company. After the top surface of a test wafer specimen is measured, for each corresponding point of the measured wafer, sag value of corresponding point of flat silicon wafer, would be subtracted, resulting in warpage of a free form wafer. This method, however, while requiring least effort and no additional hardware is most likely to provide least accurate results as in this case it is assumed, that the gravity induced deflection of a flat and warped wafer would be the same, even though with higher amount of warpage on the wafer, the stiffness will change accordingly therefore gravitational sag will change as well. The accuracy of this method could be easily tested and compared to other methods once the prototype is assembled.

Subtracting FEA calculated sag

Last of the methods proposed to compensate for gravity induced deflection once more consists of subtracting known sag value on corresponding measured points. Using this method, a FEA must be performed to get gravitational sag values, which are then subtracted from measured deflection of the wafer surface. This method requires no additional hardware mechanisms, only accurate results of FEA. The downside of this method would be that result is dependent of quality of FEA. Many factors contribute to the accuracy of the simulation results, one of which being mechanical properties of the silicon wafer. Silicon wafer has orthotropic structure which results in different material properties, depending on the orientation of the wafer, such as Young’s modulus, Poisson’s ratio and similar. Multiple sources provide different values of mentioned properties. Depending on the loading type and orientation of the crystalline structure of the wafer, Young’s modulus can vary all the way from 130 GPa to 169 GPa (Hopcroft, Nix, & Kenny, 2010). What is more, while measuring the wafer with gravitational sag, the true shape of the wafer is unknown and therefore FEA might be inaccurate, as gravitational sag would be different for a flat wafer, bowl or saddle warped wafers. As mentioned, such method requires no additional hardware mechanisms,

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therefore if accurate FEA is performed, the results could be relatively easy compared to other proposed methods.

All the proposed methods, expect measuring the wafer vertically, can be implemented without additional hardware if wafer sorting apparatus is used for handling the wafers and the results can be compared, leaving options for improvements.

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3 IMPLEMENTATION

In this chapter the process leading to generated concepts is defined, including identifying the main functions of the product, defining product requirement specification, and describing potential solutions for executing the functions and therefore ensuring requirement criteria is met.

3.1 Functional breakdown

The first step in product implementation stage was to break down the intended functionality of the product into sub-functions so the means to execute the functions could be found and developed. The resulting function breakdown tree is presented in Figure 37. Resulting sub-functions were used for product requirement specification in the upcoming stage of the project.

The functionality of the tool was divided into 3 categories: wafer handling, wafer measuring and data acquisition, interpreting and result display.

Wafer warpage measuring tool

1. Wafer handling 2. Wafer measuring 3. Data acquisition, analysis _{and result display}

2.1 Measure the wafer warpage 2.2 Compensate gravity

induced deflection

3.1 Process raw sensor data

3.2 Display results 1.1 Provide interface for loading

specimen

1.2 Pick up the test wafer

1.4 Load the wafer 1.3 Orient/align the wafer

1.5 Support/fix the wafer

1.6 Unload the wafer

1.7 Prevent contamination of the test specimen

Figure 37. Functional breakdown of the warpage measuring tool

3.2 Product requirement specification

Since the project was initiated by the company to design and manufacture a functional prototype so it can contribute to and enhance system testing and verification workflow, several employees and stakeholders were invited to participate in finalizing design requirement specification that the final product must meet. The criteria of the most critical requirements were identified as a need whereas additional features, that would benefit the user, but are not critical, were identified as a want. The full product requirement specification can be seen in Table 8 below.

Development of an off-line silicon wafer warpage measuring tool Linas Čapas