• No results found

Ultra-Low Power Electronics Using Floating-Gate Transistors Bengt Oelmann

N/A
N/A
Protected

Academic year: 2021

Share "Ultra-Low Power Electronics Using Floating-Gate Transistors Bengt Oelmann"

Copied!
1
0
0

Loading.... (view fulltext now)

Full text

(1)

UV-source (500W)

HP4142B

Lens system and shutter

Device for programming (Inside the box)

Computer (PC) Cooling fans

Ultra-Low Power Electronics Using Floating-Gate Transistors

Bengt Oelmann

P ROJECT D ESCRIPTION

The goal of this project is to develop techniques and methods for floating-gate circuits that allow the same degree of design automation as digital standard-cell design does today but resulting in circuits with three to four orders of magnitude lower energy consumption.

I NTRODUCTION

In recent years there has been a growing interest in research in digital design for ultra-low power consumption. Here the figure of merit is basically only the power consumption and the speed requirements are low or very low. Self-contained systems with own power supply where the energy resources must sustain for their entire lifetime need ultra-low power circuits.

By using floating-gate transistors operating in sub- threshold mode, large reductions in energy consumption can be achieved.

UV-P ROGRAMMABLE

F LOATING -G ATES

In this project we are working with floating-gate circuits manufactured in a standard CMOS technology.

The voltages on the floating-gates are controlled by a post-fabrication process that is called “programming”.

The main motives for using floating-gates are:

• Enables compact implementations of logic gates using Linear-Threshold Elements

• Sub-threshold operation is facilitated by a post- fabrication step for cancellation of processes variations

The post-fabrication step:

• For programming, UV-light is used for activation of electrical paths to the floating- gates

• Programming enables post-fabrication tuning of threshold voltage of the floating-gate transistor

L INEAR T HRESHOLD E LEMENTS

P ROGRAMMING AND

C HARACTERIZATION S ITE

Mid-Sweden University, Dept. of Information Technology and Media, Electronics Design Division

Input capacitors Vp1 … Vp5

Input capacitors Vn1 … Vn5

PMOS (20/0.8) donut shape

NMOS (20/0.8) donut shape

References

Related documents

The combined mass of reaction wheel and DC motor is to the left side of the figure and the combined mass of stepper motors, 2 batteries, dead weights and supporting structure is to

methods for floating- gate circuits that allow the same degree of design automation as digital standard-cell design does today but resulting in circuits with

– Event-driven designs using asynchronous circuits – Dynamic power management for controller design – Construction of VLCs and their CODECs.. – Circuit design for

The MOS-transistor gate terminal voltage (V FG ) is during programming set to an offset value. By offsetting the floating gate, the control gate is experiencing a shift in the

– Design model for partitioned FSMs based on mixed synchronous/asynchronous state memory.. – Comparative study of low-voltage performance of standard-cell

Rätt till heltid skall också öka jämställdheten genom att män ska ta mer ansvar för hemmet då kvinnorna också arbetar heltid. Arbetsgivarna är de som har ansvar att rätta

We conduct large-scale cellular trace-driven experiments com- paring different opportunistic network coded data dissemi- nation strategies and different cache seeding strategies