ZigBee Data Depackager
Group members: Cheng Peng and Patrice Umenne
Supervisor: Bengt Oelmann
Introduction
ZigBee is a new wireless protocol that works well in
sensors, remote monitoring and portable electronics
Uses a low data rate of 250 kbps
Long battery life due to low data rate
Introduction
Protocol overview
The four main frames used for
communication in the IEEE 802.15.4 standard are:
Beacon Frame
Acknowledgement Frame
MAC Command Frame
Data Frame
Beacon Frame
Acknowledgment Frame
MAC Command Frame
Data Frame
System Structure
Overall Block
Acknowledge Request
RTR RTS
ZigBee Data Depackager Baseband
Decoder
Microprocessor
8 bits address
8 bits data
8 bits data
Y
State flow diagram
C2 C1 C
B A
N N
Y
crc_reg_initialize =1, counter1_rst = 1, counter1_en = 1 r_w = 1
counter1_en = 1, r_w = 1, comparator1_en = 1
counter1_en = 1, comparator1_en = 1, rtr = 1, counter1_trigg = 1, r_w = 1 rts =
1 ?
comparator1_output = 1?
counter1_en = 1, comparator1_en = 1, r_w = 1
counter1_en = 1, comparator1_en = 1, r_w = 1
Asynchronous reset Counter1, CRC
initialized
RTS Ready to Send Signal Tested for incoming data Counter 1
incremented in loop until sixth byte
Sixth byte is frame
length
State flow diagram
D
N Y
Y
N F
E
Y
counter2_en = 1, counter2_trigg = 1, crc_reg_en = 1, rtr = 1, r_w =1 rts = 1?
E2
E1 counter2_en = 1, crc_reg_en = 1, crc_reg_trigg = 0, r_w=1
counter2_en = 1, crc_reg_en = 1, crc_reg_trigg = 1
counter2_output = 0?
rts = 1?
D1 multiplexer_select_address = 01, counter2_en = 1, counter2_initialize = 1, r_w = 0 multiplexer_select_address = 01, address_loc = 10000000, r_w = 1
r_w = 1, crc_reg_en = 1, counter2_en = 1
Frame length Byte written to address 128 Counter2 initialized with Frame value RTS signal tested
Counter2 decremented in loop to address the RAM on Every new byte
Each byte written to RAM
Each Byte enters CRC Counter2 Tested to have addressed ”0”
Location
G
H
I2 I1 H1
H2
I
State flow diagram
r_w=1, multiplexer_select_data =01, address_loc=10000010, multiplexer_select__address =01
r_w=1, multiplexer_select_data =10, address_loc=10000001, multiplexer_select__address =01
multiplexer_select_data =10, address_loc=10000001, multiplexer_select__address =01
r_w=1, latch_out_h=1, multiplexer_select_data =01, address_loc=10000010, multiplexer_select__address =01
r_w = 1, latch_out_l = 1, multiplexer_select_data = 10, address_loc = 10000001, multiplexer_select__address = 01
multiplexer_select_data =01, address_loc=10000010, r_w= 1, crc_reg_en = 1, latch_in_h = 1, latch_in_l = 1
CRC Checksum
Low Byte Written to RAM location 129
CRC High Byte
written to location
130
Y
State flow diagram
N N
Y
multiplexer_select__address =10, r_w=1
request = 1?
r_w=1, multiplexer_select__address =10, ack=1
exam_microprocessor = 0?
Microprocessor
sends request which is tested
Acknowledgement to read reply
Continous read cycle
until unique address
to status register
informs controller to
exit read cycle to First
state
Testbench Simulation Wave
Diagrams
Testbench Simulation
Testbench Sim
Testbench Sim
Testbench Sim
System Verification
Input data Output data
10001101 00000101
01100101 Address Data
11100001 10000010 00101010 ← CRC high byte 00111010 10000001 00010111 ← CRC low byte frame length → 00000101 10000000 00000101 ← frame length
11001111 00000100 11001111 10011011 00000011 10011011 00001110 00000010 00001110 11100111 00000001 11100111 10111001 00000000 10111001
CRC Verification
Input data Output data
10001101 00000101
01100101 Address Data
11100001 10000010 00000000 ← CRC high byte 00111010 10000001 00000000 ← CRC low byte frame length → 00000111 10000000 00000111 ← frame length
11001111 00000110 11001111 10011011 00000101 10011011 00001110 00000100 00001110 11100111 00000011 11100111 10111001 00000010 10111001 app. high byte → 00101010 00000001 00101010 app. low byte → 00010111 00000000 00010111
