Department of Science and Technology Institutionen för teknik och naturvetenskap
LiU-ITN-TEK-A--19/010--SE
Design and Implementation of a
Multipurpose Radar Sensor
Johan Niklasson
Axel Åström
LiU-ITN-TEK-A--19/010--SE
Design and Implementation of a
Multipurpose Radar Sensor
Examensarbete utfört i Elektroteknik
vid Tekniska högskolan vid
Linköpings universitet
Johan Niklasson
Axel Åström
Handledare Adriana Serban
Examinator Qin-Zhong Ye
Upphovsrätt
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http://www.ep.liu.se/Abstract
This thesis presents the design and implementation of a multifunctional radar sensor. Utilising microstrip transmission line technology, a front-end receiver has been designed based upon a six-port architecture. Additionally, digital signal processing has been implemented on a microcontroller, enabling pro-cessing and extraction of information from the down converted quadrature signals.
Results have show that the sensor is capable of operating as both a contin-uous wave radar and frequency modulated contincontin-uous wave radar. Through measurements, it has been established that the sensor is capable of wireless measurements, such as vital signs and vibrations. Furthermore, a graphical user interface has been design, allowing a way of switching between differ-ent radar configurations and the presdiffer-entation of measured data to the user. Finally, the resulting sensor has been analysed and future work has been presented.
Acknowledgements
We would like to thank Adriana Serban, Qin Zhoung-Ye, Kjell Karlsson, Magnus Karlsson and Gustav Knutsson at the Department of science and technology at Link¨oping University not only for helping us and providing us with equipment but also for their valued guidance. Furthermore, we would like to thank Devport AB and Andreas Forsberg for presenting us with the opportunity to work on this thesis.
List of Abbreviations
ADC Analog Digital Converter ADS Advanced Design System AoA Angle of Arrival
BLC Branch Line Coupler
CMSIS Cortex Microcontroller Software Interface Standard
CW Continious Wave
DAC Digital Analog Converter
DC Direct Current
DMA Direct Memory Acess
DoA Direction of Arrival DSP Digital Signal Processor FFT Fast Fourier Transform
FMCW Frequency Modulated Continuous Wave FPU Floating Point Unit
GPIO General Purpose Input Output HAL Hardware Abstraction Layer
LO Local Oscillator
LUT Lookup Table
PCB Printed Circuit Board
RF Radio Frequency
Contents
1 Introduction 1 1.1 Purpose . . . 1 1.1.1 Problem Statement . . . 2 1.1.2 Delimitation . . . 2 1.2 Outline . . . 2 1.3 Method . . . 3 2 Radars 5 2.1 Introduction . . . 5 2.2 Radar Concept . . . 6 2.2.1 Radar Equation . . . 7 2.3 Radar Types . . . 82.3.1 Continuous Wave Radars . . . 8
2.3.2 Frequency Modulated Continuous Wave Radars . . . . 10
2.3.3 Pulse Radars . . . 12
2.4 Radar Systems . . . 13
2.5 The Six-Port Radar . . . 13
2.5.1 Branch Line Coupler . . . 14
2.5.2 Wilkinson Power Divider . . . 15
2.5.3 Diode-Based Power Detector . . . 16
2.6 The Six-Port Receiver . . . 17
2.6.1 Antennas . . . 19
3 Front-End Receiver Design 23 3.1 The Proposed Radar System . . . 23
3.2 Branch Line Coupler . . . 24
3.3 Wilkinson Power Divider Design . . . 26
3.4 Six-Port Circuit Design . . . 27
3.5 Power Detector Design . . . 28
3.6 Six-Port Network Radar Simulations . . . 30
3.7.1 Transmitting Antenna . . . 35
3.7.2 Receiving Antenna . . . 35
3.8 RF Front-End . . . 37
3.9 Interconnection Board . . . 38
4 Digital Signal Processing 41 4.1 The Microcontroller . . . 41
4.2 Analog to Digital Conversion . . . 42
4.3 Calculation of Arc-tangent . . . 43
4.4 Fourier Transform . . . 43
4.4.1 Frequency Resolution . . . 44
4.5 Communication and Visualisation . . . 44
4.6 Digital to Analog Conversion . . . 46
4.7 Toggling Radar Configuration . . . 48
5 Results 49 5.1 The Resulting System . . . 49
5.1.1 Interconnection . . . 50
5.1.2 The GUI . . . 50
5.2 Continuous Wave Radar . . . 51
5.2.1 Doppler Radar . . . 51
5.2.2 Direction-of-Arrival Radar . . . 54
5.3 Frequency Modulated Continuous Wave Radar . . . 55
6 Discussion 57 6.1 Doppler Radar . . . 57
6.2 Direction-of-Arrival . . . 58
6.3 Frequency Modulated Continuous Wave Radar . . . 58
6.4 Digital Signal Processing . . . 58
6.5 Future Work . . . 59
7 Conclusion 61
Bibliography 65
List of Figures
2.1 Basic block diagram of a radar system . . . 6
2.2 Radar concept . . . 6
2.3 Receiver architectures . . . 7
2.4 Quadrature demodulation . . . 7
2.5 Doppler radar working principle . . . 9
2.6 DoA working principle . . . 9
2.7 Sawtooth wave modulation . . . 10
2.8 FMCW principle with triangle wave modulation . . . 11
2.9 Pulse radar system and timing diagram . . . 12
2.10 Six-port correlator . . . 14
2.11 Branch line coupler . . . 14
2.12 The Wilkinson power divider . . . 15
2.13 V-I characteristics of a Schottky diode . . . 16
2.14 Six-port network . . . 18
2.15 Microstrip patch antenna . . . 20
3.1 Proposed radar system . . . 23
3.2 Branch Line Coupler in ADS . . . 25
3.3 BLC, S-parameter simulation results . . . 25
3.4 Wilkinson Power Divider in ADS . . . 26
3.5 WPD, S-parameter simulation results . . . 26
3.6 Six-port in ADS . . . 27
3.7 Six-port network, S-parameter simulation results . . . 28
3.8 Model for SOT23 diode package . . . 28
3.9 Power detector schematic . . . 29
3.10 Power detector layout symbol on schematic with components . 30 3.11 Matched power detector, S-parameter simulation . . . 31
3.12 Simulated results of diode operation range, logarithmic scale . 31 3.13 Doppler radar target model . . . 32
3.14 Simulation of Doppler radar . . . 32
3.16 Far-field simulation of transmitting antenna array . . . 33
3.17 Simulation of tx antenna array . . . 34
3.18 Far-field simulation of receiving antenna . . . 35
3.19 Simulation of rx antenna . . . 36
3.20 RF front-end layout . . . 37
3.21 Interconnection board layout . . . 38
4.1 Function for calculation of Arc-tangent . . . 43
4.2 Sample code of the FFT and complex magnitude . . . 44
4.3 Microcontroller flow chart . . . 45
4.4 GUI flow chart . . . 46
4.5 For loop generating LUT . . . 47
5.1 Radar sensor with the displayed GUI . . . 49
5.2 Disassembled radar sensor. Shown are microcontroller in the bottom left, interconnection board in the bottom right and radar front-end in the top. . . 50
5.3 The radar graphical user interface . . . 50
5.4 Frequency spectrum of the transmitted CW . . . 51
5.5 DC-motor vibration test setup . . . 51
5.6 Measurements of a DC-motor vibrations . . . 52
5.7 Measurements of vibrations in DC-motor with gearbox . . . . 53
5.8 Measured vital sign signals . . . 53
5.9 DoA test setup . . . 54
5.10 DoA radar baseband signals . . . 55
List of Tables
3.1 Properties of Rogers4350B . . . 24
3.2 Diode model parameters of SMS7621 . . . 29
3.3 Tx antenna dimensions . . . 33
1 Introduction
Radar is the oldest application of microwave technology. Heinrich Hertz, a German professor of physics carried out experiments in 1880s validating the electromagnetic theory presented by James Clerk Maxwell [1]. The radar technology did not become frequent until the 1930s when the possibility to de-tect aircrafts gained military interest [2]. Since then the technology has been further developed for civilian, medical and industrial applications. Usage of radar are, but not limited to, angle detection through direction-of-arrival [3], vital sign measurements [4, 5], vibrations in industrial machinery [6] and range measurement [7]. Optical techniques such as laser are frequently used in a multitude of measurement applications due to their superior spacial resolution. These are however, not without drawbacks and may not func-tion in low visibility environments and may demand maintenance such as cleaning of lenses and mirrors [8]. The advantage of radar is the ability to penetrate dielectric materials and thus not being susceptible to low visibil-ity environments. Additionally, advances in manufacture of high frequency printed circuit board (PCB) has driven down the cost of radar systems. There are a multitude of approaches when designing a radar system. One approach is using a six-port interferometer. The six-port interferometer is a passive microwave circuit enabling RF demodulation to baseband through wave interference. Using six-port based receiving architecture enables cheap, low complexity sensor without the need of active mixers [9].
1.1
Purpose
The thesis will present a radar sensor design combining multiple types of radar on a single PCB. Basing the design on six-port architecture, the viabil-ity of combining continuous wave (CW) and frequency modulated continuous wave (FMCW) radar on the same sensor will be evaluated. Experiments will be conducted to verify the functionality and performance of the sensor.
1.1.1
Problem Statement
Through analysis of the results, this thesis aims at drawing a conclusion that will answer the following questions:
• Is it possible to design a radar front-end that supports multiple radar applications?
• Through digital signal processing, can information be extracted from received signals regardless of the radar type?
• Is it possible to control the sensor using an external computer?
1.1.2
Delimitation
Due to the limitations in the available manufacturing process and measure-ment equipmeasure-ment, the frequency of the radar sensor is limited to 5.8 GHz. Furthermore, the monetary cost of the project will not be taken in to con-sideration.
1.2
Outline
This report will describe the work and procedure performed by the authors during this master thesis.
The Introduction provides the reader with a basic understanding of the work in terms of purpose, method, delimitation and goal.
The Radar chapter presents history and theory about radar. Different radar types and radar applications are also introduced. Furthermore, the six-port circuit and how it can be implemented in radar applications are presented. The chapter The Front-End Receiver presents the design process of the radar. This includes schematic, simulations on schematic, generation of EM layout components and finally EM simulations on the layout components.
The chapter Digital Signal Processing presents the implemented digital sig-nal processing. This includes the presentation of the microcontroller, the libraries used and the design of the graphical user interface.
The Results presents the tests and experiments performed with the sensor and presents the results.
The Discussion chapter contains an analysis of each of the radar sensor and a discussion about the results gathered from the different experiments. The chapter also includes a future work section, which discusses how the radar can be improved.
The chapter Conclusion summarises the master thesis and answers the ques-tions formulated in the problem statement.
1.3
Method
The starting point of this thesis will be a pre-study of radar solutions that is based on six-port architecture. With this theoretical framework, the radar front-end will be designed. The radar front-end will be manufactured in the Printed Circuit Board Laboratory at Campus Norrk¨oping, Link¨oping Uni-versity. Once the radar front-end is complete the work will continue on with digital signal processing. The signals from the front-end will be sampled us-ing analog to digital conversion and analysed usus-ing a microprocessor. Finally, sensor data will be presented in a GUI.
2 Radars
This chapter introduces the concept of radars, radar equation and different types of radars. Thereafter, the core components of the radar systems are presented, giving a systemic overview. Following, the six-port correlator and power detectors will be described in theory and as the core components in the radar system. Finally, the proposed complete radar system is presented and described as a multi-functional, flexible device. The proposed system should measure range, target direction and small-signal detection such as vibrations or vital signs detection. The required digital signal processing is also described in its flow from raw signal digitisation to the calculations of the required radar data.
2.1
Introduction
The basic idea of radar originate from the late 1880’s when the German physicist Heinrich Hertz conducted experiments on electromagnetic (EM) radiation [2]. These experiments were conducted to verify the theory re-garding electromagnetic (EM) waves, as described by the Scottish physicist James Clerk Maxwell. Maxwell formulated the theory in the year 1864 and he believed that both light and radio waves obey the same fundamental laws. Maxwell’s and Hertz work led to the conclusion that both light and radio waves have the property of being reflected from metallic objects and refracted by a dielectric medium. The results of experiments proving this theory was used in year 1904 when a German engineer Christian H¨ulsmeyer saw the potential of detecting obstacles. Even though H¨ulsmeyer invention was working as intended there was little to none interest in investing in this technology at the time [2]. When the World War II burst out in Europe, the military saw an interest in being able to detect enemy aircrafts using radar technology. The use of radar has since been further developed and applications for radar in modern society has increased.
Figure 2.1: Basic block diagram of a radar system
(a) (b)
Figure 2.2: Radar concept. (a) Monostatic. (b) Bistatic [1]
2.2
Radar Concept
The way radar operates is similar to how sound reflections work. If a sound wave is transmitted towards an object that reflects sound, an echo will be heard. Radar operates by transmitting EM waves instead of sound waves and the reflected wave, also called echo, may be used to determine distance, speed or direction of a object. A conceptual block diagram of a radar system is shown in Figure 2.1. An EM wave is transmitted towards a target. This can either be a pulse or a continuous wave. The transmitted signal is reflected by the target and the backscattered wave is then received by the radar. Once the signal is received, it is analysed and compared to the transmitted signal. A monostatic radar system uses one antenna for both transmitting and re-ceiving and a bistatic radar uses separate antennas as seen in Figure 2.2.
(a) (b)
Figure 2.3: Receiver architectures. (a) Homodyne. (b) Heterodyne
Figure 2.4: Quadrature demodulation
The receiver block can employ different architectures such as homodyne or heterodyne seen in Figure 2.3 and may use quadrature downconversion. Quadrature downconversion results in an In-phase and a Quadrature-phase data signals, as illustrated in Figure 2.4. Quadrature downconversion sep-arates the received signal into an in-phase (I) and a quadrature-phase (Q) signal. This is proven beneficial when used in a radar applications. The 90◦
phase shift between the signals will always result in one of the signals being at its optimum point when the other is at its null point.
2.2.1
Radar Equation
The radar equation is used to describe the relationship between the trans-mitted power and the received power. When considering a monostatic radar, the transmitter radiates a signal with power Ptthrough an antenna with gain
G, the power density incident on the target, St is, [1]:
St =
PtG
4πR2 (2.1)
where R is the distance to the target [1]. The amount of power reflected back to the radar is dependent on the radar cross section, which is a measure of
how detectable an object is by radar. The radar cross section is calculated as
σ = Ps St
(2.2) where Ps is the total power scattered by the target. Accounting for the
power density of the re-radiated field decaying with 1/4πR2
and the receiving antenna being finite, the final radar equation is described as
Pr = PtG 2 λ2 σ (4π)3R4 (2.3)
where Pr is the power received and λ is the transmitted wavelength.
2.3
Radar Types
There are multiple applications that utilise radar. Because of this, there is a variety of radar systems. Radar systems are classified by the signals that they use such as continuous wave (CW) with constant frequency, frequency modulated continuous wave (FMCW) or pulse radar.
2.3.1
Continuous Wave Radars
Continuous wave radars transmit a continuous signal with a constant fre-quency. When a signal is transmitted towards a target it is reflected and received by the radar. If the target is moving, the received signal has a changed frequency because of the Doppler effect phenomenon. Additionally, by analysing the relative phase difference between a transmitted and received signal, CW radars may be used for measuring distance. CW radars have the capability of performing distance measurement with sub-millimetre precision within the range of a half wavelength [8].
Doppler Radar
A Doppler radar is a specialised radar that make use of the Doppler effect to determine the speed of an object. If a target moves with the speed v along the line of sight of the radar, the shift in frequency will be, [1]:
fd =
2vf0
c (2.4)
where f0 is the frequency of the transmitted signal and c is the speed of light.
Figure 2.5: Doppler radar working principle [1]
Figure 2.6: DoA working principle [10]
receding target and positive for a approaching target. In the case where fdis
equal to 0, the target is stationary. An illustration of the working principle of a Doppler radar system can be seen in Figure 2.5. Moreover, the Doppler radar can also be used to detect small displacement of an observed target, such as vibrations [6].
Direction-of-Arrival
Direction-of-arrival radar is a slightly modified variant of a CW radar. A conceptual block diagram is shown in Figure 2.6. Instead of comparing the received signal with the transmitted signal an extra antenna is added. The incoming wave reaches the antennas with a time difference, resulting in phase difference between signal S1 and S2.
S1(t) = A1cos(ωt − φ1(t)) (2.5a)
Figure 2.7: Sawtooth wave modulation [12]
Since both signals have the same frequency and only differs in phase, quadra-ture downconversion results in the following signals:
I(t) = AI cos(∆φ(t)) (2.6a)
Q(t) = AQsin(∆φ(t)) (2.6b)
The phase difference between S1 and S2, ∆φ is extracted through
∆φ(t) = tan−1 Q(t) I(t) = tan−1 AQsin(∆φ(t)) AIcos(∆φ(t)) (2.7) With the distance between antennas D as illustrated in Figure 2.6 known together with the phase difference ∆φ and wavelength λ the angle of the incoming wave is calculated by using 2.8.
α = sin−1 λ∆φ
2πd
(2.8) Since DoA radar is a CW radar variant it suffers from ambiguity issues. The ambiguous free range is determined by the distance between antennas. A reduction in distance results in a higher ambiguity free range but at cost of lower angular resolution [11]. Furthermore, if the spacing between antennas is too low, RF-leakage may occur.
2.3.2
Frequency Modulated Continuous Wave Radars
FMCW radar radiates continuously like a CW radar. However, it modulates its operating frequency while running. Several different modulations are possible such as sine wave, sawtooth wave, triangle wave and square wave. One of the main benefits of using FMCW radar instead of CW radar is the possibility to measure distance greater than a half wave length. Using
Figure 2.8: FMCW principle with triangle wave modulation [12] sawtooth modulation shown in Figure 2.7, the frequency of the transmitted signal is shown together with the frequency of the received signal. A greater distance causes an increased time delay between transmitted and received signal resulting in a greater frequency difference. This frequency difference, called the beat frequency, is used to calculate the distance to the target. Calculating the distance to a target with a FMCW radar modulated with a sawtooth is done as follows. Knowing the beat frequency fb the round trip
time is calculated by
tr=
fb∆t
∆f (2.9)
where ∆f is the frequency modulation range and ∆t is the time required for a full frequency sweep. With the round trip time know the distance to the target, d, is calculated with
d = ctr
2n (2.10)
where c is the speed of light in vacuum and n is the refractive index of the medium, n = 1.0003 in air. A moving target will add an extra frequency shift due to the Doppler effect, represented as fD in Figure 2.7. The
fre-quency shift caused by the Doppler effect can be avoided using triangular wave modulation, seen in Figure 2.8.The beat frequency can be measured on both rising and falling edge, enabling distance measurement on both edges
Figure 2.9: Pulse radar system and timing diagram [1]
since the Doppler frequency will cause a frequency shift on both the rising and falling edge. By measuring one beat frequency on a rising edge and one on a falling edge, ∆f1 and ∆f2, the beat frequency required for distance
calculation, fb, is obtained by
fb =
∆f1 + ∆f2
2 (2.11)
and the Doppler frequency, fd, is obtained by
fd=
∆f1− ∆f2
2 (2.12)
With both frequencies know the distance to the target is calculated using (2.4) and (2.10). The relative speed of the target is obtained through
v = cfd 2f0
(2.13)
2.3.3
Pulse Radars
Pulse radars transmit a short microwave pulse signal and measure the round-trip time of the signal i.e. the time it takes for the signal to hit the target and get reflected back. By measuring the round-trip time the distance to the target can be derived [3]. A typical pulse radar system and timing diagram can be seen in Figure 2.9. The transmitter stage consist of a mixer used to offset the frequency and an amplifier. The transmit/receive switch is controlled by a pulse generator and determines the pulse width τ of the transmitted signal. The receiving stage of the system consist of amplifiers to
increase signal strength, mixing and a detection stage. Since the pulse radars compares the transmitted signal with the received signal a high degree of isolation between the transmitter and the receiver is required to avoid leakage. The switch provides the function of half-duplex i.e. can either only transmit or receive. This stage could be implemented using a circulator which would make it full-duplex. However, since the circulators are known to achieve a low degree of isolation a switch is still required [1]. If the transmitted pulse from the radar where to hit a moving target the signal would be affected by the Doppler effect causing a shift in the frequency. A radar combining the round-trip time and the Doppler shift is known as a pulse-Doppler radar and is able to determine both the range and velocity of a target. However, since the measurement principle of pulse radar is based on time detection, a short range measurement or high-precision distance detection cannot be achieved due to low accuracy in short time interval measurements [1, 3].
2.4
Radar Systems
A complete radar system consist of a RF front-end and a DSP unit seen in Figure 2.1. The front-end consist of a receiving stage and a transmitting stage. Processing the signals, analog to digital conversion is required. How-ever, the downconverted signals from the RF front-end may be weak relative to the typical operation voltage span of ADCs. This entails the need of raw signal conditioning before sampling such as filtering and amplification [3]. Moreover, radar systems have a signal processing stage where calculations such as fast Fourier transform (FFT), digital filtering and other algorithms is performed. The type of calculations performed in the DSP stage is depen-dent on the radar type and application.
2.5
The Six-Port Radar
In this thesis, the downconversion mixer is proposed to be implemented using six-port architecture. The six-port, illustrated in Figure 2.10, is a passive circuit composed of the microwave components Wilkinson power divider and branch line couplers. By adding power detectors, the six-port acts as a quadrature downconverter which makes it suitable for radar applications.
Figure 2.10: Six-port correlator
Figure 2.11: Branch line coupler [1]
2.5.1
Branch Line Coupler
The quadrature 90 degree hybrid coupler, also referred as branch line coupler (BLC), is a 4 port passive microwave component. It is composed of quar-ter wave transformers and is appropriate to design and implemented using microstrip transmission lines. When all ports are matched and the BLC is operating at its designed frequency f0, the power entering port 1 is evenly
divided between ports 2 and 3. No power is coupled to port 4 and is therefore isolated from port 1. The scattering matrix of the BLC is the following:
SBLC = −1√ 2 0 j 1 0 j 0 0 1 1 0 0 j 0 1 j 0 (2.14)
Seen in Figure 2.11 and in (2.14) the coupler possess a high degree of sym-metry which allows any port to be an input port. The output ports will always be on the opposite horizontally side of the junction from the input port and the isolated port will be the remaining port on the same side as the input port [1]. This property makes the component useful when designing a six-port
(a) (b)
Figure 2.12: The Wilkinson power divider. (a) Microstrip form. (b) Equiva-lent transmission line circuit [1]
2.5.2
Wilkinson Power Divider
Wilkinson power divider is a 3 port passive microwave component capable of either splitting or combining signals. The output ports are isolated from each other while all ports maintain matching impedance. The divider is composed of quarter wave transformers which makes it suitable for implementing using microstrip transmission lines on PCB, see Figure 2.12. When designed as an equal power divider the input signal at port 1 is split into equal signals at port 2 and 3 with a 3 dB attenuation and 90◦ phase shift. The scattering
matrix of an equal power divider is [1]. SW P D = −j√ 2 0 1 1 1 0 0 1 0 0 (2.15)
Designing the branches connecting to port 2 and 3 with unequal impedance, an uneven power division is achieved. With a power ratio of
K2
= P3 P2
(2.16) the impedance of each branch is calculated with
Z02 = Z0 r 1 + K2 K3 (2.17a) Z03 = Z0pK(1 + K2) = K 2 Z0 (2.17b)
and the value of the resistor by
R = Z0(K +
1
K) (2.18)
Figure 2.13: V-I characteristics of a Schottky diode [1]
2.5.3
Diode-Based Power Detector
The power detector is a two port device. The detector receives a RF signal at port 1, converting it to baseband at port 2 by using the transfer function of a nonlinear device such as a Schottky diode [3]. The diode can be modelled as a nonlinear resistor with a small-signal V-I relationship expressed as
I(V ) = Is(eαV − 1) (2.19)
where α = q/nkT , and q is the charge of an electron, k is Boltzmann constant, T is the temperature, n is the ideality factor, and Is is the saturation current
[1]. A typical V-I curve for a Schottky diode is seen in Figure 2.13.
For the case of small-signal approximation the diode voltage can be expressed as
V = V0+ v (2.20)
where V0 is the DC bias voltage and the v is a small AC signal voltage. The
small-signal V-I relationship (2.19) can be expanded in Taylor series about V0 as I(V ) = I0+ v dI dV V0 + 1 2v 2d 2 I dV2 V0 + ..., (2.21)
where I0 = I(V0) is the DC bias current. Then (2.21) can be rewritten as a
sum of DC bias current, I0 and an AC current i as follow:
I(V ) = I0 + i = I0+ vGd+
v2
2G
′
d (2.22)
In a detector application the non-linearity of the diode is used to translate an input RF power into a proportional DC-voltage at its output [13]. In this case the diode voltage can be expressed as
v(t) = v0(1 + m cos ωmt) cos ω0t (2.23)
where ωm is the modulated frequency, ω0 is the RF carrier frequency and m
is the modulation index. Using (2.22) and (2.23) results in the diode current:
i(t) = v0Gd(1 + m cos ωmt) cos ω0t +
v2 0 2G ′ d(1 + m cos ωmt) 2 cos2 ω0t (2.24)
From (2.24), it can be determined that the output current contains different frequencies. By low-pass filtering, the desired demodulated output frequency can be separated from the undesired frequency components. The amplitude of the desired current is proportional to the input signal voltage [1]. The square-law behaviour can only be applied on signal with low power, otherwise the small-signal condition will not apply. To increase the sensitivity of the detector a DC bias may be applied.
The output current is transformed to a voltage signal by a resistor, called the video resistor, which results in a positive voltage at the output of the power detector. A capacitor, called the video capacitor, is placed after the diode to serve as an RF ground and a low-pass filter for the output current signal from the diode.
2.6
The Six-Port Receiver
In Figure 2.14, two proposed six-port receivers are shown. Figure 2.14a illustrates a receiver using power detectors with parallel diodes and Figure 2.14b illustrates a receiver using anti-parallel diode power detector. Consider two signals S1 and S2 as input signals entering port 1 and port 2 of the
six-port:
S1(t) = A1cos(ω1t − φ1(t)) (2.25a)
(a) (b)
Figure 2.14: Six-port network. (a) Using parallel diodes. (b) Using anti-parallel diodes [14]
The signals propagate through the microwave components of the six-port and combine at the outputs P 3, P 4, P 5 and P 6 through wave interference.
P 3(t) = 1 2(S1(t)e −j180◦ + S2(t)e−j360 ◦ ) (2.26a) P 4(t) = 1 2(S1(t)e −j270◦ + S2(t)e−j270 ◦ ) (2.26b) P 5(t) = 1 2(S1(t)e −j180◦ + S2(t)e−j270 ◦ ) (2.26c) P 6(t) = 1 2(S1(t)e −j270◦ + S2(t)e−j180 ◦ ) (2.26d)
Ideally, P3-P6 represent complex RF signals. The parallel power detection results in the down converted baseband signals S3-S6:
S3(t) = |P 3|2 = 1 2|(S1(t)e −j180◦ + S2(t)e−j360 ◦ )|2 (2.27a) S4(t) = |P 4|2 = 1 2|(S1(t)e −j270◦ + S2(t)e−j270 ◦ )|2 (2.27b) S5(t) = |P 5|2 = 1 2|(S1(t)e −j180◦ + S2(t)e−j270 ◦ )|2 (2.27c) S6(t) = |P 6|2 = 1 2|(S1(t)e −j270◦ + S2(t)e−j180 ◦ )|2 (2.27d)
Using an anti-parallel diode power detector configuration results in S3(t) = |P 3|2 = 1 2|(S1(t)e −j270◦ + S2(t)e−j90 ◦ )|2 (2.28a) S4(t) = |P 4|2 = 1 2|(S1(t)e −j270◦ + S2(t)e−j270 ◦ )|2 (2.28b) S5(t) = |P 5|2 = 1 2|(S1(t)e −j180◦ + S2(t)e−j360 ◦ )|2 (2.28c) S6(t) = |P 6|2 = 1 2|(S1(t)e −j270◦ + S2(t)e−j180 ◦ )|2 (2.28d) With the addition of a quarter wave transformer added to P 3 and P 5 in the anti-parallel configuration, low pass filtering of either configuration results in the voltages
V 3(t) = −kA1A2cos((ω1 − ω2)t + (φ1(t) − φ2(t))) (2.29a)
V 4(t) = +kA1A2cos((ω1− ω2)t + (φ1(t) − φ2(t))) (2.29b)
V 5(t) = −kA1A2sin((ω1− ω2)t + (φ1(t) − φ2(t))) (2.29c)
V 6(t) = +kA1A2sin((ω1− ω2)t + (φ1(t) − φ2(t))) (2.29d)
Performing subtraction using differential amplifier in the parallel configura-tion or through anti-parallel diodes results in the quadrature signals
I(t) = V 4 − V 3 = AIcos(∆ωt + ∆φ(t)) (2.30a)
Q(t) = V 6 − V 5 = AQsin(∆ωt + ∆φ(t)) (2.30b)
In CW radar applications the received carrier is equal to the LO, ω1 = ω2,
thus the resulting I and Q signals will mainly be functions of the in-time varying phase ∆φ:
I(t) = V 4 − V 3 = AI cos((ω − ω)t + ∆φ(t)) = AIcos(∆φ(t)) (2.31a)
Q(t) = V 6 − V 5 = AQsin((ω − ω)t + ∆φ(t)) = AQsin(∆φ(t)) (2.31b)
This enables the extraction of the phase information using (2.7).
2.6.1
Antennas
The focus of this thesis is not on the design of antennas but on the complete RF front-end and DSP functional implementation. However, for experiment purposes, patch antennas were designed and included in this work.
Figure 2.15: Microstrip patch antenna
applications [15]. The patch antenna consists of a metal patch mounted on a substrate with a ground plane underneath it, see Figure 2.15. These antennas can be designed directly on a PCB and are cheap to manufacture with PCB etching processes. Their main drawback is that they have a narrow bandwidth and low radiation efficiency. Feeding the antenna and retrieving a signal can be performed in multiple ways. However, from a manufacturing standpoint edge feeding is preferred [16]. Due to their narrow bandwidth and poor radiation efficiency, good matching is vital. With edge fed patch antennas this is achieved by either using a quarter wave transformer or an inset feed.
Like all microwave components, the dimensions of a patch antenna is affected by the operation frequency. Calculating the dimensions of a patch antenna is performed in several steps [15]. First the width, W , of the patch is calculated
W = c
2fr
r 2 ǫr
(2.32) where c is the speed of light, fr is the resonant frequency and ǫr is the
dielec-tric constant of the substrate. Thereafter, the effective dielecdielec-tric constant, ǫef f, is calculated through ǫef f = ǫr+ 1 2 + ǫr− 1 2 1 q 1 + 2h W (2.33)
Furthermore, the effective length of the patch, Lef f, dependant on the
reso-nant frequency, specified by
Lef f =
c 2fr√eef f
The extension length, ∆L, is calculated by ∆L = 0.412h(eef f + 0.3) W h + 0.264 (eef f − 0.258) Wh + 0.8 (2.35)
And finally the length, L, is gained from
3 Front-End Receiver Design
In this chapter, the design of the six-port RF front-end is presented. As shown in Section 2.6, six-port is a passive microwave network that usually includes a Wilkinson power divider and three branch line couplers. The design is performed The system was designed in Advance Design Systems (ADS) from Keysight Technologies.
3.1
The Proposed Radar System
Figure 3.1 illustrates the proposed radar system. The RF front-end consists of the six-port network for down-converting the RF signals, a microcontroller performing DSP and a graphical user interface (GUI) presenting the data. Moreover, the system will include antennas which makes it possible to trans-mit and receive signals. A voltage controlled oscillator (VCO) is included for RF signal generation. Additionally, a RF-switch is included for controlling port 2 of the six-port, which enables a way to switch between VCO input and antenna input. The six-port interferometer and all RF front-end cir-cuitry will be designed for 5.8 GHz and implemented on a Rogers 4350B
Table 3.1: Properties of Rogers4350B Material Rogers4350B Dielectric Thickness 0.508 Dielectric Constant 3.66 Dissipation Factor 0.004 Metal Thickness 0.035 mm Metal Conductivity 5.8 · 107 S/m Surface roughness 0.001 mm
substrate. The properties of the substrate are shown in Table 3.1.
Along the entire design process in ADS, the design followed a typical pro-gression from schematic level design to layout level design. This include schematic generation, simulation set-up, simulation and simulation results analysis. Then, the same sequence for layout: layout generation, substrate and simulation-set up for electromagnetic simulations, simulations and anal-ysis of the simulation results. The task is to achieve layout simulation results as close as possible to the theoretical results. Layout simulations were per-formed in ADS Momentum, which is an electromagnetic simulation engine that take all the high frequency effects into consideration for a given substrate and frequency bandwidth. Co-simulation of different kinds of components in ADS was be performed by creating layout components, usually with the symbol taking the form of the layout.
3.2
Branch Line Coupler
The BLC was designed on schematic level in ADS using the Passive Circuit Design Guide. Then, from the generation of a schematic with optimised pa-rameters, the layout was generated and simulated in Momentum. In Figure 3.2, the schematic and the corresponding layout are shown. In Figure 3.3a, simulation results for the BLC are given on schematic level. The result shows that the isolation between port 1 and port 4 (S41) is -44.3 dB and that the
reflection coefficient S11is -38 dB. These are traits that indicate a good BLC
input impedance of 50 Ω. The attenuation at port 2 and port 3 was close to the ideal value of -3 dB, which indicates a good amplitude balance of the output signals.
The layout level simulations results for the BLC on layout level are shown in Figure 3.3b. The results are similar to the simulations on the schematic.
(a) (b)
Figure 3.2: Branch Line Coupler in ADS. (a) Schematic. (b) Layout compo-nent in schematic window for co-simulation
(a) (b)
Figure 3.3: BLC, S-parameter simulation results. (a) Schematic level. (b) Layout level
(a) (b)
Figure 3.4: Wilkinson Power Divider in ADS. (a) Schematic. (b) Layout component in schematic window for co-simulation
(a) (b)
Figure 3.5: WPD, S-parameter simulation results. (a) Schematic level. (b) Layout level
Isolation between port 1 and port 4 (S41) is -37.25 dB, the reflection
coef-ficient S11 is -33.67 dB, which indicates that the BLC is matched for 50 Ω.
S12 and S13 shows a 3 dB attenuation at 5.8 GHz indicating that the BLC
working as expected.
3.3
Wilkinson Power Divider Design
Mentioned in Section 2.5.2, the Wilkinson power divider is also a microwave component based on microstrip transmission lines. Hence, the same design method as described in section 3.2 was used.
(a) (b)
Figure 3.6: Six-port in ADS. (a) Schematic. (b) Layout component from the layout are shown. In Figure 3.5, S-parameter simulation results indi-cated that the WPD would perform as expected at 5.8 GHz. The impedance matching at 50 Ω (S11) and the isolation between port 3 and port 2 (S32) are
good, both close to –43 dB. The attenuation given by S21 and S31 was -2.95
dB, which shows a good amplitude balance at the output ports.
Simulation results for the WPD on layout level are shown in Figure 3.5b. The simulation results on layout are similar to the ones made on schematic. S11 indicate good 50 Ω matching at -38 dB. Furthermore, S21 and S31 both
have levels at -3.0 dB and S23shown an isolation of -39.38 dB. This indicate
that both amplitude balance and isolation are maintained at good levels on layout.
3.4
Six-Port Circuit Design
As shown in Section 2.6, the six-port circuit consists of one Wilkinson power divider and three branch line couplers interconnected as shown on schematic level in Figure 3.6a. The performance of the six-port circuit depends both on good design of the WPD and BLC and on the layout of the entire network. The symmetry, the compactness and the minimum length interconnections between the BLCs and WPD are important. Any transmission line length used as interconnection contributes with a phase delay of the signals. This aspect becomes apparent when the six-port is simulated on layout level. The generated layout component is shown in Figure 3.6b. Simulation results
(a) (b)
Figure 3.7: Six-port network, S-parameter simulation results. (a) Schematic level. (b) Layout level
Figure 3.8: Model for SOT23 diode package
illustrated in Figure 3.7 shows the amplitude balance between the ports of the six-port, both on schematic level and on layout level. S12 show that
port 1 and 2 are isolated and the output indicated by S13, S14, S15 and S16,
show a attenuation of 6 dB. Demonstrated in Figure 3.7 the results of of the layout simulations are similar to the result of the schematic simulations. This indicates that the six-port will have adequate performance at 5.8 GHz.
3.5
Power Detector Design
To perform coherent frequency downconversion in the six-port receiver, diode power detectors are used at the output ports of the six-port, as discussed in section 2.5.3. Figure 2.14 shows two different configurations of the diodes in the power detector stage, parallel and anti-parallel. Compared to the paral-lel configuration, the anti-paralparal-lel configuration has the advantage to output a higher amplitude [5]. Moreover, the use of a differential amplifier is not
Table 3.2: Diode model parameters of SMS7621 Is 4 · 10−8A M 0.35 Rs 12 Ω Fc 0.5 N 1.05 Bv 3 V Tt 10−11 1◦C Ibv 10 −5 A Cjo 0.1 pF Xti 2 Vj 0.51 V Eg 0.69 eV
Figure 3.9: Power detector schematic
required when using an anti-parallel configuration. Consequently, this thesis will only cover the design of a power detector using the anti-parallel config-uration of diodes.
The chosen diode is SMS7621 from Skyworks Solutions [17]. The diode was chosen since it had suitable characteristics for implementation in a power detector circuit. The diode was modelled in ADS according to the diode parameters shown in Table 3.2. The complete diode model includes the package parasitic elements and it is shown in Figure 3.8. The package is a SOT23 with two anti-parallel diodes. The schematic of the power detector with anti-parallel diodes configuration is shown in Figure 3.9. It includes the input matching network, the RC output filter and a quarter wave radial stub notch filter to reduce leakage signals at 5.8 GHz. A supplementary quarter wave transmission line is also added so that the output signals of the two anti-parallel diodes are summed in phase at the single ended output of the detectors. This quarter wave transmission line is seen at port P 1 in Figures 3.9 and 3.10.
minimis-Figure 3.10: Power detector layout symbol on schematic with components ing input signal power loss due to reflections. This reflections is suppressed by impedance matching using a input matching network. Moreover, the match-ing is important when considermatch-ing the very low input signal power levels at which the detector usually operates. To design the matching networks, S-parameter simulations were performed to get the required information about the diode input impedance. Subsequently, Smith chart tool in ADS was used for calculating the dimensions of the transmission lines that matching net-work consisted of. The matching netnet-work includes a shorted stub that also creates a DC return path for the diodes. The layout symbol of the entire power detector is illustrated in Figure 3.10.
Additionally, the diode was simulated with Harmonic Balance engine in ADS and where the input power was swept to determine the input power range for which the diodes operates in the square law region, i.e., in a non-linear region. Simulation results are shown in Figure 3.12.
From Figure 3.12 it can be seen that the diode performs power detection of the input signal, i.e., (·)2
from roughly -60 dBm to -20 dBm.
3.6
Six-Port Network Radar Simulations
Radar simulations in ADS were performed to verify that the proposed six-port network could function as a quadrature downconverter for radar applica-tions. The complete six-port downconverter was simulated both as a Doppler
(a) (b)
Figure 3.11: Matched power detector, S-parameter simulation. (a) Schematic level. (b) Layout level
Figure 3.13: Doppler radar target model
(a)
(b)
Figure 3.14: Simulation of Doppler radar. (a) Doppler radar I and Q signal. (b) Doppler radar frequency spectrum
radar that can detect the velocity of a moving object and as a Direction-of-Arrival radar. To verify the proposed radar application in this work, a RF switch was used that emulate the change between the Doppler-mode and DoA-mode.
Doppler radar was simulated using the radar model seen in Figure 3.13. Cir-cuit Envelope simulation with the parameters seen in Figure 3.13, resulted in the I and Q signals with the Doppler frequency presented in Figure 3.14. Then the DoA radar functionality was verified by performing harmonic bal-ance simulation. The simulation model did not use antennas. Instead, volt-age sources with a variable phase were used as input, simulating two received signals with phase differences. The resulting I and Q signals from DoA radar is shown in Figure 3.15 together with the extracted phase difference.
(a) (b)
Figure 3.15: Simulation of DoA radar. (a) DoA radar I and Q signal. (b) Arc-tanget of DoA I and Q signals
Figure 3.16: Far-field simulation of transmitting antenna array
3.7
Microstrip Patch Antennas
Initial dimensions of the patch antennas were calculated using (2.32)-(2.36). Simulations showed that the calculated dimensions did not result in adequate antenna characteristics. Hence, the antennas were simulated iterative in ADS using Momentum and far-field simulations to achieve acceptable characteris-tics.
Table 3.3: Tx antenna dimensions
Patch width 16.93 mm
Patch length 13.42 mm
Feed slot width 1.70 mm
Feed slot length 4.36 mm
(a) (b)
(c) (d)
Figure 3.17: Simulation of tx antenna array. (a) Gain. (b) Directivity. (c) Radiation efficiency. (d) Radiated power with 1 V amplitude input
Figure 3.18: Far-field simulation of receiving antenna Table 3.4: Rx antenna dimensions
Patch width 16.93 mm
Patch length 13.39 mm
Feed slot width 4.00 mm
Feed slot length 1.70 mm
Transmission line width 0.57 mm
3.7.1
Transmitting Antenna
To achieve a higher gain the transmitting antenna was designed as an ar-ray consisting of three patch antennas. Figure 3.16 illustrates the designed transmitting antenna array. The final dimensions are presented in Table 3.3. The matching was improved by changing the width of the feeding trans-mission line, increasing the characteristic impedance to 70.7 Ω and adding an inset feed to the patch. The simulation results is shown in Figure 3.17. The simulation was performed with an input signal with an amplitude of 1 volt. Simulation resulted in a gain of 8.75 dBi, a directivity of 10.84 dBi and radiation efficiency of 61.82% at 5.8 GHz.
3.7.2
Receiving Antenna
The receiving antenna was not designed as an array but instead as a sin-gle patch. Figure 3.18 show the designed receiving patch antenna. Like the transmitting antennas, an inset feed was used for impedance matching. How-ever, the transmission line that fed the antenna had a width equivalent to 50 Ω. Table 3.4 presents the dimensions of the final antenna. The simulation results is shown in Figure 3.19. The simulation was performed with a input signal with an amplitude of 1 volt. Simulation resulted in a gain of 4.63 dBi, a directivity of 6.53 dBi and radiation efficiency of 64.58% at 5.8 GHz.
(a) (b)
(c) (d)
Figure 3.19: Simulation of rx antenna. (a) Gain. (b) Directivity. (c) Radia-tion efficiency. (d) Radiated power with 1 V amplitude input
Figure 3.20: RF front-end layout
3.8
RF Front-End
The final front end layout was obtained from assembling all the different components, seen in Figure 3.20, the final schematic of the radar can be seen in Appendix A. Additional components were required to realise the proposed design.
The chosen VCO, HMC358MS8GE by Analog Devices [18], had an output frequency range of 5.7-7 GHz. Despite having an output frequency range that is quite larger than required, the VCO supplied an output power of 14 dBm. This output power was deemed sufficient and would not require an ad-ditional amplification in the transmission stage. The output frequency was regulated by a control voltage. The control voltage could be supplied by a microcontroller making the VCO suitable for both CW and FMCW radar. Controlling the input on port 2 of the six-port required a RF-switch. The RF-switch QPC6324SR by Qorvo [19] was chosen. The switch had an isola-tion of 50 dB ensuring minimum leakage.
A low-noise amplifier (LNA), HMC717ALP3E by Analog Devices [20], where added at each receiving antenna to boost the strength of the received signal and improve signal to noise ratio (SNR). Able to operate with a supply volt-age of 3.3 V no additional voltvolt-age regulation was required.
Conditioning the output signals for sampling were done by using amplifi-cation stage for both the I and Q signal. The core of the amplifiamplifi-cation
Figure 3.21: Interconnection board layout
stage consist of a precision amplifiers, LMP7707MA/NOPB by Texas In-struments [21]. The amplification stage was designed to have 40 dB gain which was deemed to be sufficient. The amplifiers were configured in a non-inverting setup as described in [21]. Moreover, the amplifiers have a maximal open loop amplification of 130 dB, which could be useful if the output signals proved to be weaker than expected.
Finally, headers were added, providing the possibility to connect output sig-nals to a microcontroller and supply voltage to the ICs.
3.9
Interconnection Board
An interconnection board was designed to provide signal routing from the radar front-end to pin headers on a microcontroller development board. Only having low frequency signals running through it, the board was implemented on FR4 substrate. Additionally, a voltage control regulator circuit was in-cluded on the circuit board to provide the possibility to supply the RF front-end by battery. The regulator LM317 from Texas Instruments [22], featured an input-to-output differential voltage of 3-40 V and supports currents up to 1.5 A. With the wide span of input voltage and supporting high output cur-rent, the regulator was deemed sufficient. The regulator circuit was design based on the manufacturers reference design [22].
Seen in Figure 3.21 is the layout of the interconnection board, the schematic of the interconnection board can be seen in Appendix B. The interconnection board was designed using Altium Designer by Altium Limited. The PCB was
however, not manufactured in Campus Norrk¨oping PCB laboratory like the front-end, but instead by a third party PCB manufacturer.
4 Digital Signal Processing
In this chapter the digital signal processing (DSP) is presented. The mi-crocontroller performing the processing will be presented together with the chosen development environment. Moreover, each step of the DSP will be discussed, including the sampling of the analog signals, the arc-tangent cal-culation, the Fourier transform and the data communication. Furthermore, generation of the VCO control voltage and the implemented RF-switch con-trol is presented. Finally the design and implementation of the GUI is pre-sented.
4.1
The Microcontroller
The DSP was performed using a STM32 Nucleo144 F767ZI development board. The processor has an ARM Cortex M7 core and has a maximum clock frequency of 216 MHz. The processor has three ADCs that can be interfaced with direct memory access (DMA). Also, The Cortex M7 core features a FPU which is vital in DSP applications [23]. With these specifi-cations, the microcontroller was deemed sufficient for the DSP.
By using a STM32 microcontroller, the software STMCubeMX created by ST, code generator could be utilised. The software enables a quick way to setup a project by generating the necessary initialisation code for the micro-controller. Furthermore, STMicroelectronics Hardware Abstraction Layer (HAL) library enabled an interface to the microprocessors functions and pe-ripheral.
Apart from analog sampling, the microcontroller was used for controlling other parts of the sensor. Generating the FMCW signal required the control voltage of the VCO to be swept, which was done by the microcontrollers DAC. Switching between LO and antenna was performed using general pur-pose input output (GPIO) pins. Additionally, the Cortex Microcontroller
Software Interface Standard (CMSIS) library [24] was used for extracting the frequency from the signals through FFT.
4.2
Analog to Digital Conversion
Two of the three ADCs were used for sampling, ADC1 channel 10 and ADC3 channel 9. These were chosen due to their convenient locations on the Nucleo development board. Both ADCs were configured to use DMA to offload the processor and thus increase performance. The STM32 Nucleo144 F767ZI [23] has two general purpose dual port DMA controllers. Both ADCs used DMA2 with ADC1 on stream 0 channel 0 and ADC3 on stream 1 channel 2. The DMA streams were configured to use circular buffer. This enabled the ADC to immediately start sampling again once the DMA buffer was full instead of requiring a new request. The sample rate was dependent on multiple pa-rameters. One of the parameters was the main clock frequency, fsys which
was set to the maximum speed of 216 MHz. The advanced peripheral busses APB1 and APB2 were the clock sources for the peripherals. These were de-rived from this clock source, each with their own prescaler. According to [23], the ADCs were connected to the APB2 with the frequency fsys/P rescaleAP B.
Each ADC had a prescaler for further clock scaling, resulting in the following ADC clock frequency:
fadc =
fsys
P rescaleAP BP rescaleADC
(4.1) With the ADC clock frequency known, the conversion time for one sample ts was calculated as follows:
ts =
ADC CY CLES+ N BIT S fADC
(4.2) Where ADC CY CLES is the number of cycles the ADC will hold each sam-ple, ranging from 3 cycles up to a maximum of 480 cycles. N BIT S is the number of resolution bits.
The sampled signals were filtered using a mean filter to reduce noise. This was performed by using the ADC buffer and the callback functions from the DMA. Using an ADC buffer with the size of N samples the function HAL ADC ConvHalfCpltCallback was called when N/2 values had been sam-pled. These values were then used to calculate the mean and a flag was set, letting the processor know that a sample was ready. When the buffer was filled, the callback function HAL ADC ConvCpltCallback was called and the
Figure 4.1: Function for calculation of Arc-tangent
same mean calculation was performed and a flag was set notifying the pro-cessor. This filtering method further reduced the sample rate by a factor of ADC BU F F ER/2 and thus the final sample rate was the following:
fs=
1
ts(ADC BU F F ER/2)
(4.3)
4.3
Calculation of Arc-tangent
The calculation of the arc-tangent was performed by a function, calcAtan, seen in Figure 4.1. The function has four input arguments: a pointer to the I signal array, a pointer to the Q signal array, a pointer to the output array and the array length of I, which is the same as the array length of Q. This function calculated the arc-tangent of each sampled element in I and Q using the function atan2f from the standard C math library, math.h. With the new atan array the DoA was calculated using (2.8).
4.4
Fourier Transform
When the sensor was configured as a Doppler radar or FMCW radar, the sampled signals were transformed from time domain to frequency domain using a Fast Fourier Transform (FFT). The FFT was performed using the CMSIS library function arm rf f t f ast f 32. This function was used since the FFT was performed on real time domain signals. The function has four inputs arguments, three pointers and a flag. The first pointer pointed at an arm rf f t f ast instance f 32 structure. The second pointer pointed at an input buffer containing the time domain data. The third pointer pointed at the output buffer array, containing the complex output data of the function. The last argument, the bit reverse flag, was a status flag indicating if bit reversal should be performed.
Using the function arm cmplx mag f 32, the magnitude of the complex out-put data from the FFT was comout-puted. The function uses equation (4.4)
Figure 4.2: Sample code of the FFT and complex magnitude
z =p(x2
+ y2
) (4.4)
where z is the complex value, x is the real part and y is the imaginary part. The arm rf f t f ast f 32 and arm cmplx mag f 32 functions converts the buffer to half the size of the input due to the nature of Fourier Transform causing the second half of the buffer to be a mirror of the first.
4.4.1
Frequency Resolution
The frequency resolution determines the minimum frequency difference which can be discriminated. The relation between sampling frequency fs and
num-ber of samples N is shown in (4.5).
F requencyResolution = fs
N (4.5)
Different applications require different sampling rates. If vital signs are mea-sured, a high frequency resolution is required since the expected signals have frequencies in the 0.5-2 Hz range [4]. However, when performing vibration measurement on industrial machinery, higher frequencies were expected, not requiring the same frequency resolution.
4.5
Communication and Visualisation
Visualising the sampled and computed data was performed on a PC. The visualisation required communication between the microcontroller and the PC. This was performed using the Nucleos virtual COM port which was connected to the USART3 controller. This way the communication could be performed using UART and only requiring an USB cable connection between the PC and microcontroller. Supporting baudrates up to 2 Mbit/s the UART interface was deemed sufficient for the task. Since 2 Mbit/s was not needed the baudrate was set to 460800 bit/s which was considered to be adequate. If higher speeds were required, the Nucleo supported both USB OTG (On the Go) and 10/100 Mbit/s Ethernet.
Figure 4.3: Microcontroller flow chart
The communication was designed to be polling based since the visualisation could be slower than the sensors updating frequency. The PC requested the latest data by sending 4 bytes, AAAX, where X was either A, B or C which corresponded the current selected radar configuration. When the microcon-troller received the request, it controlled that it had received the message in the form of AAAX to make sure that there where no errors with the commu-nication. The UART was configured to use DMA, enabling the continuation of the signal processing while waiting for the next data request from the PC. Once the data request had been received and the microcontroller was ready to send, it responded with a data structure containing the following:
• A message head used for synchronisation. • The I signal in time domain.
• The Q signal in time domain.
• The resulting FFT of the arctan vector. • The angle from the DoA calculation.
Figure 4.4: GUI flow chart
Receiving the data was performed using a script written in Python 3. Serial communication using UART meant that the data was received as an array of bytes. This required unpacking the data, converting each data member back to their correct data type. This was performed using the module struct which enabled the conversion from a byte array to float or any other data type if needed. The visualisation was performed in the same script and the data were plotted using the module matplotlib and drawn in a GUI designed using Tkinter. Using Tkinter, a frame and a canvas where the plot could be rendered was defined. By utilising subplots, multiple signals could be visu-alised in the same window. This was useful when visualising I and Q signals separately. The communication was put on a separate thread, enabling con-tinuous data acquisition without locking the GUI rendering. Additionally, information boxes called labels in Tkinter were added to the GUI, enabling the display of the current sampling rate, number of samples, FFT resolution and the calculated angle from the DoA. Finally, buttons where added mak-ing it possible to switch between radar configurations. Figures 4.3 and 4.4 illustrates an overview of the final DSP, communication and visualisation.
4.6
Digital to Analog Conversion
To achieve FMCW signal generation, the control voltage of the VCO was controlled by the microcontroller digital-to-analog converters (DAC). A
tri-Figure 4.5: For loop generating LUT
angle wave was generated manually enabling a more precise modification if desired. Output channel 1 of DAC1 was used and like the ADCs, DMA was configured to offload the processor and used a circular buffer. For wave generation to work, the DAC required a trigger source to update. The 16 bit timer, timer 6, was used as this trigger source. The timers clock source was the APB1 timer bus [23], which operated at a frequency of 108 MHz. The DAC updated its output value each time the timer counted up to the value in its auto reload register. In the default case without any clock scale or count period. This resulted in the DAC updating its value in 108 MHz. The output wave form was defined using a look-up table (LUT) with 540 points. The size of the LUT determined the maximum signal frequency of 200 kHz. The frequency could be further reduced by changing the timer’s counter period. If a higher frequency was desired, the amount of points in the LUT could be reduced, resulting in a rougher output signal due to lower output signal resolution.
The desired frequency span was 5.78 to 5.82 GHz and according to the datasheet of the VCO [18], this would require a control voltage between 0.5 V and 1.0 V. As previous stated, the DAC has 12 bit resolution and a reference voltage of 3.3 V. Using:
DAC V ALU E = Vout(2
N − 1)
VREF
(4.6)
the voltage levels were converted to DAC values ranging between 641 and 1242. With the voltage span converted to DAC values, the LUT was gener-ated using a for loop seen in Figure 4.5. The transmit signal can be switched to CW by changing the data table the DAC used from the LUT to a fixed value of 869. This value corresponded to approximately 0.7 V, causing the VCO to generate a 5.8 GHz signal.
4.7
Toggling Radar Configuration
The radar sensor was designed to handle multiple radar configurations, by means of a RF switch. The RF switch had two control pins, CTRL1 and CTRL2, these were used to determine if port 2 of the six-port was connected to the VCO or the second receiving antenna. These pins operated at 3.3 V which meant that they could be controlled with the microcontrollers GPIO pins. The pins PG0 and PG1 was configured for this task. Furthermore, toggling the radar to FMCW mode required the DAC output to be changed from 0.7 V to the sweeping value between 0.5 to 1 V. Determining which configuration should be the active, was done using the buttons in the GUI.
5 Results
This chapter presents the manufactured front-end PCB, the interconnection PCB and how they together with the microcontroller complete the system. Additionally, the designed GUI is shown. Experiments performed using the radar system together with both the designed GUI and additional measuring equipment is presented. The experiments are designed to demonstrate the functionality of the three different radar modes: CW Doppler radar, CW DoA radar and FMCW radar.
5.1
The Resulting System
As described in Chapter 3 and Chapter 4 the radar sensor consists of a RF front-end, an interconnection board and a STM32 Nucleo development board featuring a STM32F767ZI microcontroller. A photography, including the connected PC displaying the GUI is shown in Figure 5.1.
Figure 5.2: Disassembled radar sensor. Shown are microcontroller in the bottom left, interconnection board in the bottom right and radar front-end in the top.
Figure 5.3: The radar graphical user interface
5.1.1
Interconnection
Figure 5.2 illustrates the disassembled radar sensor. Assembling the radar is performed by mounting the RF front-end PCB on the interconnection board and then mounting both boards on the Nucleo development board. Finally, the sensor is connected to a PC through the ST-link, USB port on the development board. The ST-link is the interface used to program the microcontroller and its USB port is also connected to the USART controller described in Section 4.5. Powering the sensor is done by either battery or an external power supply.
5.1.2
The GUI
Seen in Figure 5.3 is a screenshot of the GUI taken when the radar is inactive. The GUI provides the user with information regarding sample rate, number
Figure 5.4: Frequency spectrum of the transmitted CW
Figure 5.5: DC-motor vibration test setup
of samples, FFT resolution and the calculated angle of arrival. Plotted in the three live graphs are the time domain signals I and Q and the FFT of the arc-tangent calculated with (2.7). Additionally, the GUI has three buttons enabling the user to choose one of the three radar modes.
5.2
Continuous Wave Radar
Evaluation of the CW radar types was performed by a series of test. Initially, the transmitted signal was analysed in a semi-anechoic chamber to verify that the VCO was generating a 5.8 GHz signal. The test results are shown in Figure 5.4. While not transmitting at exactly 5.8 GHz, the results were deemed sufficient to show proof of concept.
5.2.1
Doppler Radar
Verifying the Doppler radars functionality was done through a series of tests. The tests were performed to evaluate different applications of the Doppler radar, such as vital sign detector, vibration measurement and object
detec-(a) (b)
Figure 5.6: Measurements of a DC-motor vibrations. (a) Rotating at 675 RPM, (b) Rotating at 1312 RPM
tion.
The vibration detection test was done by aiming the radar sensor towards a DC-motor, Figure 5.5 shows the experiment set-up used during the test. Vibrations in the motor emerge from different reasons such as loose bolts, damaged bearing, rotation speed and unbalanced shaft/rotor. By measuring the different frequency component from the vibrations, a frequency charac-teristic of the DC-motor was presented.
Seen in Figure 5.6a, the radar detected different frequency components. To see if the frequency components correlate with the rotation speed, the rota-tion speed of the motor was doubled. The result of doubling the speed is presented in Figure 5.6b. The same test was repeated on a different DC-motor with a known frequency characteristic. Figure 5.7 show the frequency detected by the radar and the known frequency characteristic of the DC-motor.
Since the frequency characteristics were the wanted results, the amplitudes were not analysed. The amplitudes in Figures 5.6 and 5.7b are raw output values from the microcontroller and the amplitude in Figure 5.7a is in the unit mm/s.
Vital sign measurement expected a signal frequency range of 0.5-2 Hz. This was expected since a healthy human usually has a heartbeat of 60 beats per minute and a respiratory rate of about 30 breaths per minute. Due to not buffering limitations of the GUI the vital sign measurements were difficult to visualise. Instead, an oscilloscope was used to measure the I and Q signal. Seen in Figure 5.8a, the radar detects heartbeats of a person sitting in front
