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ESKI - MODULE DOCUMENTATIONAVE

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Page 1 of 6

ESKI - MODULE DOCUMENTATION AVE

DI0<71:0> AVE AVE<7:0>

DI1<71:0>

DI2<71:0>

DI3<71:0>

DI4<71:0>

DI5<71:0>

DI6<71:0>

DI7<71:0>

DI8<71:0>

Module responsible _______________________

Specification responsible Bengt Oelmann

Designers ____________________________________________

General description: AVE computes the average value of the input data..

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CONTENTS

Page

1. SPECIFICATION...3

1.1 INTERFACEDESCRIPTIONDIGITALSIGNALS...3

1.2 HIERARCHY...4

1.3 FUNCTIONALITY...4

1.4 INPUTPARAMETERS...4

1.5 DESIGNGOALS...4

DESCRIPTION OF IMPLEMENTATION...5

2. VERIFICATION...5

3. DELIVERABLES...6

3.1 DIGITALMODULES...6

Rev Date Description of modification Sign

0 Initial issue

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1. Specification

1.1 Interface description digital signals Inputs, outputs and bidirs in alphabetic order.

Input signals

Signal name From Input delay Description

DI0<7:0> REG 20 ns Image data from window (-1,-1) DI1<7:0> REG 20 ns Image data from window (-1,0) DI2<7:0> REG 20 ns Image data from window (-1,1) DI3<7:0> REG 20 ns Image data from window (0,-1)

DI4<7:0> REG 20 ns Image data from window (0,0)

DI5<7:0> REG 20 ns Image data from window (0,1)

DI6<7:0> REG 20 ns Image data from window (1,-1)

DI7<7:0> REG 20 ns Image data from window (1,0)

DI8<7:0> REG 20 ns Image data from window (1,1)

Output signals

Signal name To Output delay Description

AVE<7:0> ImProc 20 ns Average window value

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1.2 Hierarchy

Hierarchy of module AVE:

No hierarchy is given

1.3 Functionality AVE = 1/9*SUM(DIi)

1.4 Input parameters -

1.5 Design goals Frequency: 15 MHz

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Description of implementation

The implementation strategy should be described here. If special techniques have been used to fulfill the Design goal demands, this should be pointed out.

2. Verification

Describe the strategy used for verifying that the module works according to specification.

 How is the module simulated?

 Which functions and parameters are covered and which are not covered by the simulations? (referred to specification)

 How is the other functions and parameters verified?

 What are the results compared to (Matlab model, C-program, Behavioral model, manually from specification, other)

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3. Deliverables

3.1 Digital modules

The following documents should be included in the module documentation:

 RTL-code(s)

 Schematics

 Test bench(es)

The following documents may be included in the module documentation (optional):

 Result from simulation

 Synthesis script

 Synthesis constraints (if other than project common constraints)

 Synthesis report(s)

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References

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