v IN = 0 v OUT = V DD r DSN r PDN

(1)

v_OUT v_IN

V_DD CMOS Inverter

V_DD

r_SDP r_PUN

r_DSN r_PDN v_OUT v_IN

V_DD

v_OUT v_IN

r_SDP r_PUN

r_DSN r_PDN v_IN = 0

v_OUT = V_DD

v_IN = V_DD v_OUT = 0

(2)

v_OUT v_IN

V_DD

r_SDP r_PUN

v_IN = 0

v_OUT = V_DD

Q_P: Triode small v_SD Q_N: Cutoff

r_PUN = r_SDP

(3)

v_OUT v_IN

V_DD

r_SDP r_PUN v_OUT

v_IN = 0

v_OUT = V_DD

r_PUN = r_SDP

(4)

v_OUT v_IN

V_DD

r_SDP r_PUN

v_IN = V_DD v_OUT = 0 Q_P: Cutoff

Q_N: Triode small v_DS r_PDN = r_DSN

(5)

v_OUT v_IN

r_DSN r_PDN v_OUT

v_IN = V_DD v_OUT = 0 Q_P: Cutoff

(6)

v_OUT v_IN

r_PDN v_OUT v_IN = V_DD v_OUT = 0 Q_P: Cutoff

V_DD

r_PUN

v_OUT v_IN = 0

v_OUT = V_DD

r_PUN = r_SDP

(7)

v_IN V_DD

t

(8)

v_IN V_DD

v_OUT V_DD

t

(9)

CMOS Inverter

V_DD v_IN

V_DD

v_OUT

(10)

v_IN

v_OUT V_DD

(11)

v_IN

v_OUT V_DD

(12)

v_IN

v_OUT

C

(13)

v_OUT v_IN

r_PDN v_OUT v_IN = V_DD v_OUT = 0 Q_P: Cutoff

V_DD

r_PUN

v_OUT v_IN = 0

v_OUT = V_DD

r_PUN = r_SDP

(14)

v_OUT v_IN

r_PDN

v_OUT v_IN = V_DD

v_OUT = 0 Q_P: Cutoff

V_DD

r_PUN

v_OUT v_IN = 0

v_OUT = V_DD

r_PUN = r_SDP

C

(15)

CMOS Inverter

r_PDN

v_OUT v_IN = V_DD

v_OUT = 0 V_DD

r_PUN

v_OUT v_IN = 0

v_OUT = V_DD

C C

(16)

v_IN(t), v_OUT(t) = ?

t=0

r_PDN

v_OUT(t)=?

V_DD r_PUN

v_OUT(t)=?

C C

t=0^-

t=0⁺

t

(17)

t=0

r_PDN V_DD

r_PUN

v_OUT(0)=V_DD

C C

t=0^-

t=0⁺ v_OUT(t)=?

t

(18)

v_IN(t), v_OUT(t)

t=0

r_PDN v_OUT(t)/r_PDN = C∙v_OUT’(t)

v_OUT(t) = A1∙exp(-t/(r_PDN∙C)) + A₂ v_OUT(0)=V_DD, v_OUT(∞)=0

v_OUT(t) = V_DD∙exp(-t/(r_PDN∙C)) V_DD

r_PUN

v_OUT(0)=V_DD

C C

t=0^-

t=0⁺ v_OUT(t)

t

(19)

v_IN(t), v_OUT(t)

t=0

r_PDN

v_OUT(t)=V_DD, t < 0 v_OUT(t) = V_DD∙exp(-t/(r_PDN∙C)) t > 0 V_DD

r_PUN

v_OUT(0)

C C

t=0^-

t=0⁺ v_OUT(t)

t

(20)

v_IN(t), v_OUT(t)

r_PDN v_OUT(t) = V_DD∙exp(-t/(r_PDN∙C))

i_r = v_OUT/r_PDN = (V_DD/r_PDN)∙exp(-t/(r_PDN∙C)) P_PDN = v_OUT²/r_PDN

P_PDN = (V_DD²/r_PDN)∙exp(-2t/(r_PDN∙C)) V_DD

r_PUN

v_OUT(0)

C C

t=0^-

t=0⁺ v_OUT(t)

t

(21)

v_IN(t), v_OUT(t)

t=0

r_PDN

V_DD r_PUN

v_OUT(0)=?

C t=0⁺ C

t=0^- v_OUT(t)=0

t

(22)

v_IN(t), v_OUT(t)

t=0

r_PDN

V_DD r_PUN

C

C t=0⁺

t=0^- v_OUT(t)

t

v_OUT(t) = 0, t < 0

v_OUT(t) = V_DD – V_DD∙exp(-t/(r_PUN∙C)) t > 0 v_OUT(t)=0

(23)

v_IN(t), v_OUT(t)

t=0

r_PDN

V_DD r_PUN

C

C t=0⁺

t=0^- v_OUT(t)

t

v_OUT(t) = 0, t < 0

v_OUT(t) = V_DD – V_DD∙exp(-t/(r_PUN∙C)) t > 0 v_OUT(t)=0

(24)

v_IN(t), v_OUT(t)

r_PDN

V_DD r_PUN

C

C t=0⁺

t=0^- v_OUT(t)

v_OUT(t) = V_DD – V_DD∙exp(-t/(r_PUN∙C)) t

i_r = (V_DD – v_OUT)/r_PUN = (V_DD/r_PUN)∙exp(-t/(r_PUN∙C)) P_PUN = (V_DD²/r_PUN)∙exp(-2t/(r_PUN∙C))

P_SUPPLY = (V_DD²/r_PUN)∙exp(-t/(r_PUN∙C)) v_OUT(t)=0

(25)

v_IN(t), v_OUT(t)

r_PDN

v_OUT(t)=?

V_DD r_PUN

v_OUT(t)=?

C C

t

(26)

i_C(t), i_SUPPLY(t)

t v_IN(t), v_OUT(t)

t

P_SUPPLY, P_PUN,PDN

t

(27)

P_SUPPLY, P_PUN,PDN

t P_SUPPLY = (V_DD²/r_PUN)∙exp(-t/(r_PUN∙C))

P_AVG = (1/T) ∫_T (V_DD²/r_PUN)∙exp(-t/(r_PUN∙C) dt

P_AVG = - (1/T) r_PUN∙ C (V_DD²/r_PUN)∙exp(-t/(r_PUN∙C) | _{0 to T} P_AVG = (1/T) C (V_DD²) if r_PUNC << T

v_IN(t), v_OUT(t)

t

P_AVG = f∙C∙V_DD²

(28)

v_IN(t), v_OUT(t)

t

t τPHL = t₅₀ on top plot

τPLH = t₅₀ on bottom plot τTHL = t₁₀ – t₉₀ on top plot

τ_TLH = t₉₀ – t₁₀ on bottom plot t₉₀t₅₀t₁₀

t₁₀t₅₀t₉₀ 0.9V_DD

0.5V_DD 0.1V_DD

0.9V_DD 0.5V_DD 0.1V_DD

(29)

v_IN(t), v_OUT(t)

t=0

v_OUT(t₅₀) = V_DD∙exp(-t₅₀/(r_PDN∙C)) = V_DD/2 -t₅₀/(r_PDN∙C) = ln(1/2)

t₅₀ = r_PDN∙C∙ln(2)

-t₁₀/(r_PDN∙C) = ln(1/10) t₁₀ = r_PDN∙C∙ln(10)

-t₉₀/(r_PDN∙C) = ln(9/10) t₉₀ = r_PDN∙C∙ln(10/9)

t

(30)

v_IN(t), v_OUT(t)

t=0

τPHL = t₅₀ = r_PDN∙C∙ln(2)

τ_THL = t₁₀ – t₉₀ = r_PDN∙C∙ln(10) – r_PDN∙C∙ln(10/9)

τTHL = r_PDN∙C∙(ln(10) – ln(10/9)) = r_PDN∙C∙ln(10∙9/10)

t

τPHL = r_PDN∙C∙ln(2) τTHL = r_PDN∙C∙ln(9)

(31)

v_IN(t), v_OUT(t)

t

t t₉₀t₅₀t₁₀

t₁₀t₅₀t₉₀ 0.9V_DD

0.5V_DD 0.1V_DD

0.9V_DD 0.5V_DD 0.1V_DD

τPHL,τPLH = r_PDN,PUN∙C∙ln(2) τTHL,τTLH = r_PDN,PUN∙C∙ln(9)

This is for the simple model of a resisitor and capacitor.

(32)

v_IN(t), v_OUT(t)

t=0

v_OUT(t) = V_DD∙exp(-t/(r_PDN∙C)) k_n = 130 mA/V

V_tn = 1.62 V V_DD = 5 V C = 200 nF

r_PDN = r_DS = 1/(.130*(5-1.62)) = 2.27 Ω r_PDN∙C = 454 nsec

v_OUT(t) = 5∙exp(-t/(454x10^-9))

t

-5 0 5 10

time (usec) 0

1 2 3 4 5

v

v I N v

O U T

(33)

-5 0 5 10 time (usec)

0 1 2 3 4 5

v

k_n = 130 mA/V V_tn = 1.62 V V_DD = 5 V C = 200 nF

(34)

v_IN(t), v_OUT(t)

t P_AVG = f∙C∙V_DD²

τ_PHL,τ_PLH = r_PDN,PUN∙C∙ln(2) τ_THL,τ_TLH = r_PDN,PUN∙C∙ln(9)

f_max ~ 1/τ_T ~ 1/(r_PDN,PUN∙C) r_SD,DS = 1/(k’(W/L)(V_DD-V_t))

For this model the minimum clock period is proportional to τ_THL or τ_THL.

(35)

v_IN(t), v_OUT(t)

P_AVG = N∙f∙C∙V_DD² f_max ~ (2/C)∙k’∙(W/L)∙(Vt_DD-V_t)

Performance (f_max) vs. Power Dissipation (P_D) vs. Area/Number (A,N) (assume always operating at f_max)

1. Increase V_DD (Power vs f_max)

• f_max goes up by V_DD-V_t

• Power goes up by (V_DD-V_t)∙V_DD² 2. Increase W/L (f_max vs A)

• f_max goes up by W

• Power goes up by W

• Uses more area on the IC 3. Find a better process that has

• Larger k’

• Smaller C, but k’=µC_ox, so maybe higher mobility.

• Smaller V_t

f

_max

P

_D

A

A = N∙W∙L

(36)

v_IN

v_OUT V_DD

(37)

t=0

r_PDN

v_OUT(t)=?

V_DD r_PUN

v_OUT(t)=?

C C

t=0^-

t=0⁺

t

For this model, the output voltage would be a 2^nd order differential equation.

a. overdamped.

b. underdamped (ringing) c. critically…